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perf vendor events intel: Add uncore event list for Icelake Server
Add JSON uncore events for Icelake Server to perf. Based on JSON list v1.04: https://download.01.org/perfmon/ICX/ Signed-off-by: Jin Yao <yao.jin@linux.intel.com> Reviewed-by: Andi Kleen <ak@linux.intel.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kan Liang <kan.liang@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/c0f27643-bebb-2912-56ed-f7abec7dbde3@linux.intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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[
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{
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"BriefDescription": "2LM Tag Check : Hit in Near Memory Cache",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xD3",
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"EventName": "UNC_M_TAGCHK.HIT",
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"PerPkg": "1",
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"UMask": "0x01",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "2LM Tag Check : Miss, no data in this line",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xD3",
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"EventName": "UNC_M_TAGCHK.MISS_CLEAN",
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"PerPkg": "1",
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"UMask": "0x02",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "2LM Tag Check : Miss, existing data may be evicted to Far Memory",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xD3",
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"EventName": "UNC_M_TAGCHK.MISS_DIRTY",
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"PerPkg": "1",
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"UMask": "0x04",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "2LM Tag Check : Read Hit in Near Memory Cache",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xD3",
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"EventName": "UNC_M_TAGCHK.NM_RD_HIT",
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"PerPkg": "1",
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"UMask": "0x08",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "2LM Tag Check : Write Hit in Near Memory Cache",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xD3",
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"EventName": "UNC_M_TAGCHK.NM_WR_HIT",
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"PerPkg": "1",
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"UMask": "0x10",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "DRAM Precharge commands. : Precharge due to read",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x02",
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"EventName": "UNC_M_PRE_COUNT.RD",
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"PerPkg": "1",
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"UMask": "0x04",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "DRAM Precharge commands. : Precharge due to write",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x02",
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"EventName": "UNC_M_PRE_COUNT.WR",
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"PerPkg": "1",
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"UMask": "0x08",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "All DRAM read CAS commands issued (including underfills)",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x04",
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"EventName": "UNC_M_CAS_COUNT.RD",
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"PerPkg": "1",
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"UMask": "0x0f",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "All DRAM write CAS commands issued",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x04",
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"EventName": "UNC_M_CAS_COUNT.WR",
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"PerPkg": "1",
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"UMask": "0x30",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "All DRAM CAS commands issued",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x04",
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"EventName": "UNC_M_CAS_COUNT.ALL",
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"PerPkg": "1",
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"UMask": "0x3f",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Number of DRAM Refreshes Issued",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x45",
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"EventName": "UNC_M_DRAM_REFRESH.OPPORTUNISTIC",
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"PerPkg": "1",
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"UMask": "0x01",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Number of DRAM Refreshes Issued",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x45",
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"EventName": "UNC_M_DRAM_REFRESH.PANIC",
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"PerPkg": "1",
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"UMask": "0x02",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Number of DRAM Refreshes Issued",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x45",
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"EventName": "UNC_M_DRAM_REFRESH.HIGH",
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"PerPkg": "1",
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"UMask": "0x04",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Read Pending Queue Allocations",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x10",
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"EventName": "UNC_M_RPQ_INSERTS.PCH0",
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"PerPkg": "1",
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"UMask": "0x01",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Read Pending Queue Allocations",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x10",
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"EventName": "UNC_M_RPQ_INSERTS.PCH1",
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"PerPkg": "1",
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"UMask": "0x02",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Write Pending Queue Allocations",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x20",
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"EventName": "UNC_M_WPQ_INSERTS.PCH0",
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"PerPkg": "1",
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"UMask": "0x01",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Write Pending Queue Allocations",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x20",
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"EventName": "UNC_M_WPQ_INSERTS.PCH1",
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"PerPkg": "1",
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"UMask": "0x02",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "DRAM Precharge commands. : Precharge due to page table",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x02",
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"EventName": "UNC_M_PRE_COUNT.PGT",
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"PerPkg": "1",
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"UMask": "0x10",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "DRAM Clockticks",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventName": "UNC_M_CLOCKTICKS",
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"PerPkg": "1",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Half clockticks for IMC",
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"Counter": "FIXED",
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"CounterType": "FIXED",
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"EventCode": "0xff",
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"EventName": "UNC_M_HCLOCKTICKS",
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"PerPkg": "1",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Read Pending Queue Occupancy",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x80",
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"EventName": "UNC_M_RPQ_OCCUPANCY_PCH0",
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"PerPkg": "1",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Read Pending Queue Occupancy",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x81",
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"EventName": "UNC_M_RPQ_OCCUPANCY_PCH1",
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"PerPkg": "1",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Write Pending Queue Occupancy",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x82",
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"EventName": "UNC_M_WPQ_OCCUPANCY_PCH0",
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"PerPkg": "1",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "Write Pending Queue Occupancy",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x83",
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"EventName": "UNC_M_WPQ_OCCUPANCY_PCH1",
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"PerPkg": "1",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "DRAM Activate Count : All Activates",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x01",
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"EventName": "UNC_M_ACT_COUNT.ALL",
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"PerPkg": "1",
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"UMask": "0x0B",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "DRAM Precharge commands",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0x02",
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"EventName": "UNC_M_PRE_COUNT.ALL",
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"PerPkg": "1",
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"UMask": "0x1C",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "PMM Read Pending Queue Occupancy",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xE0",
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"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL",
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"PerPkg": "1",
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"UMask": "0x01",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "PMM Read Queue Inserts",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xE3",
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"EventName": "UNC_M_PMM_RPQ_INSERTS",
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"PerPkg": "1",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "PMM Write Queue Inserts",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xE7",
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"EventName": "UNC_M_PMM_WPQ_INSERTS",
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"PerPkg": "1",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "PMM Commands : All",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xEA",
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"EventName": "UNC_M_PMM_CMD1.ALL",
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"PerPkg": "1",
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"UMask": "0x01",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "PMM Commands : Reads - RPQ",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xEA",
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"EventName": "UNC_M_PMM_CMD1.RD",
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"PerPkg": "1",
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"UMask": "0x02",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "PMM Commands : Writes",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xEA",
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"EventName": "UNC_M_PMM_CMD1.WR",
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"PerPkg": "1",
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"UMask": "0x04",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "PMM Commands : Underfill reads",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xEA",
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"EventName": "UNC_M_PMM_CMD1.UFILL_RD",
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"PerPkg": "1",
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"UMask": "0x08",
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"Unit": "iMC"
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},
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{
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"BriefDescription": "PMM Write Pending Queue Occupancy",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventCode": "0xE4",
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"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL",
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"PerPkg": "1",
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"UMask": "0x01",
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"Unit": "iMC"
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}
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]
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File diff suppressed because it is too large
Load Diff
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[
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{
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"BriefDescription": "Clockticks of the power control unit (PCU)",
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"Counter": "0,1,2,3",
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"CounterType": "PGMABLE",
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"EventName": "UNC_P_CLOCKTICKS",
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"PerPkg": "1",
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"Unit": "PCU"
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}
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]
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