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Merge with master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6.git

This commit is contained in:
David Woodhouse 2005-07-27 14:14:13 +01:00
parent 39299d9d15 9e566d8bd6
commit c5fbc3966f
298 changed files with 37346 additions and 32488 deletions
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15
Documentation/scsi/scsi_mid_low_api.txt
View File

@ -388,7 +388,6 @@ Summary:
scsi_remove_device - detach and remove a SCSI device
scsi_remove_host - detach and remove all SCSI devices owned by host
scsi_report_bus_reset - report scsi _bus_ reset observed
scsi_set_device - place device reference in host structure
scsi_track_queue_full - track successive QUEUE_FULL events
scsi_unblock_requests - allow further commands to be queued to given host
scsi_unregister - [calls scsi_host_put()]
@ -740,20 +739,6 @@ int scsi_remove_host(struct Scsi_Host *shost)
void scsi_report_bus_reset(struct Scsi_Host * shost, int channel)
/**
* scsi_set_device - place device reference in host structure
* @shost: a pointer to a scsi host instance
* @pdev: pointer to device instance to assign
*
* Returns nothing
*
* Might block: no
*
* Defined in: include/scsi/scsi_host.h .
**/
void scsi_set_device(struct Scsi_Host * shost, struct device * dev)
/**
* scsi_track_queue_full - track successive QUEUE_FULL events on given
* device to determine if and when there is a need

9
MAINTAINERS
View File

@ -1419,13 +1419,20 @@ W: http://www.penguinppc.org/
L: linuxppc-embedded@ozlabs.org
S: Maintained
LINUX FOR POWERPC EMBEDDED PPC8XX AND BOOT CODE
LINUX FOR POWERPC BOOT CODE
P: Tom Rini
M: trini@kernel.crashing.org
W: http://www.penguinppc.org/
L: linuxppc-embedded@ozlabs.org
S: Maintained
LINUX FOR POWERPC EMBEDDED PPC8XX
P: Marcelo Tosatti
M: marcelo.tosatti@cyclades.com
W: http://www.penguinppc.org/
L: linuxppc-embedded@ozlabs.org
S: Maintained
LINUX FOR POWERPC EMBEDDED PPC83XX AND PPC85XX
P: Kumar Gala
M: kumar.gala@freescale.com

3
arch/alpha/kernel/process.c
View File

@ -165,7 +165,6 @@ machine_restart(char *restart_cmd)
common_shutdown(LINUX_REBOOT_CMD_RESTART, restart_cmd);
}
EXPORT_SYMBOL(machine_restart);
void
machine_halt(void)
@ -173,7 +172,6 @@ machine_halt(void)
common_shutdown(LINUX_REBOOT_CMD_HALT, NULL);
}
EXPORT_SYMBOL(machine_halt);
void
machine_power_off(void)
@ -181,7 +179,6 @@ machine_power_off(void)
common_shutdown(LINUX_REBOOT_CMD_POWER_OFF, NULL);
}
EXPORT_SYMBOL(machine_power_off);
/* Used by sysrq-p, among others. I don't believe r9-r15 are ever
saved in the context it's used. */

42
arch/arm/boot/compressed/head-shark.S
View File

@ -63,8 +63,8 @@ __beginning: mov r4, r0 @ save the entry to the firmware
mov pc, r2
__copy_target: .long 0x08508000
__copy_end: .long 0x08608000
__copy_target: .long 0x08507FFC
__copy_end: .long 0x08607FFC
.word _start
.word __bss_start
@ -73,9 +73,10 @@ __copy_end: .long 0x08608000
__temp_stack: .space 128
__mmu_off:
adr r0, __ofw_data
adr r0, __ofw_data @ read the 1. entry of the memory map
ldr r0, [r0, #4]
orr r0, r0, #0x00600000
sub r0, r0, #4
ldr r1, __copy_end
ldr r3, __copy_target
@ -89,20 +90,43 @@ __mmu_off:
* from 0x08500000 to 0x08508000 if we have only 8MB
*/
/* As we get more 2.6-kernels it gets more and more
* uncomfortable to be bound to kernel images of 1MB only.
* So we add a loop here, to be able to copy some more.
* Alexander Schulz 2005-07-17
*/
mov r4, #3 @ How many megabytes to copy
__MoveCode: sub r4, r4, #1
__Copy: ldr r2, [r0], #-4
str r2, [r1], #-4
teq r1, r3
bne __Copy
/* The firmware maps us in blocks of 1 MB, the next block is
_below_ the last one. So our decrementing source pointer
ist right here, but the destination pointer must be increased
by 2 MB */
add r1, r1, #0x00200000
add r3, r3, #0x00100000
teq r4, #0
bne __MoveCode
/* and jump to it */
adr r2, __go_on
adr r0, __ofw_data
adr r2, __go_on @ where we want to jump
adr r0, __ofw_data @ read the 1. entry of the memory map
ldr r0, [r0, #4]
sub r2, r2, r0
sub r2, r2, #0x00500000
ldr r0, __copy_target
sub r2, r2, r0 @ we are mapped add 0e50 now, sub that (-0e00)
sub r2, r2, #0x00500000 @ -0050
ldr r0, __copy_target @ and add 0850 8000 instead
add r0, r0, #4
add r2, r2, r0
mov pc, r2
mov pc, r2 @ and jump there
__go_on:
adr sp, __temp_stack

1
arch/arm/configs/bast_defconfig
View File

@ -561,7 +561,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
#
CONFIG_SERIAL_S3C2410=y
CONFIG_SERIAL_S3C2410_CONSOLE=y
CONFIG_SERIAL_BAST_SIO=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y

1
arch/arm/configs/s3c2410_defconfig
View File

@ -570,7 +570,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
#
CONFIG_SERIAL_S3C2410=y
CONFIG_SERIAL_S3C2410_CONSOLE=y
CONFIG_SERIAL_BAST_SIO=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y

4
arch/arm/kernel/process.c
View File

@ -131,7 +131,6 @@ void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
@ -139,7 +138,6 @@ void machine_power_off(void)
pm_power_off();
}
EXPORT_SYMBOL(machine_power_off);
void machine_restart(char * __unused)
{
@ -169,8 +167,6 @@ void machine_restart(char * __unused)
while (1);
}
EXPORT_SYMBOL(machine_restart);
void __show_regs(struct pt_regs *regs)
{
unsigned long flags = condition_codes(regs);

6
arch/arm/kernel/smp.c
View File

@ -78,7 +78,7 @@ struct smp_call_struct {
static struct smp_call_struct * volatile smp_call_function_data;
static DEFINE_SPINLOCK(smp_call_function_lock);
int __init __cpu_up(unsigned int cpu)
int __cpuinit __cpu_up(unsigned int cpu)
{
struct task_struct *idle;
pgd_t *pgd;
@ -159,7 +159,7 @@ int __init __cpu_up(unsigned int cpu)
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
*/
asmlinkage void __init secondary_start_kernel(void)
asmlinkage void __cpuinit secondary_start_kernel(void)
{
struct mm_struct *mm = &init_mm;
unsigned int cpu = smp_processor_id();
@ -209,7 +209,7 @@ asmlinkage void __init secondary_start_kernel(void)
* Called by both boot and secondaries to move global data into
* per-processor storage.
*/
void __init smp_store_cpu_info(unsigned int cpuid)
void __cpuinit smp_store_cpu_info(unsigned int cpuid)
{
struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);

8
arch/arm/mach-integrator/platsmp.c
View File

@ -27,12 +27,12 @@ extern void integrator_secondary_startup(void);
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
volatile int __initdata pen_release = -1;
unsigned long __initdata phys_pen_release = 0;
volatile int __cpuinitdata pen_release = -1;
unsigned long __cpuinitdata phys_pen_release = 0;
static DEFINE_SPINLOCK(boot_lock);
void __init platform_secondary_init(unsigned int cpu)
void __cpuinit platform_secondary_init(unsigned int cpu)
{
/*
* the primary core may have used a "cross call" soft interrupt
@ -61,7 +61,7 @@ void __init platform_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
int __init boot_secondary(unsigned int cpu, struct task_struct *idle)
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;

2
arch/arm/mach-s3c2410/Makefile
View File

@ -23,6 +23,8 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
# S3C2440 support
obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o
obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o
obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o
# machine specific support

57
arch/arm/mach-s3c2410/clock.c
View File

@ -448,60 +448,3 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
return 0;
}
/* S3C2440 extended clock support */
#ifdef CONFIG_CPU_S3C2440
static struct clk s3c2440_clk_upll = {
.name = "upll",
.id = -1,
};
static struct clk s3c2440_clk_cam = {
.name = "camif",
.parent = &clk_h,
.id = -1,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
static struct clk s3c2440_clk_ac97 = {
.name = "ac97",
.parent = &clk_p,
.id = -1,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
static int s3c2440_clk_add(struct sys_device *sysdev)
{
unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate);
printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
print_mhz(s3c2440_clk_upll.rate));
s3c24xx_register_clock(&s3c2440_clk_ac97);
s3c24xx_register_clock(&s3c2440_clk_cam);
s3c24xx_register_clock(&s3c2440_clk_upll);
clk_disable(&s3c2440_clk_ac97);
clk_disable(&s3c2440_clk_cam);
return 0;
}
static struct sysdev_driver s3c2440_clk_driver = {
.add = s3c2440_clk_add,
};
static int s3c24xx_clk_driver(void)
{
return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
}
arch_initcall(s3c24xx_clk_driver);
#endif /* CONFIG_CPU_S3C2440 */

2
arch/arm/mach-s3c2410/dma.c
View File

@ -436,7 +436,7 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id,
buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC);
if (buf == NULL) {
pr_debug("%s: out of memory (%d alloc)\n",
pr_debug("%s: out of memory (%ld alloc)\n",
__FUNCTION__, sizeof(*buf));
return -ENOMEM;
}

260
arch/arm/mach-s3c2410/irq.c
View File

@ -45,6 +45,9 @@
*
* 28-Jun-2005 Ben Dooks
* Mark IRQ_LCD valid
*
* 25-Jul-2005 Ben Dooks
* Split the S3C2440 IRQ code to seperate file
*/
#include <linux/init.h>
@ -65,11 +68,7 @@
#include "cpu.h"
#include "pm.h"
#define irqdbf(x...)
#define irqdbf2(x...)
#define EXTINT_OFF (IRQ_EINT4 - 4)
#include "irq.h"
/* wakeup irq control */
@ -181,7 +180,7 @@ s3c_irq_unmask(unsigned int irqno)
__raw_writel(mask, S3C2410_INTMSK);
}
static struct irqchip s3c_irq_level_chip = {
struct irqchip s3c_irq_level_chip = {
.ack = s3c_irq_maskack,
.mask = s3c_irq_mask,
.unmask = s3c_irq_unmask,
@ -370,84 +369,6 @@ static struct irqchip s3c_irq_eint0t4 = {
#define INTMSK_UART2 (1UL << (IRQ_UART2 - IRQ_EINT0))
#define INTMSK_ADCPARENT (1UL << (IRQ_ADCPARENT - IRQ_EINT0))
static inline void
s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
int subcheck)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
/* check to see if we need to mask the parent IRQ */
if ((submask & subcheck) == subcheck) {
__raw_writel(mask | parentbit, S3C2410_INTMSK);
}
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
}
static inline void
s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
mask &= ~parentbit;
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
__raw_writel(mask, S3C2410_INTMSK);
}
static inline void
s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
s3c_irqsub_mask(irqno, parentmask, group);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
static inline void
s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
/* UART0 */
@ -794,174 +715,3 @@ void __init s3c24xx_init_irq(void)
irqdbf("s3c2410: registered interrupt handlers\n");
}
/* s3c2440 irq code
*/
#ifdef CONFIG_CPU_S3C2440
/* WDT/AC97 */
static void s3c_irq_demux_wdtac97(unsigned int irq,
struct irqdesc *desc,
struct pt_regs *regs)
{
unsigned int subsrc, submsk;
struct irqdesc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
subsrc = __raw_readl(S3C2410_SUBSRCPND);
submsk = __raw_readl(S3C2410_INTSUBMSK);
subsrc &= ~submsk;
subsrc >>= 13;
subsrc &= 3;
if (subsrc != 0) {
if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_WDT;
mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
}
if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_AC97;
mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
}
}
}
#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
static void
s3c_irq_wdtac97_mask(unsigned int irqno)
{
s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
}
static void
s3c_irq_wdtac97_unmask(unsigned int irqno)
{
s3c_irqsub_unmask(irqno, INTMSK_WDT);
}
static void
s3c_irq_wdtac97_ack(unsigned int irqno)
{
s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
}
static struct irqchip s3c_irq_wdtac97 = {
.mask = s3c_irq_wdtac97_mask,
.unmask = s3c_irq_wdtac97_unmask,
.ack = s3c_irq_wdtac97_ack,
};
/* camera irq */
static void s3c_irq_demux_cam(unsigned int irq,
struct irqdesc *desc,
struct pt_regs *regs)
{
unsigned int subsrc, submsk;
struct irqdesc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
subsrc = __raw_readl(S3C2410_SUBSRCPND);
submsk = __raw_readl(S3C2410_INTSUBMSK);
subsrc &= ~submsk;
subsrc >>= 11;
subsrc &= 3;
if (subsrc != 0) {
if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_CAM_C;
mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
}
if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_CAM_P;
mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
}
}
}
#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
static void
s3c_irq_cam_mask(unsigned int irqno)
{
s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
}
static void
s3c_irq_cam_unmask(unsigned int irqno)
{
s3c_irqsub_unmask(irqno, INTMSK_CAM);
}
static void
s3c_irq_cam_ack(unsigned int irqno)
{
s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
}
static struct irqchip s3c_irq_cam = {
.mask = s3c_irq_cam_mask,
.unmask = s3c_irq_cam_unmask,
.ack = s3c_irq_cam_ack,
};
static int s3c2440_irq_add(struct sys_device *sysdev)
{
unsigned int irqno;
printk("S3C2440: IRQ Support\n");
set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
set_irq_handler(IRQ_NFCON, do_level_IRQ);
set_irq_flags(IRQ_NFCON, IRQF_VALID);
/* add new chained handler for wdt, ac7 */
set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
set_irq_handler(IRQ_WDT, do_level_IRQ);
set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
set_irq_chip(irqno, &s3c_irq_wdtac97);
set_irq_handler(irqno, do_level_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
/* add chained handler for camera */
set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
set_irq_handler(IRQ_CAM, do_level_IRQ);
set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
set_irq_chip(irqno, &s3c_irq_cam);
set_irq_handler(irqno, do_level_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
return 0;
}
static struct sysdev_driver s3c2440_irq_driver = {
.add = s3c2440_irq_add,
};
static int s3c24xx_irq_driver(void)
{
return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
}
arch_initcall(s3c24xx_irq_driver);
#endif /* CONFIG_CPU_S3C2440 */

99
arch/arm/mach-s3c2410/irq.h Normal file
View File

@ -0,0 +1,99 @@
/* arch/arm/mach-s3c2410/irq.h
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for S3C24XX CPU IRQ support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
*/
#define irqdbf(x...)
#define irqdbf2(x...)
#define EXTINT_OFF (IRQ_EINT4 - 4)
extern struct irqchip s3c_irq_level_chip;
static inline void
s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
int subcheck)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
/* check to see if we need to mask the parent IRQ */
if ((submask & subcheck) == subcheck) {
__raw_writel(mask | parentbit, S3C2410_INTMSK);
}
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
}
static inline void
s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
mask &= ~parentbit;
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
__raw_writel(mask, S3C2410_INTMSK);
}
static inline void
s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
s3c_irqsub_mask(irqno, parentmask, group);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
static inline void
s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}

48
arch/arm/mach-s3c2410/mach-bast.c
View File

@ -25,9 +25,11 @@
* 14-Jan-2005 BJD Add support for muitlple NAND devices
* 03-Mar-2005 BJD Ensured that bast-cpld.h is included
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 14-Mar-2006 BJD Updated for __iomem changes
* 22-Jun-2006 BJD Added DM9000 platform information
* 28-Jun-2006 BJD Moved pm functionality out to common code
* 14-Mar-2005 BJD Updated for __iomem changes
* 22-Jun-2005 BJD Added DM9000 platform information
* 28-Jun-2005 BJD Moved pm functionality out to common code
* 17-Jul-2005 BJD Changed to platform device for SuperIO 16550s
* 25-Jul-2005 BJD Removed ASIX static mappings
*/
#include <linux/kernel.h>
@ -64,6 +66,8 @@
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
#include <linux/serial_8250.h>
#include "clock.h"
#include "devs.h"
#include "cpu.h"
@ -113,7 +117,6 @@ static struct map_desc bast_iodesc[] __initdata = {
/* slow, byte */
{ VA_C2(BAST_VA_ISAIO), PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ VA_C2(BAST_VA_ISAMEM), PA_CS2(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
{ VA_C2(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
{ VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
{ VA_C2(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
{ VA_C2(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
@ -123,7 +126,6 @@ static struct map_desc bast_iodesc[] __initdata = {
/* slow, word */
{ VA_C3(BAST_VA_ISAIO), PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ VA_C3(BAST_VA_ISAMEM), PA_CS3(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
{ VA_C3(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
{ VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
{ VA_C3(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
{ VA_C3(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
@ -133,7 +135,6 @@ static struct map_desc bast_iodesc[] __initdata = {
/* fast, byte */
{ VA_C4(BAST_VA_ISAIO), PA_CS4(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ VA_C4(BAST_VA_ISAMEM), PA_CS4(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
{ VA_C4(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
{ VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
{ VA_C4(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
{ VA_C4(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
@ -143,7 +144,6 @@ static struct map_desc bast_iodesc[] __initdata = {
/* fast, word */
{ VA_C5(BAST_VA_ISAIO), PA_CS5(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ VA_C5(BAST_VA_ISAMEM), PA_CS5(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
{ VA_C5(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
{ VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
{ VA_C5(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
{ VA_C5(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
@ -351,6 +351,39 @@ static struct platform_device bast_device_dm9k = {
}
};
/* serial devices */
#define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO)
#define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SHARE_IRQ)
#define SERIAL_CLK (1843200)
static struct plat_serial8250_port bast_sio_data[] = {
[0] = {
.mapbase = SERIAL_BASE + 0x2f8,
.irq = IRQ_PCSERIAL1,
.flags = SERIAL_FLAGS,
.iotype = UPIO_MEM,
.regshift = 0,
.uartclk = SERIAL_CLK,
},
[1] = {
.mapbase = SERIAL_BASE + 0x3f8,
.irq = IRQ_PCSERIAL2,
.flags = SERIAL_FLAGS,
.iotype = UPIO_MEM,
.regshift = 0,
.uartclk = SERIAL_CLK,
},
{ }
};
static struct platform_device bast_sio = {
.name = "serial8250",
.id = 0,
.dev = {
.platform_data = &bast_sio_data,
},
};
/* Standard BAST devices */
@ -364,6 +397,7 @@ static struct platform_device *bast_devices[] __initdata = {
&s3c_device_nand,
&bast_device_nor,
&bast_device_dm9k,
&bast_sio,
};
static struct clk *bast_clocks[] = {

116
arch/arm/mach-s3c2410/s3c2440-clock.c Normal file
View File

@ -0,0 +1,116 @@
/* linux/arch/arm/mach-s3c2410/s3c2440-clock.c
*
* Copyright (c) 2004-2005 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2440 Clock support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/device.h>
#include <linux/sysdev.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <asm/hardware.h>
#include <asm/atomic.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/hardware/clock.h>
#include <asm/arch/regs-clock.h>
#include "clock.h"
#include "cpu.h"
/* S3C2440 extended clock support */
static struct clk s3c2440_clk_upll = {
.name = "upll",
.id = -1,
};
static struct clk s3c2440_clk_cam = {
.name = "camif",
.id = -1,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
static struct clk s3c2440_clk_ac97 = {
.name = "ac97",
.id = -1,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
};
static int s3c2440_clk_add(struct sys_device *sysdev)
{
unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
struct clk *clk_h;
struct clk *clk_p;
struct clk *clk_xtal;
clk_xtal = clk_get(NULL, "xtal");
if (IS_ERR(clk_xtal)) {
printk(KERN_ERR "S3C2440: Failed to get clk_xtal\n");
return -EINVAL;
}
s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate);
printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
print_mhz(s3c2440_clk_upll.rate));
clk_p = clk_get(NULL, "pclk");
clk_h = clk_get(NULL, "hclk");
if (IS_ERR(clk_p) || IS_ERR(clk_h)) {
printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");
return -EINVAL;
}
s3c2440_clk_cam.parent = clk_h;
s3c2440_clk_ac97.parent = clk_p;
s3c24xx_register_clock(&s3c2440_clk_ac97);
s3c24xx_register_clock(&s3c2440_clk_cam);
s3c24xx_register_clock(&s3c2440_clk_upll);
clk_disable(&s3c2440_clk_ac97);
clk_disable(&s3c2440_clk_cam);
return 0;
}
static struct sysdev_driver s3c2440_clk_driver = {
.add = s3c2440_clk_add,
};
static __init int s3c24xx_clk_driver(void)
{
return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
}
arch_initcall(s3c24xx_clk_driver);

207
arch/arm/mach-s3c2410/s3c2440-irq.c Normal file
View File

@ -0,0 +1,207 @@
/* linux/arch/arm/mach-s3c2410/s3c2440-irq.c
*
* Copyright (c) 2003,2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Changelog:
* 25-Jul-2005 BJD Split from irq.c
*
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/ptrace.h>
#include <linux/sysdev.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/mach/irq.h>
#include <asm/arch/regs-irq.h>
#include <asm/arch/regs-gpio.h>
#include "cpu.h"
#include "pm.h"
#include "irq.h"
/* WDT/AC97 */
static void s3c_irq_demux_wdtac97(unsigned int irq,
struct irqdesc *desc,
struct pt_regs *regs)
{
unsigned int subsrc, submsk;
struct irqdesc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
subsrc = __raw_readl(S3C2410_SUBSRCPND);
submsk = __raw_readl(S3C2410_INTSUBMSK);
subsrc &= ~submsk;
subsrc >>= 13;
subsrc &= 3;
if (subsrc != 0) {
if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_WDT;
mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
}
if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_AC97;
mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
}
}
}
#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
static void
s3c_irq_wdtac97_mask(unsigned int irqno)
{
s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
}
static void
s3c_irq_wdtac97_unmask(unsigned int irqno)
{
s3c_irqsub_unmask(irqno, INTMSK_WDT);
}
static void
s3c_irq_wdtac97_ack(unsigned int irqno)
{
s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
}
static struct irqchip s3c_irq_wdtac97 = {
.mask = s3c_irq_wdtac97_mask,
.unmask = s3c_irq_wdtac97_unmask,
.ack = s3c_irq_wdtac97_ack,
};
/* camera irq */
static void s3c_irq_demux_cam(unsigned int irq,
struct irqdesc *desc,
struct pt_regs *regs)
{
unsigned int subsrc, submsk;
struct irqdesc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
subsrc = __raw_readl(S3C2410_SUBSRCPND);
submsk = __raw_readl(S3C2410_INTSUBMSK);
subsrc &= ~submsk;
subsrc >>= 11;
subsrc &= 3;
if (subsrc != 0) {
if (subsrc & 1) {
mydesc = irq_desc + IRQ_S3C2440_CAM_C;
mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
}
if (subsrc & 2) {
mydesc = irq_desc + IRQ_S3C2440_CAM_P;
mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
}
}
}
#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
static void
s3c_irq_cam_mask(unsigned int irqno)
{
s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
}
static void
s3c_irq_cam_unmask(unsigned int irqno)
{
s3c_irqsub_unmask(irqno, INTMSK_CAM);
}
static void
s3c_irq_cam_ack(unsigned int irqno)
{
s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
}
static struct irqchip s3c_irq_cam = {
.mask = s3c_irq_cam_mask,
.unmask = s3c_irq_cam_unmask,
.ack = s3c_irq_cam_ack,
};
static int s3c2440_irq_add(struct sys_device *sysdev)
{
unsigned int irqno;
printk("S3C2440: IRQ Support\n");
set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
set_irq_handler(IRQ_NFCON, do_level_IRQ);
set_irq_flags(IRQ_NFCON, IRQF_VALID);
/* add new chained handler for wdt, ac7 */
set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
set_irq_handler(IRQ_WDT, do_level_IRQ);
set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
set_irq_chip(irqno, &s3c_irq_wdtac97);
set_irq_handler(irqno, do_level_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
/* add chained handler for camera */
set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
set_irq_handler(IRQ_CAM, do_level_IRQ);
set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
set_irq_chip(irqno, &s3c_irq_cam);
set_irq_handler(irqno, do_level_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
return 0;
}
static struct sysdev_driver s3c2440_irq_driver = {
.add = s3c2440_irq_add,
};
static int s3c24xx_irq_driver(void)
{
return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
}
arch_initcall(s3c24xx_irq_driver);

3
arch/arm/mm/mm-armv.c
View File

@ -425,6 +425,9 @@ static void __init build_mem_type_table(void)
mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
mem_types[MT_DEVICE].prot_pte |= L_PTE_BUFFERABLE;
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
}
cp = &cache_policies[cachepolicy];

4
arch/arm/nwfpe/fpa11.h
View File

@ -29,9 +29,7 @@
* stack+task struct. Use the same method as 'current' uses to
* reach them.
*/
register unsigned long *user_registers asm("sl");
#define GET_USERREG() (user_registers)
#define GET_USERREG() ((struct pt_regs *)(THREAD_START_SP + (unsigned long)current_thread_info()) - 1)
#include <linux/config.h>
#include <linux/thread_info.h>

2
arch/arm/nwfpe/fpmodule.c
View File

@ -132,7 +132,7 @@ void float_raise(signed char flags)
printk(KERN_DEBUG
"NWFPE: %s[%d] takes exception %08x at %p from %08lx\n",
current->comm, current->pid, flags,
__builtin_return_address(0), GET_USERREG()[15]);
__builtin_return_address(0), GET_USERREG()->ARM_pc);
#endif
/* Keep SoftFloat exception flags up to date. */

14
arch/arm/nwfpe/fpmodule.inl
View File

@ -28,8 +28,8 @@ static inline unsigned long readRegister(const unsigned int nReg)
for this in this routine. LDF/STF instructions with Rn = PC
depend on the PC being correct, as they use PC+8 in their
address calculations. */
unsigned long *userRegisters = GET_USERREG();
unsigned int val = userRegisters[nReg];
struct pt_regs *regs = GET_USERREG();
unsigned int val = regs->uregs[nReg];
if (REG_PC == nReg)
val -= 4;
return val;
@ -38,8 +38,8 @@ static inline unsigned long readRegister(const unsigned int nReg)
static inline void
writeRegister(const unsigned int nReg, const unsigned long val)
{
unsigned long *userRegisters = GET_USERREG();
userRegisters[nReg] = val;
struct pt_regs *regs = GET_USERREG();
regs->uregs[nReg] = val;
}
static inline unsigned long readCPSR(void)
@ -63,12 +63,12 @@ static inline unsigned long readConditionCodes(void)
static inline void writeConditionCodes(const unsigned long val)
{
unsigned long *userRegisters = GET_USERREG();
struct pt_regs *regs = GET_USERREG();
unsigned long rval;
/*
* Operate directly on userRegisters since
* the CPSR may be the PC register itself.
*/
rval = userRegisters[REG_CPSR] & ~CC_MASK;
userRegisters[REG_CPSR] = rval | (val & CC_MASK);
rval = regs->ARM_cpsr & ~CC_MASK;
regs->ARM_cpsr = rval | (val & CC_MASK);
}

5
arch/arm26/kernel/process.c
View File

@ -103,9 +103,6 @@ void machine_power_off(void)
{
}
EXPORT_SYMBOL(machine_halt);
EXPORT_SYMBOL(machine_power_off);
void machine_restart(char * __unused)
{
/*
@ -136,8 +133,6 @@ void machine_restart(char * __unused)
while (1);
}
EXPORT_SYMBOL(machine_restart);
void show_regs(struct pt_regs * regs)
{
unsigned long flags;

9
arch/cris/kernel/process.c
View File

@ -113,6 +113,7 @@
#include <linux/user.h>
#include <linux/elfcore.h>
#include <linux/mqueue.h>
#include <linux/reboot.h>
//#define DEBUG
@ -208,13 +209,11 @@ void cpu_idle (void)
void hard_reset_now (void);
void machine_restart(void)
void machine_restart(char *cmd)
{
hard_reset_now();
}
EXPORT_SYMBOL(machine_restart);
/*
* Similar to machine_power_off, but don't shut off power. Add code
* here to freeze the system for e.g. post-mortem debug purpose when
@ -225,16 +224,12 @@ void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);
/* If or when software power-off is implemented, add code here. */
void machine_power_off(void)
{
}
EXPORT_SYMBOL(machine_power_off);
/*
* When a process does an "exec", machine state like FPU and debug
* registers need to be reset. This is a hook function for that.

6
arch/h8300/kernel/process.c
View File

@ -90,8 +90,6 @@ void machine_restart(char * __unused)
__asm__("jmp @@0");
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
local_irq_disable();
@ -99,8 +97,6 @@ void machine_halt(void)
for (;;);
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
local_irq_disable();
@ -108,8 +104,6 @@ void machine_power_off(void)
for (;;);
}
EXPORT_SYMBOL(machine_power_off);
void show_regs(struct pt_regs * regs)
{
printk("\nPC: %08lx Status: %02x",

7
arch/i386/kernel/apm.c
View File

@ -911,14 +911,7 @@ static void apm_power_off(void)
0xcd, 0x15 /* int $0x15 */
};
/*
* This may be called on an SMP machine.
*/
#ifdef CONFIG_SMP
/* Some bioses don't like being called from CPU != 0 */
set_cpus_allowed(current, cpumask_of_cpu(0));
BUG_ON(smp_processor_id() != 0);
#endif
if (apm_info.realmode_power_off)
{
(void)apm_save_cpus();

11
arch/i386/kernel/i387.c
View File

@ -82,17 +82,6 @@ void kernel_fpu_begin(void)
}
EXPORT_SYMBOL_GPL(kernel_fpu_begin);
void restore_fpu( struct task_struct *tsk )
{
if ( cpu_has_fxsr ) {
asm volatile( "fxrstor %0"
: : "m" (tsk->thread.i387.fxsave) );
} else {
asm volatile( "frstor %0"
: : "m" (tsk->thread.i387.fsave) );
}
}
/*
* FPU tag word conversions.
*/

20
arch/i386/kernel/process.c
View File

@ -700,23 +700,27 @@ struct task_struct fastcall * __switch_to(struct task_struct *prev_p, struct tas
/*
* Restore %fs and %gs if needed.
*
* Glibc normally makes %fs be zero, and %gs is one of
* the TLS segments.
*/
if (unlikely(prev->fs | prev->gs | next->fs | next->gs)) {
if (unlikely(prev->fs | next->fs))
loadsegment(fs, next->fs);
if (prev->gs | next->gs)
loadsegment(gs, next->gs);
}
/*
* Now maybe reload the debug registers
*/
if (unlikely(next->debugreg[7])) {
set_debugreg(current->thread.debugreg[0], 0);
set_debugreg(current->thread.debugreg[1], 1);
set_debugreg(current->thread.debugreg[2], 2);
set_debugreg(current->thread.debugreg[3], 3);
set_debugreg(next->debugreg[0], 0);
set_debugreg(next->debugreg[1], 1);
set_debugreg(next->debugreg[2], 2);
set_debugreg(next->debugreg[3], 3);
/* no 4 and 5 */
set_debugreg(current->thread.debugreg[6], 6);
set_debugreg(current->thread.debugreg[7], 7);
set_debugreg(next->debugreg[6], 6);
set_debugreg(next->debugreg[7], 7);
}
if (unlikely(prev->io_bitmap_ptr || next->io_bitmap_ptr))

19
arch/i386/kernel/reboot.c
View File

@ -284,7 +284,7 @@ void machine_shutdown(void)
reboot_cpu_id = 0;
/* See if there has been given a command line override */
if ((reboot_cpu_id != -1) && (reboot_cpu < NR_CPUS) &&
if ((reboot_cpu != -1) && (reboot_cpu < NR_CPUS) &&
cpu_isset(reboot_cpu, cpu_online_map)) {
reboot_cpu_id = reboot_cpu;
}
@ -311,10 +311,8 @@ void machine_shutdown(void)
#endif
}
void machine_restart(char * __unused)
void machine_emergency_restart(void)
{
machine_shutdown();
if (!reboot_thru_bios) {
if (efi_enabled) {
efi.reset_system(EFI_RESET_COLD, EFI_SUCCESS, 0, NULL);
@ -337,23 +335,22 @@ void machine_restart(char * __unused)
machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
}
EXPORT_SYMBOL(machine_restart);
void machine_restart(char * __unused)
{
machine_shutdown();
machine_emergency_restart();
}
void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
lapic_shutdown();
machine_shutdown();
if (efi_enabled)
efi.reset_system(EFI_RESET_SHUTDOWN, EFI_SUCCESS, 0, NULL);
if (pm_power_off)
pm_power_off();
}
EXPORT_SYMBOL(machine_power_off);

14
arch/i386/kernel/setup.c
View File

@ -1414,7 +1414,7 @@ static struct nop {
This runs before SMP is initialized to avoid SMP problems with
self modifying code. This implies that assymetric systems where
APs have less capabilities than the boot processor are not handled.
In this case boot with "noreplacement". */
Tough. Make sure you disable such features by hand. */
void apply_alternatives(void *start, void *end)
{
struct alt_instr *a;
@ -1442,24 +1442,12 @@ void apply_alternatives(void *start, void *end)
}
}
static int no_replacement __initdata = 0;
void __init alternative_instructions(void)
{
extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
if (no_replacement)
return;
apply_alternatives(__alt_instructions, __alt_instructions_end);
}
static int __init noreplacement_setup(char *s)
{
no_replacement = 1;
return 0;
}
__setup("noreplacement", noreplacement_setup);
static char * __init machine_specific_memory_setup(void);
#ifdef CONFIG_MCA

5
arch/i386/mach-visws/reboot.c
View File

@ -22,8 +22,6 @@ void machine_restart(char * __unused)
outb(PIIX4_RESET_VAL, PIIX4_RESET_PORT);
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
unsigned short pm_status;
@ -43,10 +41,7 @@ void machine_power_off(void)
outl(PIIX_SPECIAL_STOP, 0xCFC);
}
EXPORT_SYMBOL(machine_power_off);
void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);

5
arch/i386/mach-voyager/voyager_basic.c
View File

@ -278,8 +278,6 @@ machine_restart(char *cmd)
}
}
EXPORT_SYMBOL(machine_restart);
void
mca_nmi_hook(void)
{
@ -315,12 +313,9 @@ machine_halt(void)
machine_power_off();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
if (pm_power_off)
pm_power_off();
}
EXPORT_SYMBOL(machine_power_off);

5
arch/ia64/kernel/process.c
View File

@ -807,16 +807,12 @@ machine_restart (char *restart_cmd)
(*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
}
EXPORT_SYMBOL(machine_restart);
void
machine_halt (void)
{
cpu_halt();
}
EXPORT_SYMBOL(machine_halt);
void
machine_power_off (void)
{
@ -825,4 +821,3 @@ machine_power_off (void)
machine_halt();
}
EXPORT_SYMBOL(machine_power_off);

2
arch/ia64/sn/kernel/xpc_main.c
View File

@ -420,7 +420,7 @@ xpc_activating(void *__partid)
partid_t partid = (u64) __partid;
struct xpc_partition *part = &xpc_partitions[partid];
unsigned long irq_flags;
struct sched_param param = { sched_priority: MAX_USER_RT_PRIO - 1 };
struct sched_param param = { sched_priority: MAX_RT_PRIO - 1 };
int ret;

6
arch/m32r/kernel/process.c
View File

@ -115,8 +115,6 @@ void machine_restart(char *__unused)
cpu_relax();
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
printk("Please push reset button!\n");
@ -124,15 +122,11 @@ void machine_halt(void)
cpu_relax();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
/* M32R_FIXME */
}
EXPORT_SYMBOL(machine_power_off);
static int __init idle_setup (char *str)
{
if (!strncmp(str, "poll", 4)) {

6
arch/m68k/kernel/process.c
View File

@ -113,8 +113,6 @@ void machine_restart(char * __unused)
for (;;);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
if (mach_halt)
@ -122,8 +120,6 @@ void machine_halt(void)
for (;;);
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
if (mach_power_off)
@ -131,8 +127,6 @@ void machine_power_off(void)
for (;;);
}
EXPORT_SYMBOL(machine_power_off);
void show_regs(struct pt_regs * regs)
{
printk("\n");

6
arch/m68knommu/kernel/process.c
View File

@ -80,8 +80,6 @@ void machine_restart(char * __unused)
for (;;);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
if (mach_halt)
@ -89,8 +87,6 @@ void machine_halt(void)
for (;;);
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
if (mach_power_off)
@ -98,8 +94,6 @@ void machine_power_off(void)
for (;;);
}
EXPORT_SYMBOL(machine_power_off);
void show_regs(struct pt_regs * regs)
{
printk(KERN_NOTICE "\n");

5
arch/mips/kernel/reset.c
View File

@ -26,18 +26,13 @@ void machine_restart(char *command)
_machine_restart(command);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
_machine_halt();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
_machine_power_off();
}
EXPORT_SYMBOL(machine_power_off);

6
arch/parisc/kernel/process.c
View File

@ -150,8 +150,6 @@ void machine_restart(char *cmd)
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
/*
@ -160,8 +158,6 @@ void machine_halt(void)
*/
}
EXPORT_SYMBOL(machine_halt);
/*
* This routine is called from sys_reboot to actually turn off the
@ -187,8 +183,6 @@ void machine_power_off(void)
KERN_EMERG "Please power this system off now.");
}
EXPORT_SYMBOL(machine_power_off);
/*
* Create a kernel thread

6
arch/ppc/kernel/setup.c
View File

@ -121,8 +121,6 @@ void machine_restart(char *cmd)
ppc_md.restart(cmd);
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
#ifdef CONFIG_NVRAM
@ -131,8 +129,6 @@ void machine_power_off(void)
ppc_md.power_off();
}
EXPORT_SYMBOL(machine_power_off);
void machine_halt(void)
{
#ifdef CONFIG_NVRAM
@ -141,8 +137,6 @@ void machine_halt(void)
ppc_md.halt();
}
EXPORT_SYMBOL(machine_halt);
void (*pm_power_off)(void) = machine_power_off;
#ifdef CONFIG_TAU

3
arch/ppc64/kernel/setup.c
View File

@ -694,7 +694,6 @@ void machine_restart(char *cmd)
local_irq_disable();
while (1) ;
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
@ -707,7 +706,6 @@ void machine_power_off(void)
local_irq_disable();
while (1) ;
}
EXPORT_SYMBOL(machine_power_off);
void machine_halt(void)
{
@ -720,7 +718,6 @@ void machine_halt(void)
local_irq_disable();
while (1) ;
}
EXPORT_SYMBOL(machine_halt);
static int ppc64_panic_event(struct notifier_block *this,
unsigned long event, void *ptr)

6
arch/s390/kernel/setup.c
View File

@ -299,24 +299,18 @@ void machine_restart(char *command)
_machine_restart(command);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
console_unblank();
_machine_halt();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
console_unblank();
_machine_power_off();
}
EXPORT_SYMBOL(machine_power_off);
static void __init
add_memory_hole(unsigned long start, unsigned long end)
{

6
arch/sh/kernel/process.c
View File

@ -80,8 +80,6 @@ void machine_restart(char * __unused)
"mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001));
}
EXPORT_SYMBOL(machine_restart);
void machine_halt(void)
{
#if defined(CONFIG_SH_HS7751RVOIP)
@ -96,8 +94,6 @@ void machine_halt(void)
cpu_sleep();
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
#if defined(CONFIG_SH_HS7751RVOIP)
@ -110,8 +106,6 @@ void machine_power_off(void)
#endif
}
EXPORT_SYMBOL(machine_power_off);
void show_regs(struct pt_regs * regs)
{
printk("\n");

6
arch/sparc/kernel/process.c
View File

@ -158,8 +158,6 @@ void machine_halt(void)
panic("Halt failed!");
}
EXPORT_SYMBOL(machine_halt);
void machine_restart(char * cmd)
{
char *p;
@ -180,8 +178,6 @@ void machine_restart(char * cmd)
panic("Reboot failed!");
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
#ifdef CONFIG_SUN_AUXIO
@ -191,8 +187,6 @@ void machine_power_off(void)
machine_halt();
}
EXPORT_SYMBOL(machine_power_off);
static DEFINE_SPINLOCK(sparc_backtrace_lock);
void __show_backtrace(unsigned long fp)

17
arch/sparc64/kernel/entry.S
View File

@ -1600,11 +1600,11 @@ sys_clone: flushw
ba,pt %xcc, sparc_do_fork
add %sp, PTREGS_OFF, %o2
ret_from_syscall:
/* Clear SPARC_FLAG_NEWCHILD, switch_to leaves thread.flags in
* %o7 for us. Check performance counter stuff too.
/* Clear current_thread_info()->new_child, and
* check performance counter stuff too.
*/
andn %o7, _TIF_NEWCHILD, %l0
stx %l0, [%g6 + TI_FLAGS]
stb %g0, [%g6 + TI_NEW_CHILD]
ldx [%g6 + TI_FLAGS], %l0
call schedule_tail
mov %g7, %o0
andcc %l0, _TIF_PERFCTR, %g0
@ -1720,12 +1720,11 @@ ret_sys_call:
/* Check if force_successful_syscall_return()
* was invoked.
*/
ldx [%curptr + TI_FLAGS], %l0
andcc %l0, _TIF_SYSCALL_SUCCESS, %g0
be,pt %icc, 1f
andn %l0, _TIF_SYSCALL_SUCCESS, %l0
ldub [%curptr + TI_SYS_NOERROR], %l0
brz,pt %l0, 1f
nop
ba,pt %xcc, 80f
stx %l0, [%curptr + TI_FLAGS]
stb %g0, [%curptr + TI_SYS_NOERROR]
1:
cmp %o0, -ERESTART_RESTARTBLOCK

20
arch/sparc64/kernel/irq.c
View File

@ -782,8 +782,14 @@ static void distribute_irqs(void)
}
#endif
struct sun5_timer {
u64 count0;
u64 limit0;
u64 count1;
u64 limit1;
};
struct sun5_timer *prom_timers;
static struct sun5_timer *prom_timers;
static u64 prom_limit0, prom_limit1;
static void map_prom_timers(void)
@ -839,18 +845,6 @@ static void kill_prom_timer(void)
: "g1", "g2");
}
void enable_prom_timer(void)
{
if (!prom_timers)
return;
/* Set it to whatever was there before. */
prom_timers->limit1 = prom_limit1;
prom_timers->count1 = 0;
prom_timers->limit0 = prom_limit0;
prom_timers->count0 = 0;
}
void init_irqwork_curcpu(void)
{
register struct irq_work_struct *workp asm("o2");

2
arch/sparc64/kernel/power.c
View File

@ -69,8 +69,6 @@ void machine_power_off(void)
machine_halt();
}
EXPORT_SYMBOL(machine_power_off);
#ifdef CONFIG_PCI
static int powerd(void *__unused)
{

6
arch/sparc64/kernel/process.c
View File

@ -124,8 +124,6 @@ void machine_halt(void)
panic("Halt failed!");
}
EXPORT_SYMBOL(machine_halt);
void machine_alt_power_off(void)
{
if (!serial_console && prom_palette)
@ -154,8 +152,6 @@ void machine_restart(char * cmd)
panic("Reboot failed!");
}
EXPORT_SYMBOL(machine_restart);
static void show_regwindow32(struct pt_regs *regs)
{
struct reg_window32 __user *rw;
@ -621,8 +617,8 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
memcpy(child_trap_frame, (((struct sparc_stackf *)regs)-1), (TRACEREG_SZ+STACKFRAME_SZ));
t->flags = (t->flags & ~((0xffUL << TI_FLAG_CWP_SHIFT) | (0xffUL << TI_FLAG_CURRENT_DS_SHIFT))) |
_TIF_NEWCHILD |
(((regs->tstate + 1) & TSTATE_CWP) << TI_FLAG_CWP_SHIFT);
t->new_child = 1;
t->ksp = ((unsigned long) child_trap_frame) - STACK_BIAS;
t->kregs = (struct pt_regs *)(child_trap_frame+sizeof(struct sparc_stackf));
t->fpsaved[0] = 0;

2
arch/sparc64/kernel/smp.c
View File

@ -137,7 +137,7 @@ void __init smp_callin(void)
/* Clear this or we will die instantly when we
* schedule back to this idler...
*/
clear_thread_flag(TIF_NEWCHILD);
current_thread_info()->new_child = 0;
/* Attach to the address space of init_task. */
atomic_inc(&init_mm.mm_count);

2
arch/sparc64/kernel/traps.c
View File

@ -2125,6 +2125,8 @@ void __init trap_init(void)
TI_PCR != offsetof(struct thread_info, pcr_reg) ||
TI_CEE_STUFF != offsetof(struct thread_info, cee_stuff) ||
TI_PRE_COUNT != offsetof(struct thread_info, preempt_count) ||
TI_NEW_CHILD != offsetof(struct thread_info, new_child) ||
TI_SYS_NOERROR != offsetof(struct thread_info, syscall_noerror) ||
TI_FPREGS != offsetof(struct thread_info, fpregs) ||
(TI_FPREGS & (64 - 1)))
thread_info_offsets_are_bolixed_dave();

6
arch/um/kernel/reboot.c
View File

@ -49,23 +49,17 @@ void machine_restart(char * __unused)
CHOOSE_MODE(reboot_tt(), reboot_skas());
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off(void)
{
uml_cleanup();
CHOOSE_MODE(halt_tt(), halt_skas());
}
EXPORT_SYMBOL(machine_power_off);
void machine_halt(void)
{
machine_power_off();
}
EXPORT_SYMBOL(machine_halt);
/*
* Overrides for Emacs so that we follow Linus's tabbing style.
* Emacs will notice this stuff at the end of the file and automatically

6
arch/v850/kernel/anna.c
View File

@ -132,8 +132,6 @@ void machine_restart (char *__unused)
asm ("jmp r0"); /* Jump to the reset vector. */
}
EXPORT_SYMBOL(machine_restart);
void machine_halt (void)
{
#ifdef CONFIG_RESET_GUARD
@ -145,15 +143,11 @@ void machine_halt (void)
asm ("halt; nop; nop; nop; nop; nop");
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);
/* Called before configuring an on-chip UART. */
void anna_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
{

6
arch/v850/kernel/as85ep1.c
View File

@ -160,8 +160,6 @@ void machine_restart (char *__unused)
asm ("jmp r0"); /* Jump to the reset vector. */
}
EXPORT_SYMBOL(machine_restart);
void machine_halt (void)
{
#ifdef CONFIG_RESET_GUARD
@ -173,15 +171,11 @@ void machine_halt (void)
asm ("halt; nop; nop; nop; nop; nop");
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);
/* Called before configuring an on-chip UART. */
void as85ep1_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
{

6
arch/v850/kernel/fpga85e2c.c
View File

@ -121,22 +121,16 @@ void machine_halt (void)
}
}
EXPORT_SYMBOL(machine_halt);
void machine_restart (char *__unused)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);
/* Interrupts */

6
arch/v850/kernel/rte_cb.c
View File

@ -67,8 +67,6 @@ void machine_restart (char *__unused)
asm ("jmp r0"); /* Jump to the reset vector. */
}
EXPORT_SYMBOL(machine_restart);
/* This says `HALt.' in LEDese. */
static unsigned char halt_leds_msg[] = { 0x76, 0x77, 0x38, 0xF8 };
@ -89,15 +87,11 @@ void machine_halt (void)
asm ("halt; nop; nop; nop; nop; nop");
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);
/* Animated LED display for timer tick. */

6
arch/v850/kernel/sim.c
View File

@ -104,24 +104,18 @@ void machine_restart (char *__unused)
V850_SIM_SYSCALL (exit, 0);
}
EXPORT_SYMBOL(machine_restart);
void machine_halt (void)
{
V850_SIM_SYSCALL (write, 1, "HALT\n", 5);
V850_SIM_SYSCALL (exit, 0);
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off (void)
{
V850_SIM_SYSCALL (write, 1, "POWER OFF\n", 10);
V850_SIM_SYSCALL (exit, 0);
}
EXPORT_SYMBOL(machine_power_off);
/* Load data from a file called NAME into ram. The address and length
of the data image are returned in ADDR and LEN. */

5
arch/v850/kernel/sim85e2.c
View File

@ -184,18 +184,13 @@ void machine_halt (void)
for (;;) {}
}
EXPORT_SYMBOL(machine_halt);
void machine_restart (char *__unused)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_restart);
void machine_power_off (void)
{
machine_halt ();
}
EXPORT_SYMBOL(machine_power_off);

8
arch/x86_64/ia32/ia32entry.S
View File

@ -591,11 +591,15 @@ ia32_sys_call_table:
.quad compat_sys_mq_getsetattr
.quad compat_sys_kexec_load /* reserved for kexec */
.quad compat_sys_waitid
.quad quiet_ni_syscall /* sys_altroot */
.quad quiet_ni_syscall /* 285: sys_altroot */
.quad sys_add_key
.quad sys_request_key
.quad sys_keyctl
/* don't forget to change IA32_NR_syscalls */
.quad sys_ioprio_set
.quad sys_ioprio_get /* 290 */
.quad sys_inotify_init
.quad sys_inotify_add_watch
.quad sys_inotify_rm_watch
ia32_syscall_end:
.rept IA32_NR_syscalls-(ia32_syscall_end-ia32_sys_call_table)/8
.quad ni_syscall

5
arch/x86_64/ia32/sys_ia32.c
View File

@ -61,6 +61,7 @@
#include <linux/ptrace.h>
#include <linux/highuid.h>
#include <linux/vmalloc.h>
#include <linux/fsnotify.h>
#include <asm/mman.h>
#include <asm/types.h>
#include <asm/uaccess.h>
@ -984,8 +985,10 @@ asmlinkage long sys32_open(const char __user * filename, int flags, int mode)
if (IS_ERR(f)) {
put_unused_fd(fd);
fd = error;
} else
} else {
fsnotify_open(f->f_dentry);
fd_install(fd, f);
}
}
putname(tmp);
}

31
arch/x86_64/kernel/reboot.c
View File

@ -109,23 +109,10 @@ void machine_shutdown(void)
local_irq_enable();
}
void machine_restart(char * __unused)
void machine_emergency_restart(void)
{
int i;
printk("machine restart\n");
machine_shutdown();
if (!reboot_force) {
local_irq_disable();
#ifndef CONFIG_SMP
disable_local_APIC();
#endif
disable_IO_APIC();
local_irq_enable();
}
/* Tell the BIOS if we want cold or warm reboot */
*((unsigned short *)__va(0x472)) = reboot_mode;
@ -150,18 +137,26 @@ void machine_restart(char * __unused)
}
}
EXPORT_SYMBOL(machine_restart);
void machine_restart(char * __unused)
{
printk("machine restart\n");
if (!reboot_force) {
machine_shutdown();
}
machine_emergency_restart();
}
void machine_halt(void)
{
}
EXPORT_SYMBOL(machine_halt);
void machine_power_off(void)
{
if (!reboot_force) {
machine_shutdown();
}
if (pm_power_off)
pm_power_off();
}
EXPORT_SYMBOL(machine_power_off);

6
crypto/cipher.c
View File

@ -41,7 +41,7 @@ static unsigned int crypt_slow(const struct cipher_desc *desc,
struct scatter_walk *in,
struct scatter_walk *out, unsigned int bsize)
{
unsigned int alignmask = crypto_tfm_alg_alignmask(desc->tfm);
unsigned long alignmask = crypto_tfm_alg_alignmask(desc->tfm);
u8 buffer[bsize * 2 + alignmask];
u8 *src = (u8 *)ALIGN((unsigned long)buffer, alignmask + 1);
u8 *dst = src + bsize;
@ -160,7 +160,7 @@ static int crypt_iv_unaligned(struct cipher_desc *desc,
unsigned int nbytes)
{
struct crypto_tfm *tfm = desc->tfm;
unsigned int alignmask = crypto_tfm_alg_alignmask(tfm);
unsigned long alignmask = crypto_tfm_alg_alignmask(tfm);
u8 *iv = desc->info;
if (unlikely(((unsigned long)iv & alignmask))) {
@ -424,7 +424,7 @@ int crypto_init_cipher_ops(struct crypto_tfm *tfm)
}
if (ops->cit_mode == CRYPTO_TFM_MODE_CBC) {
unsigned int align;
unsigned long align;
unsigned long addr;
switch (crypto_tfm_alg_blocksize(tfm)) {

2
crypto/internal.h
View File

@ -75,7 +75,7 @@ static inline unsigned int crypto_cipher_ctxsize(struct crypto_alg *alg,
switch (flags & CRYPTO_TFM_MODE_MASK) {
case CRYPTO_TFM_MODE_CBC:
len = ALIGN(len, alg->cra_alignmask + 1);
len = ALIGN(len, (unsigned long)alg->cra_alignmask + 1);
len += alg->cra_blocksize;
break;
}

17
drivers/acpi/ec.c
View File

@ -170,22 +170,19 @@ acpi_ec_enter_burst_mode (
status = acpi_ec_read_status(ec);
if (status != -EINVAL &&
!(status & ACPI_EC_FLAG_BURST)){
ACPI_DEBUG_PRINT((ACPI_DB_INFO,"entering burst mode \n"));
acpi_hw_low_level_write(8, ACPI_EC_BURST_ENABLE, &ec->command_addr);
status = acpi_ec_wait(ec, ACPI_EC_EVENT_OBF);
if (status){
acpi_enable_gpe(NULL, ec->gpe_bit, ACPI_NOT_ISR);
ACPI_DEBUG_PRINT((ACPI_DB_ERROR," status = %d\n", status));
return_VALUE(-EINVAL);
}
acpi_hw_low_level_read(8, &tmp, &ec->data_addr);
acpi_enable_gpe(NULL, ec->gpe_bit, ACPI_NOT_ISR);
if(tmp != 0x90 ) {/* Burst ACK byte*/
ACPI_DEBUG_PRINT((ACPI_DB_ERROR,"Ack failed \n"));
return_VALUE(-EINVAL);
}
} else
ACPI_DEBUG_PRINT((ACPI_DB_INFO,"already be in burst mode \n"));
}
atomic_set(&ec->leaving_burst , 0);
return_VALUE(0);
}
@ -202,7 +199,6 @@ acpi_ec_leave_burst_mode (
status = acpi_ec_read_status(ec);
if (status != -EINVAL &&
(status & ACPI_EC_FLAG_BURST)){
ACPI_DEBUG_PRINT((ACPI_DB_INFO,"leaving burst mode\n"));
acpi_hw_low_level_write(8, ACPI_EC_BURST_DISABLE, &ec->command_addr);
status = acpi_ec_wait(ec, ACPI_EC_FLAG_IBF);
if (status){
@ -212,14 +208,7 @@ acpi_ec_leave_burst_mode (
}
acpi_enable_gpe(NULL, ec->gpe_bit, ACPI_NOT_ISR);
status = acpi_ec_read_status(ec);
if (status != -EINVAL &&
(status & ACPI_EC_FLAG_BURST)) {
ACPI_DEBUG_PRINT((ACPI_DB_ERROR,"------->status fail\n"));
return_VALUE(-EINVAL);
}
}else
ACPI_DEBUG_PRINT((ACPI_DB_INFO,"already be in Non-burst mode \n"));
ACPI_DEBUG_PRINT((ACPI_DB_INFO,"leaving burst mode\n"));
}
return_VALUE(0);
}

34
drivers/acpi/sleep/poweroff.c
View File

@ -19,8 +19,6 @@
int acpi_sleep_prepare(u32 acpi_state)
{
/* Flag to do not allow second time invocation for S5 state */
static int shutdown_prepared = 0;
#ifdef CONFIG_ACPI_SLEEP
/* do we have a wakeup address for S2 and S3? */
/* Here, we support only S4BIOS, those we set the wakeup address */
@ -38,28 +36,23 @@ int acpi_sleep_prepare(u32 acpi_state)
acpi_enable_wakeup_device_prep(acpi_state);
#endif
if (acpi_state == ACPI_STATE_S5) {
/* Check if we were already called */
if (shutdown_prepared)
return 0;
acpi_wakeup_gpe_poweroff_prepare();
shutdown_prepared = 1;
}
acpi_enter_sleep_state_prep(acpi_state);
return 0;
}
#ifdef CONFIG_PM
void acpi_power_off(void)
{
/* acpi_sleep_prepare(ACPI_STATE_S5) should have already been called */
printk("%s called\n", __FUNCTION__);
acpi_sleep_prepare(ACPI_STATE_S5);
local_irq_disable();
/* Some SMP machines only can poweroff in boot CPU */
set_cpus_allowed(current, cpumask_of_cpu(0));
acpi_enter_sleep_state(ACPI_STATE_S5);
}
#ifdef CONFIG_PM
static int acpi_shutdown(struct sys_device *x)
{
return acpi_sleep_prepare(ACPI_STATE_S5);
@ -75,8 +68,6 @@ static struct sys_device device_acpi = {
.cls = &acpi_sysclass,
};
#endif
static int acpi_poweroff_init(void)
{
if (!acpi_disabled) {
@ -86,19 +77,18 @@ static int acpi_poweroff_init(void)
status =
acpi_get_sleep_type_data(ACPI_STATE_S5, &type_a, &type_b);
if (ACPI_SUCCESS(status)) {
pm_power_off = acpi_power_off;
#ifdef CONFIG_PM
{
int error;
error = sysdev_class_register(&acpi_sysclass);
if (!error)
error = sysdev_register(&device_acpi);
return error;
}
#endif
int error;
error = sysdev_class_register(&acpi_sysclass);
if (!error)
error = sysdev_register(&device_acpi);
if (!error)
pm_power_off = acpi_power_off;
return error;
}
}
return 0;
}
late_initcall(acpi_poweroff_init);
#endif /* CONFIG_PM */

4
drivers/atm/ambassador.c
View File

@ -794,7 +794,9 @@ static void drain_rx_pools (amb_dev * dev) {
drain_rx_pool (dev, pool);
}
static inline void fill_rx_pool (amb_dev * dev, unsigned char pool, int priority) {
static inline void fill_rx_pool (amb_dev * dev, unsigned char pool,
unsigned int __nocast priority)
{
rx_in rx;
amb_rxq * rxq;

6
drivers/atm/firestream.c
View File

@ -1374,7 +1374,8 @@ static void reset_chip (struct fs_dev *dev)
}
}
static void __devinit *aligned_kmalloc (int size, int flags, int alignment)
static void __devinit *aligned_kmalloc (int size, unsigned int __nocast flags,
int alignment)
{
void *t;
@ -1464,7 +1465,8 @@ static inline int nr_buffers_in_freepool (struct fs_dev *dev, struct freepool *f
does. I've seen "receive abort: no buffers" and things started
working again after that... -- REW */
static void top_off_fp (struct fs_dev *dev, struct freepool *fp, int gfp_flags)
static void top_off_fp (struct fs_dev *dev, struct freepool *fp,
unsigned int __nocast gfp_flags)
{
struct FS_BPENTRY *qe, *ne;
struct sk_buff *skb;

1
drivers/atm/he.c
View File

@ -57,7 +57,6 @@
#include <linux/config.h>
#include <linux/module.h>
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/skbuff.h>
#include <linux/pci.h>

3
drivers/atm/idt77252.c
View File

@ -46,6 +46,7 @@ static char const rcsid[] =
#include <linux/init.h>
#include <linux/bitops.h>
#include <linux/wait.h>
#include <linux/jiffies.h>
#include <asm/semaphore.h>
#include <asm/io.h>
#include <asm/uaccess.h>
@ -780,7 +781,7 @@ push_on_scq(struct idt77252_dev *card, struct vc_map *vc, struct sk_buff *skb)
return 0;
out:
if (jiffies - scq->trans_start > HZ) {
if (time_after(jiffies, scq->trans_start + HZ)) {
printk("%s: Error pushing TBD for %d.%d\n",
card->name, vc->tx_vcc->vpi, vc->tx_vcc->vci);
#ifdef CONFIG_ATM_IDT77252_DEBUG

109
drivers/atm/zatm.c
View File

@ -16,9 +16,9 @@
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/delay.h>
#include <linux/ioport.h> /* for request_region */
#include <linux/uio.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/atm_zatm.h>
#include <linux/capability.h>
#include <linux/bitops.h>
@ -1257,22 +1257,22 @@ static int __init zatm_init(struct atm_dev *dev)
static int __init zatm_start(struct atm_dev *dev)
{
struct zatm_dev *zatm_dev;
struct zatm_dev *zatm_dev = ZATM_DEV(dev);
struct pci_dev *pdev = zatm_dev->pci_dev;
unsigned long curr;
int pools,vccs,rx;
int error,i,ld;
int error, i, ld;
DPRINTK("zatm_start\n");
zatm_dev = ZATM_DEV(dev);
zatm_dev->rx_map = zatm_dev->tx_map = NULL;
for (i = 0; i < NR_MBX; i++)
zatm_dev->mbx_start[i] = 0;
if (request_irq(zatm_dev->irq,&zatm_int,SA_SHIRQ,DEV_LABEL,dev)) {
printk(KERN_ERR DEV_LABEL "(itf %d): IRQ%d is already in use\n",
dev->number,zatm_dev->irq);
return -EAGAIN;
for (i = 0; i < NR_MBX; i++)
zatm_dev->mbx_start[i] = 0;
error = request_irq(zatm_dev->irq, zatm_int, SA_SHIRQ, DEV_LABEL, dev);
if (error < 0) {
printk(KERN_ERR DEV_LABEL "(itf %d): IRQ%d is already in use\n",
dev->number,zatm_dev->irq);
goto done;
}
request_region(zatm_dev->base,uPD98401_PORTS,DEV_LABEL);
/* define memory regions */
pools = NR_POOLS;
if (NR_SHAPERS*SHAPER_SIZE > pools*POOL_SIZE)
@ -1299,51 +1299,66 @@ static int __init zatm_start(struct atm_dev *dev)
"%ld VCs\n",dev->number,NR_SHAPERS,pools,rx,
(zatm_dev->mem-curr*4)/VC_SIZE);
/* create mailboxes */
for (i = 0; i < NR_MBX; i++)
if (mbx_entries[i]) {
unsigned long here;
for (i = 0; i < NR_MBX; i++) {
void *mbx;
dma_addr_t mbx_dma;
here = (unsigned long) kmalloc(2*MBX_SIZE(i),
GFP_KERNEL);
if (!here) {
error = -ENOMEM;
goto out;
}
if ((here^(here+MBX_SIZE(i))) & ~0xffffUL)/* paranoia */
here = (here & ~0xffffUL)+0x10000;
zatm_dev->mbx_start[i] = here;
if ((here^virt_to_bus((void *) here)) & 0xffff) {
printk(KERN_ERR DEV_LABEL "(itf %d): system "
"bus incompatible with driver\n",
dev->number);
error = -ENODEV;
goto out;
}
DPRINTK("mbx@0x%08lx-0x%08lx\n",here,here+MBX_SIZE(i));
zatm_dev->mbx_end[i] = (here+MBX_SIZE(i)) & 0xffff;
zout(virt_to_bus((void *) here) >> 16,MSH(i));
zout(virt_to_bus((void *) here),MSL(i));
zout((here+MBX_SIZE(i)) & 0xffff,MBA(i));
zout(here & 0xffff,MTA(i));
zout(here & 0xffff,MWA(i));
if (!mbx_entries[i])
continue;
mbx = pci_alloc_consistent(pdev, 2*MBX_SIZE(i), &mbx_dma);
if (!mbx) {
error = -ENOMEM;
goto out;
}
/*
* Alignment provided by pci_alloc_consistent() isn't enough
* for this device.
*/
if (((unsigned long)mbx ^ mbx_dma) & 0xffff) {
printk(KERN_ERR DEV_LABEL "(itf %d): system "
"bus incompatible with driver\n", dev->number);
pci_free_consistent(pdev, 2*MBX_SIZE(i), mbx, mbx_dma);
error = -ENODEV;
goto out;
}
DPRINTK("mbx@0x%08lx-0x%08lx\n", mbx, mbx + MBX_SIZE(i));
zatm_dev->mbx_start[i] = (unsigned long)mbx;
zatm_dev->mbx_dma[i] = mbx_dma;
zatm_dev->mbx_end[i] = (zatm_dev->mbx_start[i] + MBX_SIZE(i)) &
0xffff;
zout(mbx_dma >> 16, MSH(i));
zout(mbx_dma, MSL(i));
zout(zatm_dev->mbx_end[i], MBA(i));
zout((unsigned long)mbx & 0xffff, MTA(i));
zout((unsigned long)mbx & 0xffff, MWA(i));
}
error = start_tx(dev);
if (error) goto out;
if (error)
goto out;
error = start_rx(dev);
if (error) goto out;
if (error)
goto out_tx;
error = dev->phy->start(dev);
if (error) goto out;
if (error)
goto out_rx;
zout(0xffffffff,IMR); /* enable interrupts */
/* enable TX & RX */
zout(zin(GMR) | uPD98401_GMR_SE | uPD98401_GMR_RE,GMR);
return 0;
out:
for (i = 0; i < NR_MBX; i++)
kfree(zatm_dev->mbx_start[i]);
kfree(zatm_dev->rx_map);
kfree(zatm_dev->tx_map);
free_irq(zatm_dev->irq, dev);
done:
return error;
out_rx:
kfree(zatm_dev->rx_map);
out_tx:
kfree(zatm_dev->tx_map);
out:
while (i-- > 0) {
pci_free_consistent(pdev, 2*MBX_SIZE(i),
(void *)zatm_dev->mbx_start[i],
zatm_dev->mbx_dma[i]);
}
free_irq(zatm_dev->irq, dev);
goto done;
}

1
drivers/atm/zatm.h
View File

@ -73,6 +73,7 @@ struct zatm_dev {
int chans; /* map size, must be 2^n */
/*-------------------------------- mailboxes */
unsigned long mbx_start[NR_MBX];/* start addresses */
dma_addr_t mbx_dma[NR_MBX];
u16 mbx_end[NR_MBX]; /* end offset (in bytes) */
/*-------------------------------- other pointers */
u32 pool_base; /* Free buffer pool dsc (word addr) */

2
drivers/char/hangcheck-timer.c
View File

@ -173,7 +173,7 @@ static void hangcheck_fire(unsigned long data)
}
if (hangcheck_reboot) {
printk(KERN_CRIT "Hangcheck: hangcheck is restarting the machine.\n");
machine_restart(NULL);
emergency_restart();
} else {
printk(KERN_CRIT "Hangcheck: hangcheck value past margin!\n");
}

2
drivers/char/sysrq.c
View File

@ -115,7 +115,7 @@ static void sysrq_handle_reboot(int key, struct pt_regs *pt_regs,
struct tty_struct *tty)
{
local_irq_enable();
machine_restart(NULL);
emergency_restart();
}
static struct sysrq_key_op sysrq_reboot_op = {

2
drivers/char/watchdog/eurotechwdt.c
View File

@ -167,7 +167,7 @@ static irqreturn_t eurwdt_interrupt(int irq, void *dev_id, struct pt_regs *regs)
printk(KERN_CRIT "Would Reboot.\n");
#else
printk(KERN_CRIT "Initiating system reboot.\n");
machine_restart(NULL);
emergency_restart();
#endif
return IRQ_HANDLED;
}

4
drivers/char/watchdog/pcwd.c
View File

@ -344,7 +344,7 @@ static int pcwd_get_status(int *status)
*status |= WDIOF_OVERHEAT;
if (temp_panic) {
printk (KERN_INFO PFX "Temperature overheat trip!\n");
machine_power_off();
kernel_power_off();
}
}
} else {
@ -355,7 +355,7 @@ static int pcwd_get_status(int *status)
*status |= WDIOF_OVERHEAT;
if (temp_panic) {
printk (KERN_INFO PFX "Temperature overheat trip!\n");
machine_power_off();
kernel_power_off();
}
}
}

2
drivers/char/watchdog/softdog.c
View File

@ -97,7 +97,7 @@ static void watchdog_fire(unsigned long data)
else
{
printk(KERN_CRIT PFX "Initiating system reboot.\n");
machine_restart(NULL);
emergency_restart();
printk(KERN_CRIT PFX "Reboot didn't ?????\n");
}
}

2
drivers/char/watchdog/wdt.c
View File

@ -266,7 +266,7 @@ static irqreturn_t wdt_interrupt(int irq, void *dev_id, struct pt_regs *regs)
printk(KERN_CRIT "Would Reboot.\n");
#else
printk(KERN_CRIT "Initiating system reboot.\n");
machine_restart(NULL);
emergency_restart();
#endif
#else
printk(KERN_CRIT "Reset in 5ms.\n");

2
drivers/char/watchdog/wdt_pci.c
View File

@ -311,7 +311,7 @@ static irqreturn_t wdtpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
printk(KERN_CRIT PFX "Would Reboot.\n");
#else
printk(KERN_CRIT PFX "Initiating system reboot.\n");
machine_restart(NULL);
emergency_restart(NULL);
#endif
#else
printk(KERN_CRIT PFX "Reset in 5ms.\n");

6
drivers/fc4/fc.c
View File

@ -365,6 +365,7 @@ void fcp_register(fc_channel *fc, u8 type, int unregister)
kfree (fc->scsi_bitmap);
kfree (fc->cmd_slots);
FCND(("Unregistering\n"));
#if 0
if (fc->rst_pkt) {
if (fc->rst_pkt->eh_state == SCSI_STATE_UNUSED)
kfree(fc->rst_pkt);
@ -373,6 +374,7 @@ void fcp_register(fc_channel *fc, u8 type, int unregister)
printk("FC: Reset in progress. Now?!");
}
}
#endif
FCND(("Unregistered\n"));
}
} else
@ -915,6 +917,7 @@ int fcp_scsi_abort(Scsi_Cmnd *SCpnt)
}
}
#if 0
void fcp_scsi_reset_done(Scsi_Cmnd *SCpnt)
{
fc_channel *fc = FC_SCMND(SCpnt);
@ -922,11 +925,13 @@ void fcp_scsi_reset_done(Scsi_Cmnd *SCpnt)
fc->rst_pkt->eh_state = SCSI_STATE_FINISHED;
up(fc->rst_pkt->device->host->eh_action);
}
#endif
#define FCP_RESET_TIMEOUT (2*HZ)
int fcp_scsi_dev_reset(Scsi_Cmnd *SCpnt)
{
#if 0 /* broken junk, but if davem wants to compile this driver, let him.. */
unsigned long flags;
fcp_cmd *cmd;
fcp_cmnd *fcmd;
@ -1000,6 +1005,7 @@ int fcp_scsi_dev_reset(Scsi_Cmnd *SCpnt)
}
fc->rst_pkt->eh_state = SCSI_STATE_UNUSED;
return SUCCESS;
#endif
}
static int __fcp_scsi_host_reset(Scsi_Cmnd *SCpnt)

19
drivers/message/fusion/mptfc.c
View File

@ -83,19 +83,6 @@ static int mptfcDoneCtx = -1;
static int mptfcTaskCtx = -1;
static int mptfcInternalCtx = -1; /* Used only for internal commands */
static struct device_attribute mptfc_queue_depth_attr = {
.attr = {
.name = "queue_depth",
.mode = S_IWUSR,
},
.store = mptscsih_store_queue_depth,
};
static struct device_attribute *mptfc_dev_attrs[] = {
&mptfc_queue_depth_attr,
NULL,
};
static struct scsi_host_template mptfc_driver_template = {
.proc_name = "mptfc",
.proc_info = mptscsih_proc_info,
@ -105,6 +92,7 @@ static struct scsi_host_template mptfc_driver_template = {
.slave_alloc = mptscsih_slave_alloc,
.slave_configure = mptscsih_slave_configure,
.slave_destroy = mptscsih_slave_destroy,
.change_queue_depth = mptscsih_change_queue_depth,
.eh_abort_handler = mptscsih_abort,
.eh_device_reset_handler = mptscsih_dev_reset,
.eh_bus_reset_handler = mptscsih_bus_reset,
@ -116,7 +104,6 @@ static struct scsi_host_template mptfc_driver_template = {
.max_sectors = 8192,
.cmd_per_lun = 7,
.use_clustering = ENABLE_CLUSTERING,
.sdev_attrs = mptfc_dev_attrs,
};
/****************************************************************************
@ -267,10 +254,6 @@ mptfc_probe(struct pci_dev *pdev, const struct pci_device_id *id)
sh->sg_tablesize = numSGE;
}
/* Set the pci device pointer in Scsi_Host structure.
*/
scsi_set_device(sh, &ioc->pcidev->dev);
spin_unlock_irqrestore(&ioc->FreeQlock, flags);
hd = (MPT_SCSI_HOST *) sh->hostdata;

47
drivers/message/fusion/mptscsih.c
View File

@ -2234,13 +2234,27 @@ mptscsih_slave_destroy(struct scsi_device *device)
}
}
static void
mptscsih_set_queue_depth(struct scsi_device *device, MPT_SCSI_HOST *hd,
VirtDevice *pTarget, int qdepth)
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
* mptscsih_change_queue_depth - This function will set a devices queue depth
* @sdev: per scsi_device pointer
* @qdepth: requested queue depth
*
* Adding support for new 'change_queue_depth' api.
*/
int
mptscsih_change_queue_depth(struct scsi_device *sdev, int qdepth)
{
MPT_SCSI_HOST *hd = (MPT_SCSI_HOST *)sdev->host->hostdata;
VirtDevice *pTarget;
int max_depth;
int tagged;
if (hd == NULL)
return 0;
if (!(pTarget = hd->Targets[sdev->id]))
return 0;
if (hd->ioc->bus_type == SCSI) {
if (pTarget->tflags & MPT_TARGET_FLAGS_VALID_INQUIRY) {
if (!(pTarget->tflags & MPT_TARGET_FLAGS_Q_YES))
@ -2264,10 +2278,10 @@ mptscsih_set_queue_depth(struct scsi_device *device, MPT_SCSI_HOST *hd,
else
tagged = MSG_SIMPLE_TAG;
scsi_adjust_queue_depth(device, tagged, qdepth);
scsi_adjust_queue_depth(sdev, tagged, qdepth);
return sdev->queue_depth;
}
/*
* OS entry point to adjust the queue_depths on a per-device basis.
* Called once per device the bus scan. Use it to force the queue_depth
@ -2317,7 +2331,7 @@ mptscsih_slave_configure(struct scsi_device *device)
mptscsih_initTarget(hd, device->channel, device->id, device->lun,
device->inquiry, device->inquiry_len );
mptscsih_set_queue_depth(device, hd, pTarget, MPT_SCSI_CMD_PER_DEV_HIGH);
mptscsih_change_queue_depth(device, MPT_SCSI_CMD_PER_DEV_HIGH);
dsprintk((MYIOC_s_INFO_FMT
"Queue depth=%d, tflags=%x\n",
@ -2337,25 +2351,6 @@ mptscsih_slave_configure(struct scsi_device *device)
return 0;
}
ssize_t
mptscsih_store_queue_depth(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
{
int depth;
struct scsi_device *sdev = to_scsi_device(dev);
MPT_SCSI_HOST *hd = (MPT_SCSI_HOST *) sdev->host->hostdata;
VirtDevice *pTarget;
depth = simple_strtoul(buf, NULL, 0);
if (depth == 0)
return -EINVAL;
pTarget = hd->Targets[sdev->id];
if (pTarget == NULL)
return -EINVAL;
mptscsih_set_queue_depth(sdev, (MPT_SCSI_HOST *) sdev->host->hostdata,
pTarget, depth);
return count;
}
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
* Private routines...
@ -5586,7 +5581,7 @@ EXPORT_SYMBOL(mptscsih_taskmgmt_complete);
EXPORT_SYMBOL(mptscsih_scandv_complete);
EXPORT_SYMBOL(mptscsih_event_process);
EXPORT_SYMBOL(mptscsih_ioc_reset);
EXPORT_SYMBOL(mptscsih_store_queue_depth);
EXPORT_SYMBOL(mptscsih_change_queue_depth);
EXPORT_SYMBOL(mptscsih_timer_expired);
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/

2
drivers/message/fusion/mptscsih.h
View File

@ -103,5 +103,5 @@ extern int mptscsih_taskmgmt_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_F
extern int mptscsih_scandv_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *r);
extern int mptscsih_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply);
extern int mptscsih_ioc_reset(MPT_ADAPTER *ioc, int post_reset);
extern ssize_t mptscsih_store_queue_depth(struct device *dev, struct device_attribute *attr, const char *buf, size_t count);
extern int mptscsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
extern void mptscsih_timer_expired(unsigned long data);

19
drivers/message/fusion/mptspi.c
View File

@ -102,19 +102,6 @@ static int mptspiDoneCtx = -1;
static int mptspiTaskCtx = -1;
static int mptspiInternalCtx = -1; /* Used only for internal commands */
static struct device_attribute mptspi_queue_depth_attr = {
.attr = {
.name = "queue_depth",
.mode = S_IWUSR,
},
.store = mptscsih_store_queue_depth,
};
static struct device_attribute *mptspi_dev_attrs[] = {
&mptspi_queue_depth_attr,
NULL,
};
static struct scsi_host_template mptspi_driver_template = {
.proc_name = "mptspi",
.proc_info = mptscsih_proc_info,
@ -124,6 +111,7 @@ static struct scsi_host_template mptspi_driver_template = {
.slave_alloc = mptscsih_slave_alloc,
.slave_configure = mptscsih_slave_configure,
.slave_destroy = mptscsih_slave_destroy,
.change_queue_depth = mptscsih_change_queue_depth,
.eh_abort_handler = mptscsih_abort,
.eh_device_reset_handler = mptscsih_dev_reset,
.eh_bus_reset_handler = mptscsih_bus_reset,
@ -135,7 +123,6 @@ static struct scsi_host_template mptspi_driver_template = {
.max_sectors = 8192,
.cmd_per_lun = 7,
.use_clustering = ENABLE_CLUSTERING,
.sdev_attrs = mptspi_dev_attrs,
};
@ -287,10 +274,6 @@ mptspi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
sh->sg_tablesize = numSGE;
}
/* Set the pci device pointer in Scsi_Host structure.
*/
scsi_set_device(sh, &ioc->pcidev->dev);
spin_unlock_irqrestore(&ioc->FreeQlock, flags);
hd = (MPT_SCSI_HOST *) sh->hostdata;

18
drivers/net/Kconfig
View File

@ -2544,9 +2544,25 @@ config SHAPER
config NETCONSOLE
tristate "Network console logging support (EXPERIMENTAL)"
depends on NETDEVICES && EXPERIMENTAL
depends on NETDEVICES && INET && EXPERIMENTAL
---help---
If you want to log kernel messages over the network, enable this.
See <file:Documentation/networking/netconsole.txt> for details.
config NETPOLL
def_bool NETCONSOLE
config NETPOLL_RX
bool "Netpoll support for trapping incoming packets"
default n
depends on NETPOLL
config NETPOLL_TRAP
bool "Netpoll traffic trapping"
default n
depends on NETPOLL
config NET_POLL_CONTROLLER
def_bool NETPOLL
endmenu

16
drivers/net/eql.c
View File

@ -132,7 +132,7 @@ static struct net_device_stats *eql_get_stats(struct net_device *dev);
#define eql_is_slave(dev) ((dev->flags & IFF_SLAVE) == IFF_SLAVE)
#define eql_is_master(dev) ((dev->flags & IFF_MASTER) == IFF_MASTER)
static void eql_kill_one_slave(slave_t *slave);
static void eql_kill_one_slave(slave_queue_t *queue, slave_t *slave);
static void eql_timer(unsigned long param)
{
@ -149,7 +149,7 @@ static void eql_timer(unsigned long param)
if (slave->bytes_queued < 0)
slave->bytes_queued = 0;
} else {
eql_kill_one_slave(slave);
eql_kill_one_slave(&eql->queue, slave);
}
}
@ -214,9 +214,10 @@ static int eql_open(struct net_device *dev)
return 0;
}
static void eql_kill_one_slave(slave_t *slave)
static void eql_kill_one_slave(slave_queue_t *queue, slave_t *slave)
{
list_del(&slave->list);
queue->num_slaves--;
slave->dev->flags &= ~IFF_SLAVE;
dev_put(slave->dev);
kfree(slave);
@ -232,8 +233,7 @@ static void eql_kill_slave_queue(slave_queue_t *queue)
list_for_each_safe(this, tmp, head) {
slave_t *s = list_entry(this, slave_t, list);
eql_kill_one_slave(s);
queue->num_slaves--;
eql_kill_one_slave(queue, s);
}
spin_unlock_bh(&queue->lock);
@ -318,7 +318,7 @@ static slave_t *__eql_schedule_slaves(slave_queue_t *queue)
}
} else {
/* We found a dead slave, kill it. */
eql_kill_one_slave(slave);
eql_kill_one_slave(queue, slave);
}
}
return best_slave;
@ -393,7 +393,7 @@ static int __eql_insert_slave(slave_queue_t *queue, slave_t *slave)
duplicate_slave = __eql_find_slave_dev(queue, slave->dev);
if (duplicate_slave != 0)
eql_kill_one_slave(duplicate_slave);
eql_kill_one_slave(queue, duplicate_slave);
list_add(&slave->list, &queue->all_slaves);
queue->num_slaves++;
@ -471,7 +471,7 @@ static int eql_emancipate(struct net_device *master_dev, slaving_request_t __use
slave_dev);
if (slave) {
eql_kill_one_slave(slave);
eql_kill_one_slave(&eql->queue, slave);
ret = 0;
}
}

3
drivers/net/pcmcia/smc91c92_cs.c
View File

@ -41,6 +41,7 @@
#include <linux/ioport.h>
#include <linux/ethtool.h>
#include <linux/mii.h>
#include <linux/jiffies.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
@ -2092,7 +2093,7 @@ static void media_check(u_long arg)
}
/* Ignore collisions unless we've had no rx's recently */
if (jiffies - dev->last_rx > HZ) {
if (time_after(jiffies, dev->last_rx + HZ)) {
if (smc->tx_err || (smc->media_status & EPH_16COL))
media |= EPH_16COL;
}

417
drivers/net/tg3.c
View File

@ -66,8 +66,8 @@
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
#define DRV_MODULE_VERSION "3.33"
#define DRV_MODULE_RELDATE "July 5, 2005"
#define DRV_MODULE_VERSION "3.34"
#define DRV_MODULE_RELDATE "July 25, 2005"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
@ -90,7 +90,7 @@
/* hardware minimum and maximum for a single frame's data payload */
#define TG3_MIN_MTU 60
#define TG3_MAX_MTU(tp) \
(!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ? 9000 : 1500)
((tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) ? 9000 : 1500)
/* These numbers seem to be hard coded in the NIC firmware somehow.
* You can't change the ring sizes, but you can change where you place
@ -221,6 +221,10 @@ static struct pci_device_id tg3_pci_tbl[] = {
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5781,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX,
@ -508,6 +512,9 @@ static void tg3_switch_clocks(struct tg3 *tp)
u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL);
u32 orig_clock_ctrl;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
return;
orig_clock_ctrl = clock_ctrl;
clock_ctrl &= (CLOCK_CTRL_FORCE_CLKRUN |
CLOCK_CTRL_CLKRUN_OENABLE |
@ -907,7 +914,7 @@ static int tg3_phy_reset(struct tg3 *tp)
if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) {
/* Cannot do read-modify-write on 5401 */
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20);
} else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) {
} else if (tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) {
u32 phy_reg;
/* Set bit 14 with read-modify-write to preserve other bits */
@ -919,7 +926,7 @@ static int tg3_phy_reset(struct tg3 *tp)
/* Set phy register 0x10 bit 0 to high fifo elasticity to support
* jumbo frames transmission.
*/
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) {
if (tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) {
u32 phy_reg;
if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg))
@ -1093,7 +1100,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
tp->link_config.orig_autoneg = tp->link_config.autoneg;
}
if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)) {
tp->link_config.speed = SPEED_10;
tp->link_config.duplex = DUPLEX_HALF;
tp->link_config.autoneg = AUTONEG_ENABLE;
@ -1145,6 +1152,8 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
CLOCK_CTRL_ALTCLK |
CLOCK_CTRL_PWRDOWN_PLL133);
udelay(40);
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
/* do nothing */
} else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) {
u32 newbits1, newbits2;
@ -1238,6 +1247,25 @@ static void tg3_setup_flow_control(struct tg3 *tp, u32 local_adv, u32 remote_adv
u32 old_tx_mode = tp->tx_mode;
if (tp->tg3_flags & TG3_FLAG_PAUSE_AUTONEG) {
/* Convert 1000BaseX flow control bits to 1000BaseT
* bits before resolving flow control.
*/
if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
local_adv &= ~(ADVERTISE_PAUSE_CAP |
ADVERTISE_PAUSE_ASYM);
remote_adv &= ~(LPA_PAUSE_CAP | LPA_PAUSE_ASYM);
if (local_adv & ADVERTISE_1000XPAUSE)
local_adv |= ADVERTISE_PAUSE_CAP;
if (local_adv & ADVERTISE_1000XPSE_ASYM)
local_adv |= ADVERTISE_PAUSE_ASYM;
if (remote_adv & LPA_1000XPAUSE)
remote_adv |= LPA_PAUSE_CAP;
if (remote_adv & LPA_1000XPAUSE_ASYM)
remote_adv |= LPA_PAUSE_ASYM;
}
if (local_adv & ADVERTISE_PAUSE_CAP) {
if (local_adv & ADVERTISE_PAUSE_ASYM) {
if (remote_adv & LPA_PAUSE_CAP)
@ -2498,12 +2526,226 @@ static int tg3_setup_fiber_phy(struct tg3 *tp, int force_reset)
return 0;
}
static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
{
int current_link_up, err = 0;
u32 bmsr, bmcr;
u16 current_speed;
u8 current_duplex;
tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
tw32_f(MAC_MODE, tp->mac_mode);
udelay(40);
tw32(MAC_EVENT, 0);
tw32_f(MAC_STATUS,
(MAC_STATUS_SYNC_CHANGED |
MAC_STATUS_CFG_CHANGED |
MAC_STATUS_MI_COMPLETION |
MAC_STATUS_LNKSTATE_CHANGED));
udelay(40);
if (force_reset)
tg3_phy_reset(tp);
current_link_up = 0;
current_speed = SPEED_INVALID;
current_duplex = DUPLEX_INVALID;
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMCR, &bmcr);
if ((tp->link_config.autoneg == AUTONEG_ENABLE) && !force_reset &&
(tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT)) {
/* do nothing, just check for link up at the end */
} else if (tp->link_config.autoneg == AUTONEG_ENABLE) {
u32 adv, new_adv;
err |= tg3_readphy(tp, MII_ADVERTISE, &adv);
new_adv = adv & ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF |
ADVERTISE_1000XPAUSE |
ADVERTISE_1000XPSE_ASYM |
ADVERTISE_SLCT);
/* Always advertise symmetric PAUSE just like copper */
new_adv |= ADVERTISE_1000XPAUSE;
if (tp->link_config.advertising & ADVERTISED_1000baseT_Half)
new_adv |= ADVERTISE_1000XHALF;
if (tp->link_config.advertising & ADVERTISED_1000baseT_Full)
new_adv |= ADVERTISE_1000XFULL;
if ((new_adv != adv) || !(bmcr & BMCR_ANENABLE)) {
tg3_writephy(tp, MII_ADVERTISE, new_adv);
bmcr |= BMCR_ANENABLE | BMCR_ANRESTART;
tg3_writephy(tp, MII_BMCR, bmcr);
tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED);
tp->tg3_flags2 |= TG3_FLG2_PHY_JUST_INITTED;
tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
return err;
}
} else {
u32 new_bmcr;
bmcr &= ~BMCR_SPEED1000;
new_bmcr = bmcr & ~(BMCR_ANENABLE | BMCR_FULLDPLX);
if (tp->link_config.duplex == DUPLEX_FULL)
new_bmcr |= BMCR_FULLDPLX;
if (new_bmcr != bmcr) {
/* BMCR_SPEED1000 is a reserved bit that needs
* to be set on write.
*/
new_bmcr |= BMCR_SPEED1000;
/* Force a linkdown */
if (netif_carrier_ok(tp->dev)) {
u32 adv;
err |= tg3_readphy(tp, MII_ADVERTISE, &adv);
adv &= ~(ADVERTISE_1000XFULL |
ADVERTISE_1000XHALF |
ADVERTISE_SLCT);
tg3_writephy(tp, MII_ADVERTISE, adv);
tg3_writephy(tp, MII_BMCR, bmcr |
BMCR_ANRESTART |
BMCR_ANENABLE);
udelay(10);
netif_carrier_off(tp->dev);
}
tg3_writephy(tp, MII_BMCR, new_bmcr);
bmcr = new_bmcr;
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
}
}
if (bmsr & BMSR_LSTATUS) {
current_speed = SPEED_1000;
current_link_up = 1;
if (bmcr & BMCR_FULLDPLX)
current_duplex = DUPLEX_FULL;
else
current_duplex = DUPLEX_HALF;
if (bmcr & BMCR_ANENABLE) {
u32 local_adv, remote_adv, common;
err |= tg3_readphy(tp, MII_ADVERTISE, &local_adv);
err |= tg3_readphy(tp, MII_LPA, &remote_adv);
common = local_adv & remote_adv;
if (common & (ADVERTISE_1000XHALF |
ADVERTISE_1000XFULL)) {
if (common & ADVERTISE_1000XFULL)
current_duplex = DUPLEX_FULL;
else
current_duplex = DUPLEX_HALF;
tg3_setup_flow_control(tp, local_adv,
remote_adv);
}
else
current_link_up = 0;
}
}
tp->mac_mode &= ~MAC_MODE_HALF_DUPLEX;
if (tp->link_config.active_duplex == DUPLEX_HALF)
tp->mac_mode |= MAC_MODE_HALF_DUPLEX;
tw32_f(MAC_MODE, tp->mac_mode);
udelay(40);
tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED);
tp->link_config.active_speed = current_speed;
tp->link_config.active_duplex = current_duplex;
if (current_link_up != netif_carrier_ok(tp->dev)) {
if (current_link_up)
netif_carrier_on(tp->dev);
else {
netif_carrier_off(tp->dev);
tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
}
tg3_link_report(tp);
}
return err;
}
static void tg3_serdes_parallel_detect(struct tg3 *tp)
{
if (tp->tg3_flags2 & TG3_FLG2_PHY_JUST_INITTED) {
/* Give autoneg time to complete. */
tp->tg3_flags2 &= ~TG3_FLG2_PHY_JUST_INITTED;
return;
}
if (!netif_carrier_ok(tp->dev) &&
(tp->link_config.autoneg == AUTONEG_ENABLE)) {
u32 bmcr;
tg3_readphy(tp, MII_BMCR, &bmcr);
if (bmcr & BMCR_ANENABLE) {
u32 phy1, phy2;
/* Select shadow register 0x1f */
tg3_writephy(tp, 0x1c, 0x7c00);
tg3_readphy(tp, 0x1c, &phy1);
/* Select expansion interrupt status register */
tg3_writephy(tp, 0x17, 0x0f01);
tg3_readphy(tp, 0x15, &phy2);
tg3_readphy(tp, 0x15, &phy2);
if ((phy1 & 0x10) && !(phy2 & 0x20)) {
/* We have signal detect and not receiving
* config code words, link is up by parallel
* detection.
*/
bmcr &= ~BMCR_ANENABLE;
bmcr |= BMCR_SPEED1000 | BMCR_FULLDPLX;
tg3_writephy(tp, MII_BMCR, bmcr);
tp->tg3_flags2 |= TG3_FLG2_PARALLEL_DETECT;
}
}
}
else if (netif_carrier_ok(tp->dev) &&
(tp->link_config.autoneg == AUTONEG_ENABLE) &&
(tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT)) {
u32 phy2;
/* Select expansion interrupt status register */
tg3_writephy(tp, 0x17, 0x0f01);
tg3_readphy(tp, 0x15, &phy2);
if (phy2 & 0x20) {
u32 bmcr;
/* Config code words received, turn on autoneg. */
tg3_readphy(tp, MII_BMCR, &bmcr);
tg3_writephy(tp, MII_BMCR, bmcr | BMCR_ANENABLE);
tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
}
}
}
static int tg3_setup_phy(struct tg3 *tp, int force_reset)
{
int err;
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
err = tg3_setup_fiber_phy(tp, force_reset);
} else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
err = tg3_setup_fiber_mii_phy(tp, force_reset);
} else {
err = tg3_setup_copper_phy(tp, force_reset);
}
@ -2612,7 +2854,7 @@ static int tg3_alloc_rx_skb(struct tg3 *tp, u32 opaque_key,
map = &tp->rx_std_buffers[dest_idx];
if (src_idx >= 0)
src_map = &tp->rx_std_buffers[src_idx];
skb_size = RX_PKT_BUF_SZ;
skb_size = tp->rx_pkt_buf_sz;
break;
case RXD_OPAQUE_RING_JUMBO:
@ -3434,10 +3676,18 @@ static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp,
{
dev->mtu = new_mtu;
if (new_mtu > ETH_DATA_LEN)
tp->tg3_flags |= TG3_FLAG_JUMBO_ENABLE;
else
tp->tg3_flags &= ~TG3_FLAG_JUMBO_ENABLE;
if (new_mtu > ETH_DATA_LEN) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE;
ethtool_op_set_tso(dev, 0);
}
else
tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE;
} else {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE;
tp->tg3_flags &= ~TG3_FLAG_JUMBO_RING_ENABLE;
}
}
static int tg3_change_mtu(struct net_device *dev, int new_mtu)
@ -3491,7 +3741,7 @@ static void tg3_free_rings(struct tg3 *tp)
continue;
pci_unmap_single(tp->pdev,
pci_unmap_addr(rxp, mapping),
RX_PKT_BUF_SZ - tp->rx_offset,
tp->rx_pkt_buf_sz - tp->rx_offset,
PCI_DMA_FROMDEVICE);
dev_kfree_skb_any(rxp->skb);
rxp->skb = NULL;
@ -3564,6 +3814,11 @@ static void tg3_init_rings(struct tg3 *tp)
memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
memset(tp->tx_ring, 0, TG3_TX_RING_BYTES);
tp->rx_pkt_buf_sz = RX_PKT_BUF_SZ;
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) &&
(tp->dev->mtu > ETH_DATA_LEN))
tp->rx_pkt_buf_sz = RX_JUMBO_PKT_BUF_SZ;
/* Initialize invariants of the rings, we only set this
* stuff once. This works because the card does not
* write into the rx buffer posting rings.
@ -3572,14 +3827,14 @@ static void tg3_init_rings(struct tg3 *tp)
struct tg3_rx_buffer_desc *rxd;
rxd = &tp->rx_std[i];
rxd->idx_len = (RX_PKT_BUF_SZ - tp->rx_offset - 64)
rxd->idx_len = (tp->rx_pkt_buf_sz - tp->rx_offset - 64)
<< RXD_LEN_SHIFT;
rxd->type_flags = (RXD_FLAG_END << RXD_FLAGS_SHIFT);
rxd->opaque = (RXD_OPAQUE_RING_STD |
(i << RXD_OPAQUE_INDEX_SHIFT));
}
if (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) {
if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) {
for (i = 0; i < TG3_RX_JUMBO_RING_SIZE; i++) {
struct tg3_rx_buffer_desc *rxd;
@ -3600,7 +3855,7 @@ static void tg3_init_rings(struct tg3 *tp)
break;
}
if (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) {
if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) {
for (i = 0; i < tp->rx_jumbo_pending; i++) {
if (tg3_alloc_rx_skb(tp, RXD_OPAQUE_RING_JUMBO,
-1, i) < 0)
@ -4056,7 +4311,30 @@ static int tg3_chip_reset(struct tg3 *tp)
val &= ~PCIX_CAPS_RELAXED_ORDERING;
pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
u32 val;
/* Chip reset on 5780 will reset MSI enable bit,
* so need to restore it.
*/
if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
u16 ctrl;
pci_read_config_word(tp->pdev,
tp->msi_cap + PCI_MSI_FLAGS,
&ctrl);
pci_write_config_word(tp->pdev,
tp->msi_cap + PCI_MSI_FLAGS,
ctrl | PCI_MSI_FLAGS_ENABLE);
val = tr32(MSGINT_MODE);
tw32(MSGINT_MODE, val | MSGINT_MODE_ENABLE);
}
val = tr32(MEMARB_MODE);
tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE);
} else
tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A3) {
tg3_stop_fw(tp);
@ -4082,6 +4360,9 @@ static int tg3_chip_reset(struct tg3 *tp)
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
tp->mac_mode = MAC_MODE_PORT_MODE_TBI;
tw32_f(MAC_MODE, tp->mac_mode);
} else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
tp->mac_mode = MAC_MODE_PORT_MODE_GMII;
tw32_f(MAC_MODE, tp->mac_mode);
} else
tw32_f(MAC_MODE, 0);
udelay(40);
@ -5245,7 +5526,7 @@ static int tg3_reset_hw(struct tg3 *tp)
}
#endif
if (!(tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE)) {
if (tp->dev->mtu <= ETH_DATA_LEN) {
tw32(BUFMGR_MB_RDMA_LOW_WATER,
tp->bufmgr_config.mbuf_read_dma_low_water);
tw32(BUFMGR_MB_MACRX_LOW_WATER,
@ -5320,7 +5601,7 @@ static int tg3_reset_hw(struct tg3 *tp)
/* Setup replenish threshold. */
tw32(RCVBDI_JUMBO_THRESH, tp->rx_jumbo_pending / 8);
if (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) {
if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) {
tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH,
((u64) tp->rx_jumbo_mapping >> 32));
tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW,
@ -5381,7 +5662,7 @@ static int tg3_reset_hw(struct tg3 *tp)
tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW,
tp->rx_std_ptr);
tp->rx_jumbo_ptr = (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) ?
tp->rx_jumbo_ptr = (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) ?
tp->rx_jumbo_pending : 0;
tw32_rx_mbox(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW,
tp->rx_jumbo_ptr);
@ -5683,7 +5964,8 @@ static int tg3_reset_hw(struct tg3 *tp)
tw32(MAC_RCV_RULE_1, 0x86000004 & RCV_RULE_DISABLE_MASK);
tw32(MAC_RCV_VALUE_1, 0xffffffff & RCV_RULE_DISABLE_MASK);
if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
(GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5780))
limit = 8;
else
limit = 16;
@ -5865,7 +6147,8 @@ static void tg3_timer(unsigned long __opaque)
udelay(40);
tg3_setup_phy(tp, 0);
}
}
} else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
tg3_serdes_parallel_detect(tp);
tp->timer_counter = tp->timer_multiplier;
}
@ -8569,8 +8852,12 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
eeprom_phy_id = 0;
tp->phy_id = eeprom_phy_id;
if (eeprom_phy_serdes)
tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
if (eeprom_phy_serdes) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
else
tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
}
if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK |
@ -8705,7 +8992,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
}
}
if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) &&
if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) &&
!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
u32 bmsr, adv_reg, tg3_ctrl;
@ -8758,7 +9045,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
err = tg3_init_5401phy_dsp(tp);
}
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)
tp->link_config.advertising =
(ADVERTISED_1000baseT_Half |
ADVERTISED_1000baseT_Full |
@ -8928,6 +9215,10 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW)
tp->pci_chip_rev_id = CHIPREV_ID_5752_A0;
/* Find msi capability. */
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI);
/* Initialize misc host control in PCI block. */
tp->misc_host_ctrl |= (misc_ctrl_reg &
MISC_HOST_CTRL_CHIPREV);
@ -8943,7 +9234,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
@ -8953,6 +9245,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
tp->tg3_flags2 |= TG3_FLG2_HW_TSO;
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752)
tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE;
if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0)
tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
@ -9079,8 +9376,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
/* Derive initial jumbo mode from MTU assigned in
* ether_setup() via the alloc_etherdev() call
*/
if (tp->dev->mtu > ETH_DATA_LEN)
tp->tg3_flags |= TG3_FLAG_JUMBO_ENABLE;
if (tp->dev->mtu > ETH_DATA_LEN &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5780)
tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE;
/* Determine WakeOnLan speed to use. */
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
@ -9096,7 +9394,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) ||
((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) &&
(tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) &&
(tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)))
(tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)) ||
(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES))
tp->tg3_flags2 |= TG3_FLG2_NO_ETH_WIRE_SPEED;
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5703_AX ||
@ -9305,8 +9604,9 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
#endif
mac_offset = 0x7c;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
!(tp->tg3_flags & TG3_FLG2_SUN_570X)) {
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
!(tp->tg3_flags & TG3_FLG2_SUN_570X)) ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID)
mac_offset = 0xcc;
if (tg3_nvram_lock(tp))
@ -9620,6 +9920,9 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
/* Set bit 23 to enable PCIX hw bug fix */
tp->dma_rwctrl |= 0x009f0000;
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
/* 5780 always in PCIX mode */
tp->dma_rwctrl |= 0x00144000;
} else {
tp->dma_rwctrl |= 0x001b000f;
}
@ -9773,19 +10076,35 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
{
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER;
tp->bufmgr_config.mbuf_mac_rx_low_water =
DEFAULT_MB_MACRX_LOW_WATER;
tp->bufmgr_config.mbuf_high_water =
DEFAULT_MB_HIGH_WATER;
if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER_5705;
tp->bufmgr_config.mbuf_mac_rx_low_water =
DEFAULT_MB_MACRX_LOW_WATER_5705;
tp->bufmgr_config.mbuf_high_water =
DEFAULT_MB_HIGH_WATER_5705;
tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
DEFAULT_MB_RDMA_LOW_WATER_JUMBO;
tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
DEFAULT_MB_MACRX_LOW_WATER_JUMBO;
tp->bufmgr_config.mbuf_high_water_jumbo =
DEFAULT_MB_HIGH_WATER_JUMBO;
tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780;
tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780;
tp->bufmgr_config.mbuf_high_water_jumbo =
DEFAULT_MB_HIGH_WATER_JUMBO_5780;
} else {
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER;
tp->bufmgr_config.mbuf_mac_rx_low_water =
DEFAULT_MB_MACRX_LOW_WATER;
tp->bufmgr_config.mbuf_high_water =
DEFAULT_MB_HIGH_WATER;
tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
DEFAULT_MB_RDMA_LOW_WATER_JUMBO;
tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
DEFAULT_MB_MACRX_LOW_WATER_JUMBO;
tp->bufmgr_config.mbuf_high_water_jumbo =
DEFAULT_MB_HIGH_WATER_JUMBO;
}
tp->bufmgr_config.dma_low_water = DEFAULT_DMA_LOW_WATER;
tp->bufmgr_config.dma_high_water = DEFAULT_DMA_HIGH_WATER;
@ -9803,6 +10122,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
case PHY_ID_BCM5705: return "5705";
case PHY_ID_BCM5750: return "5750";
case PHY_ID_BCM5752: return "5752";
case PHY_ID_BCM5780: return "5780";
case PHY_ID_BCM8002: return "8002/serdes";
case 0: return "serdes";
default: return "unknown";
@ -9998,8 +10318,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
tg3_init_link_config(tp);
tg3_init_bufmgr_config(tp);
tp->rx_pending = TG3_DEF_RX_RING_PENDING;
tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING;
tp->tx_pending = TG3_DEF_TX_RING_PENDING;
@ -10028,14 +10346,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
goto err_out_iounmap;
}
if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER_5705;
tp->bufmgr_config.mbuf_mac_rx_low_water =
DEFAULT_MB_MACRX_LOW_WATER_5705;
tp->bufmgr_config.mbuf_high_water =
DEFAULT_MB_HIGH_WATER_5705;
}
tg3_init_bufmgr_config(tp);
#if TG3_TSO_SUPPORT != 0
if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) {

15
drivers/net/tg3.h
View File

@ -136,6 +136,7 @@
#define ASIC_REV_5705 0x03
#define ASIC_REV_5750 0x04
#define ASIC_REV_5752 0x06
#define ASIC_REV_5780 0x08
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
#define CHIPREV_5700_AX 0x70
#define CHIPREV_5700_BX 0x71
@ -984,14 +985,17 @@
#define DEFAULT_MB_RDMA_LOW_WATER 0x00000050
#define DEFAULT_MB_RDMA_LOW_WATER_5705 0x00000000
#define DEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130
#define DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780 0x00000000
#define BUFMGR_MB_MACRX_LOW_WATER 0x00004414
#define DEFAULT_MB_MACRX_LOW_WATER 0x00000020
#define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010
#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098
#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b
#define BUFMGR_MB_HIGH_WATER 0x00004418
#define DEFAULT_MB_HIGH_WATER 0x00000060
#define DEFAULT_MB_HIGH_WATER_5705 0x00000060
#define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c
#define DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096
#define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c
#define BUFMGR_MB_ALLOC_BIT 0x10000000
#define BUFMGR_RX_MB_ALLOC_RESP 0x00004420
@ -2087,6 +2091,8 @@ struct tg3 {
struct tg3_rx_buffer_desc *rx_rcb;
dma_addr_t rx_rcb_mapping;
u32 rx_pkt_buf_sz;
/* begin "everything else" cacheline(s) section */
struct net_device_stats net_stats;
struct net_device_stats net_stats_prev;
@ -2124,7 +2130,7 @@ struct tg3 {
#define TG3_FLAG_NO_TX_PSEUDO_CSUM 0x00100000
#define TG3_FLAG_NO_RX_PSEUDO_CSUM 0x00200000
#define TG3_FLAG_SERDES_WOL_CAP 0x00400000
#define TG3_FLAG_JUMBO_ENABLE 0x00800000
#define TG3_FLAG_JUMBO_RING_ENABLE 0x00800000
#define TG3_FLAG_10_100_ONLY 0x01000000
#define TG3_FLAG_PAUSE_AUTONEG 0x02000000
#define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000
@ -2154,6 +2160,11 @@ struct tg3 {
#define TG3_FLG2_5750_PLUS 0x00080000
#define TG3_FLG2_PROTECTED_NVRAM 0x00100000
#define TG3_FLG2_USING_MSI 0x00200000
#define TG3_FLG2_JUMBO_CAPABLE 0x00400000
#define TG3_FLG2_MII_SERDES 0x00800000
#define TG3_FLG2_ANY_SERDES (TG3_FLG2_PHY_SERDES | \
TG3_FLG2_MII_SERDES)
#define TG3_FLG2_PARALLEL_DETECT 0x01000000
u32 split_mode_max_reqs;
#define SPLIT_MODE_5704_MAX_REQ 3
@ -2187,6 +2198,7 @@ struct tg3 {
u8 pci_bist;
int pm_cap;
int msi_cap;
/* PHY info */
u32 phy_id;
@ -2200,6 +2212,7 @@ struct tg3 {
#define PHY_ID_BCM5705 0x600081a0
#define PHY_ID_BCM5750 0x60008180
#define PHY_ID_BCM5752 0x60008100
#define PHY_ID_BCM5780 0x60008350
#define PHY_ID_BCM8002 0x60010140
#define PHY_ID_INVALID 0xffffffff
#define PHY_ID_REV_MASK 0x0000000f

7
drivers/net/wan/sdla_fr.c
View File

@ -152,6 +152,7 @@
#include <asm/io.h> /* for inb(), outb(), etc. */
#include <linux/time.h> /* for do_gettimeofday */
#include <linux/in.h> /* sockaddr_in */
#include <linux/jiffies.h> /* time_after() macro */
#include <asm/errno.h>
#include <linux/ip.h>
@ -773,7 +774,7 @@ static int update(struct wan_device* wandev)
for(;;) {
if(card->u.f.update_comms_stats == 0)
break;
if ((jiffies - timeout) > (1 * HZ)){
if (time_after(jiffies, timeout + 1 * HZ)){
card->u.f.update_comms_stats = 0;
return -EAGAIN;
}
@ -4799,7 +4800,7 @@ static void trigger_unconfig_fr(struct net_device *dev)
{
fr_channel_t *chan = dev->priv;
volatile sdla_t *card = chan->card;
u32 timeout;
unsigned long timeout;
fr508_flags_t* flags = card->flags;
int reset_critical=0;
@ -4821,7 +4822,7 @@ static void trigger_unconfig_fr(struct net_device *dev)
if(!(card->u.f.timer_int_enabled & TMR_INT_ENABLED_UNCONFIG))
break;
if ((jiffies - timeout) > (1 * HZ)){
if (time_after(jiffies, timeout + 1 * HZ)){
card->u.f.timer_int_enabled &= ~TMR_INT_ENABLED_UNCONFIG;
printk(KERN_INFO "%s: Failed to delete DLCI %i\n",
card->devname,chan->dlci);

3
drivers/net/wan/sdla_ft1.c
View File

@ -29,6 +29,7 @@
#include <linux/wanrouter.h> /* WAN router definitions */
#include <linux/wanpipe.h> /* WANPIPE common user API definitions */
#include <linux/if_arp.h> /* ARPHRD_* defines */
#include <linux/jiffies.h> /* time_after() macro */
#include <linux/inetdevice.h>
#include <asm/uaccess.h>
@ -164,7 +165,7 @@ int wpft1_init (sdla_t* card, wandev_conf_t* conf)
timeout = jiffies;
while (mb->return_code != 'I') /* Wait 1s for board to initialize */
if ((jiffies - timeout) > 1*HZ) break;
if (time_after(jiffies, timeout + 1*HZ)) break;
if (mb->return_code != 'I') {
printk(KERN_INFO

3
drivers/net/wan/sdla_ppp.c
View File

@ -101,6 +101,7 @@
#include <linux/if_arp.h> /* ARPHRD_* defines */
#include <asm/byteorder.h> /* htons(), etc. */
#include <linux/in.h> /* sockaddr_in */
#include <linux/jiffies.h> /* time_after() macro */
#include <asm/uaccess.h>
@ -482,7 +483,7 @@ static int update(struct wan_device *wandev)
if(ppp_priv_area->update_comms_stats == 0){
break;
}
if ((jiffies - timeout) > (1 * HZ)){
if (time_after(jiffies, timeout + 1 * HZ)){
ppp_priv_area->update_comms_stats = 0;
ppp_priv_area->timer_int_enabled &=
~TMR_INT_ENABLED_UPDATE;

3
drivers/net/wan/sdla_x25.c
View File

@ -91,6 +91,7 @@
#include <linux/wanrouter.h> /* WAN router definitions */
#include <linux/wanpipe.h> /* WANPIPE common user API definitions */
#include <linux/workqueue.h>
#include <linux/jiffies.h> /* time_after() macro */
#include <asm/byteorder.h> /* htons(), etc. */
#include <asm/atomic.h>
#include <linux/delay.h> /* Experimental delay */
@ -867,7 +868,7 @@ static int update(struct wan_device* wandev)
if (!(card->u.x.timer_int_enabled & TMR_INT_ENABLED_UPDATE)){
break;
}
if ((jiffies-timeout) > 1*HZ){
if (time_after(jiffies, timeout + 1*HZ)){
card->u.x.timer_int_enabled &= ~TMR_INT_ENABLED_UPDATE;
return -EAGAIN;
}

9
drivers/net/wan/wanpipe_multppp.c
View File

@ -26,6 +26,7 @@
#include <linux/wanrouter.h> /* WAN router definitions */
#include <linux/wanpipe.h> /* WANPIPE common user API definitions */
#include <linux/if_arp.h> /* ARPHRD_* defines */
#include <linux/jiffies.h> /* time_after() macro */
#include <linux/in.h> /* sockaddr_in */
#include <linux/inet.h>
@ -270,9 +271,9 @@ int wsppp_init (sdla_t* card, wandev_conf_t* conf)
ready to accept commands. We expect this to be completed in less
than 1 second. */
timeout = jiffies;
timeout = jiffies + 1 * HZ;
while (mb->return_code != 'I') /* Wait 1s for board to initialize */
if ((jiffies - timeout) > 1*HZ) break;
if (time_after(jiffies, timeout)) break;
if (mb->return_code != 'I') {
printk(KERN_INFO
@ -493,11 +494,11 @@ static int update(struct wan_device* wandev)
chdlc_priv_area->timer_int_enabled = TMR_INT_ENABLED_UPDATE;
/* wait a maximum of 1 second for the statistics to be updated */
timeout = jiffies;
timeout = jiffies + 1 * HZ;
for(;;) {
if(chdlc_priv_area->update_comms_stats == 0)
break;
if ((jiffies - timeout) > (1 * HZ)){
if (time_after(jiffies, timeout)){
chdlc_priv_area->update_comms_stats = 0;
chdlc_priv_area->timer_int_enabled &=
~TMR_INT_ENABLED_UPDATE;

19
drivers/pcmcia/sa1100_jornada720.c
View File

@ -30,20 +30,9 @@ static int jornada720_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
*/
GRER |= 0x00000002;
/* Set GPIO_A<3:1> to be outputs for PCMCIA/CF power controller: */
PA_DDR = 0;
PA_DWR = 0;
PA_SDR = 0;
PA_SSR = 0;
PB_DDR = 0;
PB_DWR = 0x01;
PB_SDR = 0;
PB_SSR = 0;
PC_DDR = 0x88;
PC_DWR = 0x20;
PC_SDR = 0;
PC_SSR = 0;
sa1111_set_io_dir(SA1111_DEV(skt->dev), GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0, 0);
sa1111_set_io(SA1111_DEV(skt->dev), GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
sa1111_set_sleep_io(SA1111_DEV(skt->dev), GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
return sa1111_pcmcia_hw_init(skt);
}
@ -95,7 +84,7 @@ printk("%s(): config socket %d vcc %d vpp %d\n", __FUNCTION__,
unsigned long flags;
local_irq_save(flags);
PA_DWR = (PA_DWR & ~pa_dwr_mask) | pa_dwr_set;
sa1111_set_io(SA1111_DEV(skt->dev), pa_dwr_mask, pa_dwr_set);
local_irq_restore(flags);
}

14
drivers/sbus/char/Kconfig
View File

@ -71,20 +71,6 @@ config SUN_JSFLASH
# XXX Why don't we do "source drivers/char/Config.in" somewhere?
# no shit
config APM_RTC_IS_GMT
bool
depends on EXPERIMENTAL && SPARC32 && PCI
default y
help
Say Y here if your RTC (Real Time Clock a.k.a. hardware clock)
stores the time in GMT (Greenwich Mean Time). Say N if your RTC
stores localtime.
It is in fact recommended to store GMT in your RTC, because then you
don't have to worry about daylight savings time changes. The only
reason not to use GMT in your RTC is if you also run a broken OS
that doesn't understand GMT.
config RTC
tristate "PC-style Real Time Clock Support"
depends on PCI && EXPERIMENTAL && SPARC32

6
drivers/sbus/char/aurora.c
View File

@ -1515,8 +1515,7 @@ static void aurora_close(struct tty_struct * tty, struct file * filp)
*/
timeout = jiffies+HZ;
while(port->SRER & SRER_TXEMPTY) {
current->state = TASK_INTERRUPTIBLE;
schedule_timeout(port->timeout);
msleep_interruptible(jiffies_to_msecs(port->timeout));
if (time_after(jiffies, timeout))
break;
}
@ -1533,8 +1532,7 @@ static void aurora_close(struct tty_struct * tty, struct file * filp)
port->tty = 0;
if (port->blocked_open) {
if (port->close_delay) {
current->state = TASK_INTERRUPTIBLE;
schedule_timeout(port->close_delay);
msleep_interruptible(jiffies_to_msecs(port->close_delay));
}
wake_up_interruptible(&port->open_wait);
}

3
drivers/sbus/char/bbc_envctrl.c
View File

@ -4,13 +4,14 @@
* Copyright (C) 2001 David S. Miller (davem@redhat.com)
*/
#define __KERNEL_SYSCALLS__
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <asm/oplib.h>
#include <asm/ebus.h>
#define __KERNEL_SYSCALLS__
static int errno;
#include <asm/unistd.h>

10
drivers/sbus/char/envctrl.c
View File

@ -19,6 +19,8 @@
* Daniele Bellucci <bellucda@tiscali.it>
*/
#define __KERNEL_SYSCALLS__
#include <linux/config.h>
#include <linux/module.h>
#include <linux/sched.h>
@ -35,7 +37,6 @@
#include <asm/uaccess.h>
#include <asm/envctrl.h>
#define __KERNEL_SYSCALLS__
static int errno;
#include <asm/unistd.h>
@ -1007,7 +1008,7 @@ static int kenvctrld(void *__unused)
return -ENODEV;
}
poll_interval = 5 * HZ; /* TODO env_mon_interval */
poll_interval = 5000; /* TODO env_mon_interval */
daemonize("kenvctrld");
allow_signal(SIGKILL);
@ -1016,10 +1017,7 @@ static int kenvctrld(void *__unused)
printk(KERN_INFO "envctrl: %s starting...\n", current->comm);
for (;;) {
current->state = TASK_INTERRUPTIBLE;
schedule_timeout(poll_interval);
if(signal_pending(current))
if(msleep_interruptible(poll_interval))
break;
for (whichcpu = 0; whichcpu < ENVCTRL_MAX_CPU; ++whichcpu) {

8
drivers/sbus/char/vfc_i2c.c
View File

@ -88,14 +88,16 @@ void vfc_i2c_delay_wakeup(struct vfc_dev *dev)
void vfc_i2c_delay_no_busy(struct vfc_dev *dev, unsigned long usecs)
{
DEFINE_WAIT(wait);
init_timer(&dev->poll_timer);
dev->poll_timer.expires = jiffies +
((unsigned long)usecs*(HZ))/1000000;
dev->poll_timer.expires = jiffies + usecs_to_jiffies(usecs);
dev->poll_timer.data=(unsigned long)dev;
dev->poll_timer.function=(void *)(unsigned long)vfc_i2c_delay_wakeup;
add_timer(&dev->poll_timer);
sleep_on(&dev->poll_wait);
prepare_to_wait(&dev->poll_wait, &wait, TASK_UNINTERRUPTIBLE);
schedule();
del_timer(&dev->poll_timer);
finish_wait(&dev->poll_wait, &wait);
}
void inline vfc_i2c_delay(struct vfc_dev *dev)

8
drivers/scsi/aacraid/README
View File

@ -13,6 +13,7 @@ Supported Cards/Chipsets
Adaptec 2020S
Adaptec 2025S
Adaptec 2120S
Adaptec 2130S
Adaptec 2200S
Adaptec 2230S
Adaptec 2240S
@ -35,6 +36,13 @@ Supported Cards/Chipsets
HP NetRAID-4M
Legend S220
Legend S230
IBM ServeRAID 8i
ICP 9014R0
ICP 9024R0
ICP 9047MA
ICP 9087MA
ICP 9085LI
ICP 5085AU
People
-------------------------

2
drivers/scsi/aacraid/TODO
View File

@ -1,6 +1,4 @@
o Testing
o More testing
o Feature request: display the firmware/bios/etc revisions in the
/proc info
o Drop irq_mask, basically unused
o I/O size increase

44
drivers/scsi/aacraid/aachba.c
View File

@ -276,7 +276,6 @@ int aac_get_containers(struct aac_dev *dev)
if (maximum_num_containers < MAXIMUM_NUM_CONTAINERS)
maximum_num_containers = MAXIMUM_NUM_CONTAINERS;
fsa_dev_ptr = (struct fsa_dev_info *) kmalloc(
sizeof(*fsa_dev_ptr) * maximum_num_containers, GFP_KERNEL);
if (!fsa_dev_ptr) {
@ -527,6 +526,11 @@ static char *container_types[] = {
"V-MIRRORS",
"PSEUDO R4",
"RAID50",
"RAID5D",
"RAID5D0",
"RAID1E",
"RAID6",
"RAID60",
"Unknown"
};
@ -610,7 +614,9 @@ int aac_get_adapter_info(struct aac_dev* dev)
struct fib* fibptr;
int rcode;
u32 tmp;
struct aac_adapter_info * info;
struct aac_adapter_info *info;
struct aac_bus_info *command;
struct aac_bus_info_response *bus_info;
if (!(fibptr = fib_alloc(dev)))
return -ENOMEM;
@ -655,6 +661,36 @@ int aac_get_adapter_info(struct aac_dev* dev)
memcpy(&dev->supplement_adapter_info, info, sizeof(*info));
}
/*
* GetBusInfo
*/
fib_init(fibptr);
bus_info = (struct aac_bus_info_response *) fib_data(fibptr);
memset(bus_info, 0, sizeof(*bus_info));
command = (struct aac_bus_info *)bus_info;
command->Command = cpu_to_le32(VM_Ioctl);
command->ObjType = cpu_to_le32(FT_DRIVE);
command->MethodId = cpu_to_le32(1);
command->CtlCmd = cpu_to_le32(GetBusInfo);
rcode = fib_send(ContainerCommand,
fibptr,
sizeof (*bus_info),
FsaNormal,
1, 1,
NULL, NULL);
if (rcode >= 0 && le32_to_cpu(bus_info->Status) == ST_OK) {
dev->maximum_num_physicals = le32_to_cpu(bus_info->TargetsPerBus);
dev->maximum_num_channels = le32_to_cpu(bus_info->BusCount);
}
tmp = le32_to_cpu(dev->adapter_info.kernelrev);
printk(KERN_INFO "%s%d: kernel %d.%d-%d[%d] %.*s\n",
dev->name,
@ -1818,7 +1854,9 @@ static int aac_send_srb_fib(struct scsi_cmnd* scsicmd)
u32 flag;
u32 timeout;
if( scsicmd->device->id > 15 || scsicmd->device->lun > 7) {
dev = (struct aac_dev *)scsicmd->device->host->hostdata;
if (scsicmd->device->id >= dev->maximum_num_physicals ||
scsicmd->device->lun > 7) {
scsicmd->result = DID_NO_CONNECT << 16;
scsicmd->scsi_done(scsicmd);
return 0;

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