mirror of https://gitee.com/openkylin/linux.git
[media] v4l: vsp1: Move format info to vsp1_pipe.c
Format information and the related helper function are not specific to the V4L2 API, move them from vsp1_video.c to vsp1_pipe.c. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Laurent Pinchart
Mauro Carvalho Chehab
parent
f74be41221
commit
c618b185fd
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@ -25,6 +25,136 @@
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#include "vsp1_rwpf.h"
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#include "vsp1_uds.h"
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/* -----------------------------------------------------------------------------
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* Helper Functions
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*/
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static const struct vsp1_format_info vsp1_video_formats[] = {
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{ V4L2_PIX_FMT_RGB332, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 8, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_ARGB444, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_XRGB444, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_XRGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_ARGB555, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_XRGB555, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_XRGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_RGB565, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_BGR24, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_BGR_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 24, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_RGB24, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 24, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_ABGR32, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS,
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1, { 32, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_XBGR32, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS,
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1, { 32, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_ARGB32, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 32, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_XRGB32, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 32, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_UYVY, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 16, 0, 0 }, false, false, 2, 1, false },
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{ V4L2_PIX_FMT_VYUY, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 16, 0, 0 }, false, true, 2, 1, false },
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{ V4L2_PIX_FMT_YUYV, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 16, 0, 0 }, true, false, 2, 1, false },
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{ V4L2_PIX_FMT_YVYU, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 16, 0, 0 }, true, true, 2, 1, false },
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{ V4L2_PIX_FMT_NV12M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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2, { 8, 16, 0 }, false, false, 2, 2, false },
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{ V4L2_PIX_FMT_NV21M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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2, { 8, 16, 0 }, false, true, 2, 2, false },
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{ V4L2_PIX_FMT_NV16M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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2, { 8, 16, 0 }, false, false, 2, 1, false },
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{ V4L2_PIX_FMT_NV61M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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2, { 8, 16, 0 }, false, true, 2, 1, false },
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{ V4L2_PIX_FMT_YUV420M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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3, { 8, 8, 8 }, false, false, 2, 2, false },
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{ V4L2_PIX_FMT_YVU420M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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3, { 8, 8, 8 }, false, true, 2, 2, false },
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{ V4L2_PIX_FMT_YUV422M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_U_V_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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3, { 8, 8, 8 }, false, false, 2, 1, false },
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{ V4L2_PIX_FMT_YVU422M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_U_V_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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3, { 8, 8, 8 }, false, true, 2, 1, false },
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{ V4L2_PIX_FMT_YUV444M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_U_V_444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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3, { 8, 8, 8 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_YVU444M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_U_V_444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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3, { 8, 8, 8 }, false, true, 1, 1, false },
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};
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/*
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* vsp1_get_format_info - Retrieve format information for a 4CC
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* @fourcc: the format 4CC
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*
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* Return a pointer to the format information structure corresponding to the
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* given V4L2 format 4CC, or NULL if no corresponding format can be found.
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*/
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const struct vsp1_format_info *vsp1_get_format_info(u32 fourcc)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(vsp1_video_formats); ++i) {
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const struct vsp1_format_info *info = &vsp1_video_formats[i];
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if (info->fourcc == fourcc)
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return info;
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}
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return NULL;
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}
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/* -----------------------------------------------------------------------------
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* Pipeline Management
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*/
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@ -21,6 +21,33 @@
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struct vsp1_rwpf;
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/*
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* struct vsp1_format_info - VSP1 video format description
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* @mbus: media bus format code
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* @fourcc: V4L2 pixel format FCC identifier
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* @planes: number of planes
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* @bpp: bits per pixel
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* @hwfmt: VSP1 hardware format
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* @swap_yc: the Y and C components are swapped (Y comes before C)
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* @swap_uv: the U and V components are swapped (V comes before U)
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* @hsub: horizontal subsampling factor
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* @vsub: vertical subsampling factor
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* @alpha: has an alpha channel
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*/
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struct vsp1_format_info {
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u32 fourcc;
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unsigned int mbus;
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unsigned int hwfmt;
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unsigned int swap;
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unsigned int planes;
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unsigned int bpp[3];
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bool swap_yc;
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bool swap_uv;
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unsigned int hsub;
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unsigned int vsub;
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bool alpha;
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};
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enum vsp1_pipeline_state {
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VSP1_PIPELINE_STOPPED,
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VSP1_PIPELINE_RUNNING,
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@ -97,4 +124,6 @@ void vsp1_pipeline_propagate_alpha(struct vsp1_pipeline *pipe,
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void vsp1_pipelines_suspend(struct vsp1_device *vsp1);
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void vsp1_pipelines_resume(struct vsp1_device *vsp1);
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const struct vsp1_format_info *vsp1_get_format_info(u32 fourcc);
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#endif /* __VSP1_PIPE_H__ */
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@ -48,133 +48,6 @@
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* Helper functions
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*/
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static const struct vsp1_format_info vsp1_video_formats[] = {
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{ V4L2_PIX_FMT_RGB332, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 8, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_ARGB444, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_XRGB444, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_XRGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_ARGB555, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_XRGB555, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_XRGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_RGB565, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS,
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1, { 16, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_BGR24, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_BGR_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 24, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_RGB24, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 24, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_ABGR32, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS,
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1, { 32, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_XBGR32, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS,
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1, { 32, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_ARGB32, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 32, 0, 0 }, false, false, 1, 1, true },
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{ V4L2_PIX_FMT_XRGB32, MEDIA_BUS_FMT_ARGB8888_1X32,
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VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 32, 0, 0 }, false, false, 1, 1, false },
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{ V4L2_PIX_FMT_UYVY, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 16, 0, 0 }, false, false, 2, 1, false },
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{ V4L2_PIX_FMT_VYUY, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 16, 0, 0 }, false, true, 2, 1, false },
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{ V4L2_PIX_FMT_YUYV, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 16, 0, 0 }, true, false, 2, 1, false },
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{ V4L2_PIX_FMT_YVYU, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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1, { 16, 0, 0 }, true, true, 2, 1, false },
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{ V4L2_PIX_FMT_NV12M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
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VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
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2, { 8, 16, 0 }, false, false, 2, 2, false },
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{ V4L2_PIX_FMT_NV21M, MEDIA_BUS_FMT_AYUV8_1X32,
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VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
|
||||
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
|
||||
2, { 8, 16, 0 }, false, true, 2, 2, false },
|
||||
{ V4L2_PIX_FMT_NV16M, MEDIA_BUS_FMT_AYUV8_1X32,
|
||||
VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
|
||||
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
|
||||
2, { 8, 16, 0 }, false, false, 2, 1, false },
|
||||
{ V4L2_PIX_FMT_NV61M, MEDIA_BUS_FMT_AYUV8_1X32,
|
||||
VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
|
||||
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
|
||||
2, { 8, 16, 0 }, false, true, 2, 1, false },
|
||||
{ V4L2_PIX_FMT_YUV420M, MEDIA_BUS_FMT_AYUV8_1X32,
|
||||
VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
|
||||
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
|
||||
3, { 8, 8, 8 }, false, false, 2, 2, false },
|
||||
{ V4L2_PIX_FMT_YVU420M, MEDIA_BUS_FMT_AYUV8_1X32,
|
||||
VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
|
||||
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
|
||||
3, { 8, 8, 8 }, false, true, 2, 2, false },
|
||||
{ V4L2_PIX_FMT_YUV422M, MEDIA_BUS_FMT_AYUV8_1X32,
|
||||
VI6_FMT_Y_U_V_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
|
||||
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
|
||||
3, { 8, 8, 8 }, false, false, 2, 1, false },
|
||||
{ V4L2_PIX_FMT_YVU422M, MEDIA_BUS_FMT_AYUV8_1X32,
|
||||
VI6_FMT_Y_U_V_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
|
||||
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
|
||||
3, { 8, 8, 8 }, false, true, 2, 1, false },
|
||||
{ V4L2_PIX_FMT_YUV444M, MEDIA_BUS_FMT_AYUV8_1X32,
|
||||
VI6_FMT_Y_U_V_444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
|
||||
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
|
||||
3, { 8, 8, 8 }, false, false, 1, 1, false },
|
||||
{ V4L2_PIX_FMT_YVU444M, MEDIA_BUS_FMT_AYUV8_1X32,
|
||||
VI6_FMT_Y_U_V_444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
|
||||
VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
|
||||
3, { 8, 8, 8 }, false, true, 1, 1, false },
|
||||
};
|
||||
|
||||
/*
|
||||
* vsp1_get_format_info - Retrieve format information for a 4CC
|
||||
* @fourcc: the format 4CC
|
||||
*
|
||||
* Return a pointer to the format information structure corresponding to the
|
||||
* given V4L2 format 4CC, or NULL if no corresponding format can be found.
|
||||
*/
|
||||
static const struct vsp1_format_info *vsp1_get_format_info(u32 fourcc)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(vsp1_video_formats); ++i) {
|
||||
const struct vsp1_format_info *info = &vsp1_video_formats[i];
|
||||
|
||||
if (info->fourcc == fourcc)
|
||||
return info;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
static struct v4l2_subdev *
|
||||
vsp1_video_remote_subdev(struct media_pad *local, u32 *pad)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -21,33 +21,6 @@
|
|||
#include "vsp1_pipe.h"
|
||||
#include "vsp1_rwpf.h"
|
||||
|
||||
/*
|
||||
* struct vsp1_format_info - VSP1 video format description
|
||||
* @mbus: media bus format code
|
||||
* @fourcc: V4L2 pixel format FCC identifier
|
||||
* @planes: number of planes
|
||||
* @bpp: bits per pixel
|
||||
* @hwfmt: VSP1 hardware format
|
||||
* @swap_yc: the Y and C components are swapped (Y comes before C)
|
||||
* @swap_uv: the U and V components are swapped (V comes before U)
|
||||
* @hsub: horizontal subsampling factor
|
||||
* @vsub: vertical subsampling factor
|
||||
* @alpha: has an alpha channel
|
||||
*/
|
||||
struct vsp1_format_info {
|
||||
u32 fourcc;
|
||||
unsigned int mbus;
|
||||
unsigned int hwfmt;
|
||||
unsigned int swap;
|
||||
unsigned int planes;
|
||||
unsigned int bpp[3];
|
||||
bool swap_yc;
|
||||
bool swap_uv;
|
||||
unsigned int hsub;
|
||||
unsigned int vsub;
|
||||
bool alpha;
|
||||
};
|
||||
|
||||
struct vsp1_vb2_buffer {
|
||||
struct vb2_v4l2_buffer buf;
|
||||
struct list_head queue;
|
||||
|
|
|
|||
Loading…
Reference in New Issue