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ARM: dts: imx53-cx9020: Fix the Ethernet PHY reset GPIO polarity 

As explained in Documentation/devicetree/bindings/net/fsl-fec.txt the
phy-reset-gpios is active high only if the 'phy-reset-active-high' is
present.

As 'phy-reset-active-high' is not used here, fix the device tree
description by passing GPIO_ACTIVE_LOW flag.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Fabio Estevam 2017-11-25 20:51:07 -02:00 committed by Shawn Guo
parent dd254dec64
commit c709ddfac8
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/imx53-cx9020.dts
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@ -152,7 +152,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};