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ath9k_hw: clean up iniModesAdditional 

use iniModesFastClock for 5 ghz fast clock specific settings, and
iniAdditional for clock/chip specific initval overrides

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Felix Fietkau 2012-03-14 16:40:31 +01:00 committed by John W. Linville
parent 9951c4d042
commit c7d36f9fe7
5 changed files with 22 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/net/wireless/ath/ath9k/ar5008_phy.c
View File

@ -869,10 +869,9 @@ static int ar5008_hw_process_ini(struct ath_hw *ah,
REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites); REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites);
if (IS_CHAN_A_FAST_CLOCK(ah, chan)) { if (IS_CHAN_A_FAST_CLOCK(ah, chan))
REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, REG_WRITE_ARRAY(&ah->iniModesFastClock, modesIndex,
regWrites); regWrites);
}
ar5008_hw_override_ini(ah, chan); ar5008_hw_override_ini(ah, chan);
ar5008_hw_set_channel_regs(ah, chan); ar5008_hw_set_channel_regs(ah, chan);

2
drivers/net/wireless/ath/ath9k/ar9002_hw.c
View File

@ -73,7 +73,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2, INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
ARRAY_SIZE(ar9280Common_9280_2), 2); ARRAY_SIZE(ar9280Common_9280_2), 2);
INIT_INI_ARRAY(&ah->iniModesAdditional, INIT_INI_ARRAY(&ah->iniModesFastClock,
ar9280Modes_fast_clock_9280_2, ar9280Modes_fast_clock_9280_2,
ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3); ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
} else if (AR_SREV_9160_10_OR_LATER(ah)) { } else if (AR_SREV_9160_10_OR_LATER(ah)) {

25
drivers/net/wireless/ath/ath9k/ar9003_hw.c
View File

@ -87,11 +87,11 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
/* additional clock settings */ /* additional clock settings */
if (ah->is_clk_25mhz) if (ah->is_clk_25mhz)
INIT_INI_ARRAY(&ah->iniModesAdditional, INIT_INI_ARRAY(&ah->iniAdditional,
ar9331_1p1_xtal_25M, ar9331_1p1_xtal_25M,
ARRAY_SIZE(ar9331_1p1_xtal_25M), 2); ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
else else
INIT_INI_ARRAY(&ah->iniModesAdditional, INIT_INI_ARRAY(&ah->iniAdditional,
ar9331_1p1_xtal_40M, ar9331_1p1_xtal_40M,
ARRAY_SIZE(ar9331_1p1_xtal_40M), 2); ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
} else if (AR_SREV_9330_12(ah)) { } else if (AR_SREV_9330_12(ah)) {
@ -140,11 +140,11 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
/* additional clock settings */ /* additional clock settings */
if (ah->is_clk_25mhz) if (ah->is_clk_25mhz)
INIT_INI_ARRAY(&ah->iniModesAdditional, INIT_INI_ARRAY(&ah->iniAdditional,
ar9331_1p2_xtal_25M, ar9331_1p2_xtal_25M,
ARRAY_SIZE(ar9331_1p2_xtal_25M), 2); ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
else else
INIT_INI_ARRAY(&ah->iniModesAdditional, INIT_INI_ARRAY(&ah->iniAdditional,
ar9331_1p2_xtal_40M, ar9331_1p2_xtal_40M,
ARRAY_SIZE(ar9331_1p2_xtal_40M), 2); ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
} else if (AR_SREV_9340(ah)) { } else if (AR_SREV_9340(ah)) {
@ -194,15 +194,16 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0), ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
5); 5);
INIT_INI_ARRAY(&ah->iniModesAdditional, INIT_INI_ARRAY(&ah->iniModesFastClock,
ar9340Modes_fast_clock_1p0, ar9340Modes_fast_clock_1p0,
ARRAY_SIZE(ar9340Modes_fast_clock_1p0), ARRAY_SIZE(ar9340Modes_fast_clock_1p0),
3); 3);
INIT_INI_ARRAY(&ah->iniModesAdditional_40M, if (!ah->is_clk_25mhz)
ar9340_1p0_radio_core_40M, INIT_INI_ARRAY(&ah->iniAdditional,
ARRAY_SIZE(ar9340_1p0_radio_core_40M), ar9340_1p0_radio_core_40M,
2); ARRAY_SIZE(ar9340_1p0_radio_core_40M),
2);
} else if (AR_SREV_9485_11(ah)) { } else if (AR_SREV_9485_11(ah)) {
/* mac */ /* mac */
INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
@ -321,7 +322,7 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
2); 2);
/* Fast clock modal settings */ /* Fast clock modal settings */
INIT_INI_ARRAY(&ah->iniModesAdditional, INIT_INI_ARRAY(&ah->iniModesFastClock,
ar9462_modes_fast_clock_2p0, ar9462_modes_fast_clock_2p0,
ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3); ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3);
@ -378,7 +379,7 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table), ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
5); 5);
INIT_INI_ARRAY(&ah->iniModesAdditional, INIT_INI_ARRAY(&ah->iniModesFastClock,
ar9580_1p0_modes_fast_clock, ar9580_1p0_modes_fast_clock,
ARRAY_SIZE(ar9580_1p0_modes_fast_clock), ARRAY_SIZE(ar9580_1p0_modes_fast_clock),
3); 3);
@ -445,7 +446,7 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
2); 2);
/* Fast clock modal settings */ /* Fast clock modal settings */
INIT_INI_ARRAY(&ah->iniModesAdditional, INIT_INI_ARRAY(&ah->iniModesFastClock,
ar9300Modes_fast_clock_2p2, ar9300Modes_fast_clock_2p2,
ARRAY_SIZE(ar9300Modes_fast_clock_2p2), ARRAY_SIZE(ar9300Modes_fast_clock_2p2),
3); 3);

16
drivers/net/wireless/ath/ath9k/ar9003_phy.c
View File

@ -679,14 +679,10 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
* different modal values. * different modal values.
*/ */
if (IS_CHAN_A_FAST_CLOCK(ah, chan)) if (IS_CHAN_A_FAST_CLOCK(ah, chan))
REG_WRITE_ARRAY(&ah->iniModesAdditional, REG_WRITE_ARRAY(&ah->iniModesFastClock,
modesIndex, regWrites); modesIndex, regWrites);
if (AR_SREV_9330(ah)) REG_WRITE_ARRAY(&ah->iniAdditional, 1, regWrites);
REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
if (AR_SREV_9462(ah)) if (AR_SREV_9462(ah))
ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1); ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1);
@ -1323,13 +1319,9 @@ static int ar9003_hw_fast_chan_change(struct ath_hw *ah,
* different modal values. * different modal values.
*/ */
if (IS_CHAN_A_FAST_CLOCK(ah, chan)) if (IS_CHAN_A_FAST_CLOCK(ah, chan))
REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, regWrites); REG_WRITE_ARRAY(&ah->iniModesFastClock, modesIndex, regWrites);
if (AR_SREV_9330(ah)) REG_WRITE_ARRAY(&ah->iniAdditional, 1, regWrites);
REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
ah->modes_index = modesIndex; ah->modes_index = modesIndex;
*ini_reloaded = true; *ini_reloaded = true;

4
drivers/net/wireless/ath/ath9k/hw.h
View File

@ -827,8 +827,8 @@ struct ath_hw {
struct ar5416IniArray iniAddac; struct ar5416IniArray iniAddac;
struct ar5416IniArray iniPcieSerdes; struct ar5416IniArray iniPcieSerdes;
struct ar5416IniArray iniPcieSerdesLowPower; struct ar5416IniArray iniPcieSerdesLowPower;
struct ar5416IniArray iniModesAdditional; struct ar5416IniArray iniModesFastClock;
struct ar5416IniArray iniModesAdditional_40M; struct ar5416IniArray iniAdditional;
struct ar5416IniArray iniModesRxGain; struct ar5416IniArray iniModesRxGain;
struct ar5416IniArray iniModesTxGain; struct ar5416IniArray iniModesTxGain;
struct ar5416IniArray iniModes_9271_1_0_only; struct ar5416IniArray iniModes_9271_1_0_only;