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tty: serial: exar: Relocate sleep wake-up handling
Exar sleep wake-up handling has been done on a per-channel basis by virtue of INT0 being accessible from each channel's address space. I believe this was initially done out of necessity, but now that Exar devices have their own driver, we can do things more efficiently by registering a dedicated INT0 handler at the PCI device level. I see this change providing the following benefits: 1. If more than one port is active, eliminates the redundant bus cycles for reading INT0 on every interrupt. 2. This note associated with hooking in the per-channel handler in 8250_port.c is resolved: /* Fixme: probably not the best place for this */ Cc: Matt Schulte <matts@commtech-fastcom.com> Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -34,6 +34,7 @@
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#define PCI_DEVICE_ID_EXAR_XR17V4358 0x4358
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#define PCI_DEVICE_ID_EXAR_XR17V4358 0x4358
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#define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358
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#define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358
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#define UART_EXAR_INT0 0x80
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#define UART_EXAR_8XMODE 0x88 /* 8X sampling rate select */
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#define UART_EXAR_8XMODE 0x88 /* 8X sampling rate select */
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#define UART_EXAR_FCTR 0x08 /* Feature Control Register */
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#define UART_EXAR_FCTR 0x08 /* Feature Control Register */
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@ -121,6 +122,7 @@ struct exar8250_board {
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struct exar8250 {
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struct exar8250 {
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unsigned int nr;
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unsigned int nr;
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struct exar8250_board *board;
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struct exar8250_board *board;
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void __iomem *virt;
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int line[0];
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int line[0];
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};
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};
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@ -131,12 +133,9 @@ static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev,
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const struct exar8250_board *board = priv->board;
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const struct exar8250_board *board = priv->board;
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unsigned int bar = 0;
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unsigned int bar = 0;
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if (!pcim_iomap_table(pcidev)[bar] && !pcim_iomap(pcidev, bar, 0))
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return -ENOMEM;
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port->port.iotype = UPIO_MEM;
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port->port.iotype = UPIO_MEM;
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port->port.mapbase = pci_resource_start(pcidev, bar) + offset;
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port->port.mapbase = pci_resource_start(pcidev, bar) + offset;
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port->port.membase = pcim_iomap_table(pcidev)[bar] + offset;
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port->port.membase = priv->virt + offset;
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port->port.regshift = board->reg_shift;
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port->port.regshift = board->reg_shift;
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return 0;
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return 0;
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@ -420,6 +419,25 @@ static void pci_xr17v35x_exit(struct pci_dev *pcidev)
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port->port.private_data = NULL;
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port->port.private_data = NULL;
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}
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}
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/*
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* These Exar UARTs have an extra interrupt indicator that could fire for a
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* few interrupts that are not presented/cleared through IIR. One of which is
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* a wakeup interrupt when coming out of sleep. These interrupts are only
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* cleared by reading global INT0 or INT1 registers as interrupts are
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* associated with channel 0. The INT[3:0] registers _are_ accessible from each
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* channel's address space, but for the sake of bus efficiency we register a
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* dedicated handler at the PCI device level to handle them.
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*/
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static irqreturn_t exar_misc_handler(int irq, void *data)
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{
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struct exar8250 *priv = data;
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/* Clear all PCI interrupts by reading INT0. No effect on IIR */
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ioread8(priv->virt + UART_EXAR_INT0);
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return IRQ_HANDLED;
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}
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static int
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static int
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exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
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exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
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{
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{
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@ -448,6 +466,9 @@ exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
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return -ENOMEM;
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return -ENOMEM;
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priv->board = board;
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priv->board = board;
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priv->virt = pcim_iomap(pcidev, bar, 0);
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if (!priv->virt)
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return -ENOMEM;
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pci_set_master(pcidev);
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pci_set_master(pcidev);
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@ -461,6 +482,11 @@ exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
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uart.port.irq = pci_irq_vector(pcidev, 0);
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uart.port.irq = pci_irq_vector(pcidev, 0);
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uart.port.dev = &pcidev->dev;
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uart.port.dev = &pcidev->dev;
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rc = devm_request_irq(&pcidev->dev, uart.port.irq, exar_misc_handler,
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IRQF_SHARED, "exar_uart", priv);
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if (rc)
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return rc;
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for (i = 0; i < nr_ports && i < maxnr; i++) {
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for (i = 0; i < nr_ports && i < maxnr; i++) {
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rc = board->setup(priv, pcidev, &uart, i);
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rc = board->setup(priv, pcidev, &uart, i);
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if (rc) {
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if (rc) {
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@ -441,7 +441,6 @@ static void io_serial_out(struct uart_port *p, int offset, int value)
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}
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}
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static int serial8250_default_handle_irq(struct uart_port *port);
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static int serial8250_default_handle_irq(struct uart_port *port);
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static int exar_handle_irq(struct uart_port *port);
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static void set_io_from_upio(struct uart_port *p)
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static void set_io_from_upio(struct uart_port *p)
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{
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{
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@ -1883,26 +1882,6 @@ static int serial8250_default_handle_irq(struct uart_port *port)
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return ret;
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return ret;
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}
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}
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/*
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* These Exar UARTs have an extra interrupt indicator that could
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* fire for a few unimplemented interrupts. One of which is a
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* wakeup event when coming out of sleep. Put this here just
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* to be on the safe side that these interrupts don't go unhandled.
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*/
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static int exar_handle_irq(struct uart_port *port)
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{
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unsigned int iir = serial_port_in(port, UART_IIR);
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int ret = 0;
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if (((port->type == PORT_XR17V35X) || (port->type == PORT_XR17D15X)) &&
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serial_port_in(port, UART_EXAR_INT0) != 0)
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ret = 1;
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ret |= serial8250_handle_irq(port, iir);
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return ret;
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}
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/*
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/*
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* Newer 16550 compatible parts such as the SC16C650 & Altera 16550 Soft IP
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* Newer 16550 compatible parts such as the SC16C650 & Altera 16550 Soft IP
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* have a programmable TX threshold that triggers the THRE interrupt in
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* have a programmable TX threshold that triggers the THRE interrupt in
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@ -3067,11 +3046,6 @@ static void serial8250_config_port(struct uart_port *port, int flags)
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if (port->type == PORT_UNKNOWN)
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if (port->type == PORT_UNKNOWN)
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serial8250_release_std_resource(up);
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serial8250_release_std_resource(up);
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/* Fixme: probably not the best place for this */
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if ((port->type == PORT_XR17V35X) ||
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(port->type == PORT_XR17D15X))
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port->handle_irq = exar_handle_irq;
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register_dev_spec_attr_grp(up);
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register_dev_spec_attr_grp(up);
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up->fcr = uart_config[up->port.type].fcr;
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up->fcr = uart_config[up->port.type].fcr;
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}
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}
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