drm/amdgpu: initialize GDS/GWS/OA domains even when they are zero sized

Stops crashing on SI.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2018-09-14 20:59:27 +02:00 committed by Alex Deucher
parent 77a2faa55c
commit c832c346cd
1 changed files with 18 additions and 30 deletions

View File

@ -1845,34 +1845,25 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
(unsigned)(gtt_size / (1024 * 1024))); (unsigned)(gtt_size / (1024 * 1024)));
/* Initialize various on-chip memory pools */ /* Initialize various on-chip memory pools */
/* GDS Memory */ r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GDS,
if (adev->gds.mem.total_size) { adev->gds.mem.total_size);
r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GDS, if (r) {
adev->gds.mem.total_size); DRM_ERROR("Failed initializing GDS heap.\n");
if (r) { return r;
DRM_ERROR("Failed initializing GDS heap.\n");
return r;
}
} }
/* GWS */ r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GWS,
if (adev->gds.gws.total_size) { adev->gds.gws.total_size);
r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GWS, if (r) {
adev->gds.gws.total_size); DRM_ERROR("Failed initializing gws heap.\n");
if (r) { return r;
DRM_ERROR("Failed initializing gws heap.\n");
return r;
}
} }
/* OA */ r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_OA,
if (adev->gds.oa.total_size) { adev->gds.oa.total_size);
r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_OA, if (r) {
adev->gds.oa.total_size); DRM_ERROR("Failed initializing oa heap.\n");
if (r) { return r;
DRM_ERROR("Failed initializing oa heap.\n");
return r;
}
} }
/* Register debugfs entries for amdgpu_ttm */ /* Register debugfs entries for amdgpu_ttm */
@ -1909,12 +1900,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_VRAM); ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_VRAM);
ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_TT); ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_TT);
if (adev->gds.mem.total_size) ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GDS);
ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GDS); ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GWS);
if (adev->gds.gws.total_size) ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_OA);
ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GWS);
if (adev->gds.oa.total_size)
ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_OA);
ttm_bo_device_release(&adev->mman.bdev); ttm_bo_device_release(&adev->mman.bdev);
amdgpu_ttm_global_fini(adev); amdgpu_ttm_global_fini(adev);
adev->mman.initialized = false; adev->mman.initialized = false;