mirror of https://gitee.com/openkylin/linux.git
Merge branch 'Microchip-Technology-KSZ9131'
Yuiko Oshino says: ==================== Add support for Microchip Technology KSZ9131 10/100/1000 Ethernet PHY This is the initial driver for Microchip KSZ9131 10/100/1000 Ethernet PHY v3: - KSZ9131 uses picosecond units for values of devicetree properties. - rewrite micrel.c and micrel-ksz90x1.txt to use the picosecond values. v2: - Creating a series from two related patches. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
c8baae840f
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@ -1,4 +1,4 @@
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Micrel KSZ9021/KSZ9031 Gigabit Ethernet PHY
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Micrel KSZ9021/KSZ9031/KSZ9131 Gigabit Ethernet PHY
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Some boards require special tuning values, particularly when it comes
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to clock delays. You can specify clock delay values in the PHY OF
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@ -64,6 +64,32 @@ KSZ9031:
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Attention: The link partner must be configurable as slave otherwise
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no link will be established.
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KSZ9131:
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All skew control options are specified in picoseconds. The increment
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step is 100ps. Unlike KSZ9031, the values represent picoseccond delays.
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A negative value can be assigned as rxc-skew-psec = <(-100)>;.
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Optional properties:
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Range of the value -700 to 2400, default value 0:
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- rxc-skew-psec : Skew control of RX clock pad
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- txc-skew-psec : Skew control of TX clock pad
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Range of the value -700 to 800, default value 0:
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- rxdv-skew-psec : Skew control of RX CTL pad
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- txen-skew-psec : Skew control of TX CTL pad
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- rxd0-skew-psec : Skew control of RX data 0 pad
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- rxd1-skew-psec : Skew control of RX data 1 pad
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- rxd2-skew-psec : Skew control of RX data 2 pad
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- rxd3-skew-psec : Skew control of RX data 3 pad
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- txd0-skew-psec : Skew control of TX data 0 pad
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- txd1-skew-psec : Skew control of TX data 1 pad
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- txd2-skew-psec : Skew control of TX data 2 pad
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- txd3-skew-psec : Skew control of TX data 3 pad
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Examples:
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mdio {
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@ -14,7 +14,7 @@
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* option) any later version.
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*
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* Support : Micrel Phys:
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* Giga phys: ksz9021, ksz9031
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* Giga phys: ksz9021, ksz9031, ksz9131
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* 100/10 Phys : ksz8001, ksz8721, ksz8737, ksz8041
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* ksz8021, ksz8031, ksz8051,
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* ksz8081, ksz8091,
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@ -609,6 +609,116 @@ static int ksz9031_config_init(struct phy_device *phydev)
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return result;
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}
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#define KSZ9131_SKEW_5BIT_MAX 2400
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#define KSZ9131_SKEW_4BIT_MAX 800
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#define KSZ9131_OFFSET 700
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#define KSZ9131_STEP 100
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static int ksz9131_of_load_skew_values(struct phy_device *phydev,
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struct device_node *of_node,
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u16 reg, size_t field_sz,
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char *field[], u8 numfields)
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{
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int val[4] = {-(1 + KSZ9131_OFFSET), -(2 + KSZ9131_OFFSET),
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-(3 + KSZ9131_OFFSET), -(4 + KSZ9131_OFFSET)};
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int skewval, skewmax = 0;
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int matches = 0;
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u16 maxval;
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u16 newval;
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u16 mask;
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int i;
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/* psec properties in dts should mean x pico seconds */
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if (field_sz == 5)
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skewmax = KSZ9131_SKEW_5BIT_MAX;
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else
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skewmax = KSZ9131_SKEW_4BIT_MAX;
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for (i = 0; i < numfields; i++)
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if (!of_property_read_s32(of_node, field[i], &skewval)) {
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if (skewval < -KSZ9131_OFFSET)
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skewval = -KSZ9131_OFFSET;
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else if (skewval > skewmax)
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skewval = skewmax;
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val[i] = skewval + KSZ9131_OFFSET;
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matches++;
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}
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if (!matches)
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return 0;
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if (matches < numfields)
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newval = ksz9031_extended_read(phydev, OP_DATA, 2, reg);
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else
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newval = 0;
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maxval = (field_sz == 4) ? 0xf : 0x1f;
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for (i = 0; i < numfields; i++)
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if (val[i] != -(i + 1 + KSZ9131_OFFSET)) {
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mask = 0xffff;
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mask ^= maxval << (field_sz * i);
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newval = (newval & mask) |
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(((val[i] / KSZ9131_STEP) & maxval)
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<< (field_sz * i));
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}
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return ksz9031_extended_write(phydev, OP_DATA, 2, reg, newval);
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}
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static int ksz9131_config_init(struct phy_device *phydev)
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{
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const struct device *dev = &phydev->mdio.dev;
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struct device_node *of_node = dev->of_node;
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char *clk_skews[2] = {"rxc-skew-psec", "txc-skew-psec"};
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char *rx_data_skews[4] = {
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"rxd0-skew-psec", "rxd1-skew-psec",
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"rxd2-skew-psec", "rxd3-skew-psec"
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};
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char *tx_data_skews[4] = {
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"txd0-skew-psec", "txd1-skew-psec",
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"txd2-skew-psec", "txd3-skew-psec"
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};
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char *control_skews[2] = {"txen-skew-psec", "rxdv-skew-psec"};
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const struct device *dev_walker;
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int ret;
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dev_walker = &phydev->mdio.dev;
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do {
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of_node = dev_walker->of_node;
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dev_walker = dev_walker->parent;
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} while (!of_node && dev_walker);
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if (!of_node)
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return 0;
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ret = ksz9131_of_load_skew_values(phydev, of_node,
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MII_KSZ9031RN_CLK_PAD_SKEW, 5,
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clk_skews, 2);
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if (ret < 0)
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return ret;
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ret = ksz9131_of_load_skew_values(phydev, of_node,
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MII_KSZ9031RN_CONTROL_PAD_SKEW, 4,
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control_skews, 2);
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if (ret < 0)
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return ret;
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ret = ksz9131_of_load_skew_values(phydev, of_node,
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MII_KSZ9031RN_RX_DATA_PAD_SKEW, 4,
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rx_data_skews, 4);
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if (ret < 0)
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return ret;
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ret = ksz9131_of_load_skew_values(phydev, of_node,
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MII_KSZ9031RN_TX_DATA_PAD_SKEW, 4,
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tx_data_skews, 4);
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if (ret < 0)
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return ret;
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return 0;
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}
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#define KSZ8873MLL_GLOBAL_CONTROL_4 0x06
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#define KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX BIT(6)
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#define KSZ8873MLL_GLOBAL_CONTROL_4_SPEED BIT(4)
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@ -974,6 +1084,23 @@ static struct phy_driver ksphy_driver[] = {
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.get_stats = kszphy_get_stats,
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.suspend = genphy_suspend,
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.resume = kszphy_resume,
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}, {
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.phy_id = PHY_ID_KSZ9131,
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.phy_id_mask = MICREL_PHY_ID_MASK,
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.name = "Microchip KSZ9131 Gigabit PHY",
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.driver_data = &ksz9021_type,
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.probe = kszphy_probe,
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.config_init = ksz9131_config_init,
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.read_status = ksz9031_read_status,
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.ack_interrupt = kszphy_ack_interrupt,
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.config_intr = kszphy_config_intr,
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.get_sset_count = kszphy_get_sset_count,
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.get_strings = kszphy_get_strings,
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.get_stats = kszphy_get_stats,
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.suspend = genphy_suspend,
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.resume = kszphy_resume,
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}, {
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.phy_id = PHY_ID_KSZ8873MLL,
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.phy_id_mask = MICREL_PHY_ID_MASK,
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@ -1022,6 +1149,7 @@ MODULE_LICENSE("GPL");
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static struct mdio_device_id __maybe_unused micrel_tbl[] = {
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{ PHY_ID_KSZ9021, 0x000ffffe },
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{ PHY_ID_KSZ9031, MICREL_PHY_ID_MASK },
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{ PHY_ID_KSZ9131, MICREL_PHY_ID_MASK },
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{ PHY_ID_KSZ8001, 0x00fffffc },
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{ PHY_ID_KS8737, MICREL_PHY_ID_MASK },
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{ PHY_ID_KSZ8021, 0x00ffffff },
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@ -31,6 +31,7 @@
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#define PHY_ID_KSZ8081 0x00221560
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#define PHY_ID_KSZ8061 0x00221570
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#define PHY_ID_KSZ9031 0x00221620
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#define PHY_ID_KSZ9131 0x00221640
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#define PHY_ID_KSZ886X 0x00221430
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#define PHY_ID_KSZ8863 0x00221435
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