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ARM: imx: Remove i.MX31 board files 

i.MX31 has basic device tree support.

To achieve the goal of converting all i.MX SoCs to a
devicetree-only platform, remove imx31 board files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Fabio Estevam 2020-09-02 09:49:50 -03:00 committed by Shawn Guo
parent 879c0e5e0a
commit c93197b004
18 changed files with 7 additions and 4734 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm/configs/imx_v6_v7_defconfig
View File

@ -15,20 +15,11 @@ CONFIG_PERF_EVENTS=y
# CONFIG_COMPAT_BRK is not set # CONFIG_COMPAT_BRK is not set
CONFIG_ARCH_MULTI_V6=y CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_MXC=y CONFIG_ARCH_MXC=y
CONFIG_MACH_MX31LILLY=y
CONFIG_MACH_MX31LITE=y
CONFIG_MACH_PCM037=y
CONFIG_MACH_PCM037_EET=y
CONFIG_MACH_MX31_3DS=y
CONFIG_MACH_MX31MOBOARD=y
CONFIG_MACH_QONG=y
CONFIG_MACH_ARMADILLO5X0=y
CONFIG_MACH_KZM_ARM11_01=y
CONFIG_MACH_IMX31_DT=y
CONFIG_MACH_IMX35_DT=y CONFIG_MACH_IMX35_DT=y
CONFIG_MACH_PCM043=y CONFIG_MACH_PCM043=y
CONFIG_MACH_MX35_3DS=y CONFIG_MACH_MX35_3DS=y
CONFIG_MACH_VPR200=y CONFIG_MACH_VPR200=y
CONFIG_SOC_IMX31=y
CONFIG_SOC_IMX50=y CONFIG_SOC_IMX50=y
CONFIG_SOC_IMX51=y CONFIG_SOC_IMX51=y
CONFIG_SOC_IMX53=y CONFIG_SOC_IMX53=y

181
arch/arm/mach-imx/Kconfig
View File

@ -53,11 +53,6 @@ config IMX_HAVE_IOMUX_V1
config ARCH_MXC_IOMUX_V3 config ARCH_MXC_IOMUX_V3
bool bool
config SOC_IMX31
bool
select CPU_V6
select MXC_AVIC
config SOC_IMX35 config SOC_IMX35
bool bool
select ARCH_MXC_IOMUX_V3 select ARCH_MXC_IOMUX_V3
@ -66,178 +61,12 @@ config SOC_IMX35
if ARCH_MULTI_V6 if ARCH_MULTI_V6
comment "MX31 platforms:" config SOC_IMX31
bool "i.MX31 support"
config MACH_MX31ADS select CPU_V6
bool "Support MX31ADS platforms" select MXC_AVIC
default y
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_IMX_UART
select SOC_IMX31
help help
Include support for MX31ADS platform. This includes specific This enables support for Freescale i.MX31 processor
configurations for the board and its peripherals.
config MACH_MX31ADS_WM1133_EV1
bool "Support Wolfson Microelectronics 1133-EV1 module"
depends on MACH_MX31ADS
depends on MFD_WM8350_I2C
depends on REGULATOR_WM8350 = y
help
Include support for the Wolfson Microelectronics 1133-EV1 PMU
and audio module for the MX31ADS platform.
config MACH_MX31LILLY
bool "Support MX31 LILLY-1131 platforms (INCO startec)"
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_IPU_CORE
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_MMC
select IMX_HAVE_PLATFORM_SPI_IMX
select USB_ULPI_VIEWPORT if USB_ULPI
select SOC_IMX31
help
Include support for mx31 based LILLY1131 modules. This includes
specific configurations for the board and its peripherals.
config MACH_MX31LITE
bool "Support MX31 LITEKIT (LogicPD)"
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_MMC
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_MXC_RTC
select IMX_HAVE_PLATFORM_SPI_IMX
select LEDS_GPIO_REGISTER
select USB_ULPI_VIEWPORT if USB_ULPI
select SOC_IMX31
help
Include support for MX31 LITEKIT platform. This includes specific
configurations for the board and its peripherals.
config MACH_PCM037
bool "Support Phytec pcm037 (i.MX31) platforms"
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_IPU_CORE
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_MMC
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_MXC_W1
select USB_ULPI_VIEWPORT if USB_ULPI
select SOC_IMX31
help
Include support for Phytec pcm037 platform. This includes
specific configurations for the board and its peripherals.
config MACH_PCM037_EET
bool "Support pcm037 EET board extensions"
depends on MACH_PCM037
select IMX_HAVE_PLATFORM_GPIO_KEYS
select IMX_HAVE_PLATFORM_SPI_IMX
help
Add support for PCM037 EET baseboard extensions. If you are using the
OLED display with EET, use "video=mx3fb:CMEL-OLED" kernel
command-line parameter.
config MACH_MX31_3DS
bool "Support MX31PDK (3DS)"
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_KEYPAD
select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_IPU_CORE
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_MMC
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SPI_IMX
select MXC_DEBUG_BOARD
select USB_ULPI_VIEWPORT if USB_ULPI
select SOC_IMX31
help
Include support for MX31PDK (3DS) platform. This includes specific
configurations for the board and its peripherals.
config MACH_MX31_3DS_MXC_NAND_USE_BBT
bool "Make the MXC NAND driver use the in flash Bad Block Table"
depends on MACH_MX31_3DS
depends on MTD_NAND_MXC
help
Enable this if you want that the MXC NAND driver uses the in flash
Bad Block Table to know what blocks are bad instead of scanning the
entire flash looking for bad block markers.
config MACH_MX31MOBOARD
bool "Support mx31moboard platforms (EPFL Mobots group)"
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_IPU_CORE
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_MMC
select IMX_HAVE_PLATFORM_SPI_IMX
select LEDS_GPIO_REGISTER
select USB_ULPI_VIEWPORT if USB_ULPI
select SOC_IMX31
help
Include support for mx31moboard platform. This includes specific
configurations for the board and its peripherals.
config MACH_QONG
bool "Support Dave/DENX QongEVB-LITE platform"
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMX_UART
select SOC_IMX31
help
Include support for Dave/DENX QongEVB-LITE platform. This includes
specific configurations for the board and its peripherals.
config MACH_ARMADILLO5X0
bool "Support Atmark Armadillo-500 Development Base Board"
select IMX_HAVE_PLATFORM_GPIO_KEYS
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_IPU_CORE
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_MMC
select IMX_HAVE_PLATFORM_MXC_NAND
select USB_ULPI_VIEWPORT if USB_ULPI
select SOC_IMX31
help
Include support for Atmark Armadillo-500 platform. This includes
specific configurations for the board and its peripherals.
config MACH_KZM_ARM11_01
bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
select IMX_HAVE_PLATFORM_IMX_UART
select SOC_IMX31
help
Include support for KZM-ARM11-01. This includes specific
configurations for the board and its peripherals.
config MACH_BUG
bool "Support Buglabs BUGBase platform"
default y
select IMX_HAVE_PLATFORM_IMX_UART
select SOC_IMX31
help
Include support for BUGBase 1.3 platform. This includes specific
configurations for the board and its peripherals.
config MACH_IMX31_DT
bool "Support i.MX31 platforms from device tree"
select SOC_IMX31
help
Include support for Freescale i.MX31 based platforms
using the device tree for discovery.
comment "MX35 platforms:" comment "MX35 platforms:"

17
arch/arm/mach-imx/Makefile
View File

@ -6,7 +6,7 @@ obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o
obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o
obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o mach-imx31.o
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o
imx5-pm-$(CONFIG_PM) += pm-imx5.o imx5-pm-$(CONFIG_PM) += pm-imx5.o
@ -35,21 +35,6 @@ obj-y += ssi-fiq.o
obj-y += ssi-fiq-ksym.o obj-y += ssi-fiq-ksym.o
endif endif
# i.MX31 based machines
obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
mx31moboard-marxbot.o mx31moboard-smartbot.o
obj-$(CONFIG_MACH_QONG) += mach-qong.o
obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
obj-$(CONFIG_MACH_BUG) += mach-bug.o
obj-$(CONFIG_MACH_IMX31_DT) += imx31-dt.o
# i.MX35 based machines # i.MX35 based machines
obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o

562
arch/arm/mach-imx/mach-armadillo5x0.c
View File

@ -1,562 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* armadillo5x0.c
*
* Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
* updates in http://alberdroid.blogspot.com/
*
* Based on Atmark Techno, Inc. armadillo 500 BSP 2008
* Based on mx31ads.c and pcm037.c Great Work!
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/smsc911x.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/io.h>
#include <linux/input.h>
#include <linux/i2c.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
#include "common.h"
#include "devices-imx31.h"
#include "crmregs-imx3.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"
static int armadillo5x0_pins[] = {
/* UART1 */
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
/* UART2 */
MX31_PIN_CTS2__CTS2,
MX31_PIN_RTS2__RTS2,
MX31_PIN_TXD2__TXD2,
MX31_PIN_RXD2__RXD2,
/* LAN9118_IRQ */
IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
/* SDHC1 */
MX31_PIN_SD1_DATA3__SD1_DATA3,
MX31_PIN_SD1_DATA2__SD1_DATA2,
MX31_PIN_SD1_DATA1__SD1_DATA1,
MX31_PIN_SD1_DATA0__SD1_DATA0,
MX31_PIN_SD1_CLK__SD1_CLK,
MX31_PIN_SD1_CMD__SD1_CMD,
/* Framebuffer */
MX31_PIN_LD0__LD0,
MX31_PIN_LD1__LD1,
MX31_PIN_LD2__LD2,
MX31_PIN_LD3__LD3,
MX31_PIN_LD4__LD4,
MX31_PIN_LD5__LD5,
MX31_PIN_LD6__LD6,
MX31_PIN_LD7__LD7,
MX31_PIN_LD8__LD8,
MX31_PIN_LD9__LD9,
MX31_PIN_LD10__LD10,
MX31_PIN_LD11__LD11,
MX31_PIN_LD12__LD12,
MX31_PIN_LD13__LD13,
MX31_PIN_LD14__LD14,
MX31_PIN_LD15__LD15,
MX31_PIN_LD16__LD16,
MX31_PIN_LD17__LD17,
MX31_PIN_VSYNC3__VSYNC3,
MX31_PIN_HSYNC__HSYNC,
MX31_PIN_FPSHIFT__FPSHIFT,
MX31_PIN_DRDY0__DRDY0,
IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
/* I2C2 */
MX31_PIN_CSPI2_MOSI__SCL,
MX31_PIN_CSPI2_MISO__SDA,
/* OTG */
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
MX31_PIN_USBOTG_CLK__USBOTG_CLK,
MX31_PIN_USBOTG_DIR__USBOTG_DIR,
MX31_PIN_USBOTG_NXT__USBOTG_NXT,
MX31_PIN_USBOTG_STP__USBOTG_STP,
/* USB host 2 */
IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
};
/* USB */
#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
static int usbotg_init(struct platform_device *pdev)
{
int err;
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
/* Chip already enabled by hardware */
/* OTG phy reset*/
err = gpio_request(OTG_RESET, "USB-OTG-RESET");
if (err) {
pr_err("Failed to request the usb otg reset gpio\n");
return err;
}
err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
if (err) {
pr_err("Failed to reset the usb otg phy\n");
goto otg_free_reset;
}
gpio_set_value(OTG_RESET, 0/*LOW*/);
mdelay(5);
gpio_set_value(OTG_RESET, 1/*HIGH*/);
mdelay(10);
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
MXC_EHCI_INTERFACE_DIFF_UNI);
otg_free_reset:
gpio_free(OTG_RESET);
return err;
}
static int usbh2_init(struct platform_device *pdev)
{
int err;
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
/* Enable the chip */
err = gpio_request(USBH2_CS, "USB-H2-CS");
if (err) {
pr_err("Failed to request the usb host 2 CS gpio\n");
return err;
}
err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
if (err) {
pr_err("Failed to drive the usb host 2 CS gpio\n");
goto h2_free_cs;
}
/* H2 phy reset*/
err = gpio_request(USBH2_RESET, "USB-H2-RESET");
if (err) {
pr_err("Failed to request the usb host 2 reset gpio\n");
goto h2_free_cs;
}
err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
if (err) {
pr_err("Failed to reset the usb host 2 phy\n");
goto h2_free_reset;
}
gpio_set_value(USBH2_RESET, 0/*LOW*/);
mdelay(5);
gpio_set_value(USBH2_RESET, 1/*HIGH*/);
mdelay(10);
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
MXC_EHCI_INTERFACE_DIFF_UNI);
h2_free_reset:
gpio_free(USBH2_RESET);
h2_free_cs:
gpio_free(USBH2_CS);
return err;
}
static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
.init = usbotg_init,
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
.init = usbh2_init,
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};
/* RTC over I2C*/
#define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
static struct i2c_board_info armadillo5x0_i2c_rtc = {
I2C_BOARD_INFO("s35390a", 0x30),
};
/* GPIO BUTTONS */
static struct gpio_keys_button armadillo5x0_buttons[] = {
{
.code = KEY_ENTER, /*28*/
.gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
.active_low = 1,
.desc = "menu",
.wakeup = 1,
}, {
.code = KEY_BACK, /*158*/
.gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
.active_low = 1,
.desc = "back",
.wakeup = 1,
}
};
static const struct gpio_keys_platform_data
armadillo5x0_button_data __initconst = {
.buttons = armadillo5x0_buttons,
.nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
};
/*
* NAND Flash
*/
static const struct mxc_nand_platform_data
armadillo5x0_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
/*
* MTD NOR Flash
*/
static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
{
.name = "nor.bootloader",
.offset = 0x00000000,
.size = 4*32*1024,
}, {
.name = "nor.kernel",
.offset = MTDPART_OFS_APPEND,
.size = 16*128*1024,
}, {
.name = "nor.userland",
.offset = MTDPART_OFS_APPEND,
.size = 110*128*1024,
}, {
.name = "nor.config",
.offset = MTDPART_OFS_APPEND,
.size = 1*128*1024,
},
};
static const struct physmap_flash_data
armadillo5x0_nor_flash_pdata __initconst = {
.width = 2,
.parts = armadillo5x0_nor_flash_partitions,
.nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
};
static const struct resource armadillo5x0_nor_flash_resource __initconst = {
.flags = IORESOURCE_MEM,
.start = MX31_CS0_BASE_ADDR,
.end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
};
/*
* FB support
*/
static const struct fb_videomode fb_modedb[] = {
{ /* 640x480 @ 60 Hz */
.name = "CRT-VGA",
.refresh = 60,
.xres = 640,
.yres = 480,
.pixclock = 39721,
.left_margin = 35,
.right_margin = 115,
.upper_margin = 43,
.lower_margin = 1,
.hsync_len = 10,
.vsync_len = 1,
.sync = FB_SYNC_OE_ACT_HIGH,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
}, {/* 800x600 @ 56 Hz */
.name = "CRT-SVGA",
.refresh = 56,
.xres = 800,
.yres = 600,
.pixclock = 30000,
.left_margin = 30,
.right_margin = 108,
.upper_margin = 13,
.lower_margin = 10,
.hsync_len = 10,
.vsync_len = 1,
.sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
FB_SYNC_VERT_HIGH_ACT,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
},
};
static struct mx3fb_platform_data mx3fb_pdata __initdata = {
.name = "CRT-VGA",
.mode = fb_modedb,
.num_modes = ARRAY_SIZE(fb_modedb),
};
/*
* SDHC 1
* MMC support
*/
static int armadillo5x0_sdhc1_get_ro(struct device *dev)
{
return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
}
static int armadillo5x0_sdhc1_init(struct device *dev,
irq_handler_t detect_irq, void *data)
{
int ret;
int gpio_det, gpio_wp;
gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
ret = gpio_request(gpio_det, "sdhc-card-detect");
if (ret)
return ret;
gpio_direction_input(gpio_det);
ret = gpio_request(gpio_wp, "sdhc-write-protect");
if (ret)
goto err_gpio_free;
gpio_direction_input(gpio_wp);
/* When supported the trigger type have to be BOTH */
ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)),
detect_irq, IRQF_TRIGGER_FALLING,
"sdhc-detect", data);
if (ret)
goto err_gpio_free_2;
return 0;
err_gpio_free_2:
gpio_free(gpio_wp);
err_gpio_free:
gpio_free(gpio_det);
return ret;
}
static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
{
free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)), data);
gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
}
static const struct imxmmc_platform_data sdhc_pdata __initconst = {
.get_ro = armadillo5x0_sdhc1_get_ro,
.init = armadillo5x0_sdhc1_init,
.exit = armadillo5x0_sdhc1_exit,
};
/*
* SMSC 9118
* Network support
*/
static struct resource armadillo5x0_smc911x_resources[] = {
{
.start = MX31_CS3_BASE_ADDR,
.end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
.flags = IORESOURCE_MEM,
}, {
/* irq number is run-time assigned */
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
},
};
static struct smsc911x_platform_config smsc911x_info = {
.flags = SMSC911X_USE_16BIT,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
};
static struct platform_device armadillo5x0_smc911x_device = {
.name = "smsc911x",
.id = -1,
.num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
.resource = armadillo5x0_smc911x_resources,
.dev = {
.platform_data = &smsc911x_info,
},
};
/* UART device data */
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct platform_device *devices[] __initdata = {
&armadillo5x0_smc911x_device,
};
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
/*
* Perform board specific initializations
*/
static void __init armadillo5x0_init(void)
{
imx31_soc_init();
mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
imx31_add_imx_i2c1(NULL);
/* Register UART */
imx31_add_imx_uart0(&uart_pdata);
imx31_add_imx_uart1(&uart_pdata);
/* Register FB */
imx31_add_ipu_core();
imx31_add_mx3_sdc_fb(&mx3fb_pdata);
/* Register NOR Flash */
platform_device_register_resndata(NULL, "physmap-flash", -1,
&armadillo5x0_nor_flash_resource, 1,
&armadillo5x0_nor_flash_pdata,
sizeof(armadillo5x0_nor_flash_pdata));
/* Register NAND Flash */
imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
/* set NAND page size to 2k if not configured via boot mode pins */
imx_writel(imx_readl(mx3_ccm_base + MXC_CCM_RCSR) | (1 << 30),
mx3_ccm_base + MXC_CCM_RCSR);
}
static void __init armadillo5x0_late(void)
{
armadillo5x0_smc911x_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
armadillo5x0_smc911x_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
platform_add_devices(devices, ARRAY_SIZE(devices));
imx_add_gpio_keys(&armadillo5x0_button_data);
/* SMSC9118 IRQ pin */
gpio_direction_input(MX31_PIN_GPIO1_0);
/* Register SDHC */
imx31_add_mxc_mmc(0, &sdhc_pdata);
/* RTC */
/* Get RTC IRQ and register the chip */
if (!gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc")) {
if (!gpio_direction_input(ARMADILLO5X0_RTC_GPIO))
armadillo5x0_i2c_rtc.irq =
gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
else
gpio_free(ARMADILLO5X0_RTC_GPIO);
}
if (armadillo5x0_i2c_rtc.irq == 0)
pr_warn("armadillo5x0_init: failed to get RTC IRQ\n");
i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
/* USB */
usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (usbotg_pdata.otg)
imx31_add_mxc_ehci_otg(&usbotg_pdata);
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (usbh2_pdata.otg)
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
}
static void __init armadillo5x0_timer_init(void)
{
mx31_clocks_init(26000000);
}
MACHINE_START(ARMADILLO5X0, "Armadillo-500")
/* Maintainer: Alberto Panizzo */
.atag_offset = 0x100,
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = armadillo5x0_timer_init,
.init_machine = armadillo5x0_init,
.init_late = armadillo5x0_late,
.restart = mxc_restart,
MACHINE_END

54
arch/arm/mach-imx/mach-bug.c
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@ -1,54 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2000 Deep Blue Solutions Ltd
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright 2011 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/mach/time.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include "common.h"
#include "devices-imx31.h"
#include "hardware.h"
#include "iomux-mx3.h"
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static const unsigned int bug_pins[] __initconst = {
MX31_PIN_PC_RST__CTS5,
MX31_PIN_PC_VS2__RTS5,
MX31_PIN_PC_BVD2__TXD5,
MX31_PIN_PC_BVD1__RXD5,
};
static void __init bug_board_init(void)
{
imx31_soc_init();
mxc_iomux_setup_multiple_pins(bug_pins,
ARRAY_SIZE(bug_pins), "uart-4");
imx31_add_imx_uart4(&uart_pdata);
}
static void __init bug_timer_init(void)
{
mx31_clocks_init(26000000);
}
MACHINE_START(BUG, "BugLabs BUGBase")
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = bug_timer_init,
.init_machine = bug_board_init,
.restart = mxc_restart,
MACHINE_END

0
arch/arm/mach-imx/imx31-dt.c → arch/arm/mach-imx/mach-imx31.c
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291
arch/arm/mach-imx/mach-kzm_arm11_01.c
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@ -1,291 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* KZM-ARM11-01 support
* Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org>
*
* based on code for MX31ADS,
* Copyright (C) 2000 Deep Blue Solutions Ltd
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/smsc911x.h>
#include <linux/types.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/memory.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include "common.h"
#include "devices-imx31.h"
#include "hardware.h"
#include "iomux-mx3.h"
#define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \
IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \
IMX_IO_P2V_MODULE(x, MX31_CS5)) ?: \
MX31_IO_ADDRESS(x))
/*
* KZM-ARM11-01 Board Control Registers on FPGA
*/
#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
/*
* External UART for touch panel on FPGA
*/
#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
#if IS_ENABLED(CONFIG_SERIAL_8250)
/*
* KZM-ARM11-01 has an external UART on FPGA
*/
static struct plat_serial8250_port serial_platform_data[] = {
{
.membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
.mapbase = KZM_ARM11_16550,
/* irq number is run-time assigned */
.irqflags = IRQ_TYPE_EDGE_RISING,
.uartclk = 14745600,
.regshift = 0,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_BUGGY_UART,
},
{},
};
static struct resource serial8250_resources[] = {
{
.start = KZM_ARM11_16550,
.end = KZM_ARM11_16550 + 0x10,
.flags = IORESOURCE_MEM,
},
{
/* irq number is run-time assigned */
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device serial_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = serial_platform_data,
},
.num_resources = ARRAY_SIZE(serial8250_resources),
.resource = serial8250_resources,
};
static int __init kzm_init_ext_uart(void)
{
u8 tmp;
/*
* GPIO 1-1: external UART interrupt line
*/
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
/*
* Unmask UART interrupt
*/
tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
tmp |= 0x2;
__raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
serial_platform_data[0].irq =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
serial8250_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
serial8250_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
return platform_device_register(&serial_device);
}
#else
static inline int kzm_init_ext_uart(void)
{
return 0;
}
#endif
/*
* SMSC LAN9118
*/
#if IS_ENABLED(CONFIG_SMSC911X)
static struct smsc911x_platform_config kzm_smsc9118_config = {
.phy_interface = PHY_INTERFACE_MODE_MII,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
};
static struct resource kzm_smsc9118_resources[] = {
{
.start = MX31_CS5_BASE_ADDR,
.end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
.flags = IORESOURCE_MEM,
},
{
/* irq number is run-time assigned */
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
},
};
static struct platform_device kzm_smsc9118_device = {
.name = "smsc911x",
.id = -1,
.num_resources = ARRAY_SIZE(kzm_smsc9118_resources),
.resource = kzm_smsc9118_resources,
.dev = {
.platform_data = &kzm_smsc9118_config,
},
};
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
static int __init kzm_init_smsc9118(void)
{
/*
* GPIO 1-2: SMSC9118 interrupt line
*/
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
kzm_smsc9118_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
kzm_smsc9118_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
return platform_device_register(&kzm_smsc9118_device);
}
#else
static inline int kzm_init_smsc9118(void)
{
return 0;
}
#endif
#if IS_ENABLED(CONFIG_SERIAL_IMX)
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static void __init kzm_init_imx_uart(void)
{
imx31_add_imx_uart0(&uart_pdata);
imx31_add_imx_uart1(&uart_pdata);
}
#else
static inline void kzm_init_imx_uart(void)
{
}
#endif
static int kzm_pins[] __initdata = {
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
MX31_PIN_DCD_DCE1__DCD_DCE1,
MX31_PIN_RI_DCE1__RI_DCE1,
MX31_PIN_DSR_DCE1__DSR_DCE1,
MX31_PIN_DTR_DCE1__DTR_DCE1,
MX31_PIN_CTS2__CTS2,
MX31_PIN_RTS2__RTS2,
MX31_PIN_TXD2__TXD2,
MX31_PIN_RXD2__RXD2,
MX31_PIN_DCD_DTE1__DCD_DTE2,
MX31_PIN_RI_DTE1__RI_DTE2,
MX31_PIN_DSR_DTE1__DSR_DTE2,
MX31_PIN_DTR_DTE1__DTR_DTE2,
};
/*
* Board specific initialization.
*/
static void __init kzm_board_init(void)
{
imx31_soc_init();
mxc_iomux_setup_multiple_pins(kzm_pins,
ARRAY_SIZE(kzm_pins), "kzm");
kzm_init_imx_uart();
pr_info("Clock input source is 26MHz\n");
}
static void __init kzm_late_init(void)
{
kzm_init_ext_uart();
kzm_init_smsc9118();
}
/*
* This structure defines static mappings for the kzm-arm11-01 board.
*/
static struct map_desc kzm_io_desc[] __initdata = {
{
.virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
.length = MX31_CS4_SIZE,
.type = MT_DEVICE
},
{
.virtual = (unsigned long)MX31_CS5_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
.length = MX31_CS5_SIZE,
.type = MT_DEVICE
},
};
/*
* Set up static virtual mappings.
*/
static void __init kzm_map_io(void)
{
mx31_map_io();
iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
}
static void __init kzm_timer_init(void)
{
mx31_clocks_init(26000000);
}
MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
.atag_offset = 0x100,
.map_io = kzm_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = kzm_timer_init,
.init_machine = kzm_board_init,
.init_late = kzm_late_init,
.restart = mxc_restart,
MACHINE_END

615
arch/arm/mach-imx/mach-mx31_3ds.c
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@ -1,615 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/gpio/machine.h>
#include <linux/platform_device.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/regulator/machine.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
#include "3ds_debugboard.h"
#include "common.h"
#include "devices-imx31.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"
static int mx31_3ds_pins[] = {
/* UART1 */
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
/*SPI0*/
IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1),
IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1),
/* SPI 1 */
MX31_PIN_CSPI2_SCLK__SCLK,
MX31_PIN_CSPI2_MOSI__MOSI,
MX31_PIN_CSPI2_MISO__MISO,
MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI2_SS0__SS0,
MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
/* MC13783 IRQ */
IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
/* USB OTG reset */
IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
/* USB OTG */
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
MX31_PIN_USBOTG_CLK__USBOTG_CLK,
MX31_PIN_USBOTG_DIR__USBOTG_DIR,
MX31_PIN_USBOTG_NXT__USBOTG_NXT,
MX31_PIN_USBOTG_STP__USBOTG_STP,
/*Keyboard*/
MX31_PIN_KEY_ROW0_KEY_ROW0,
MX31_PIN_KEY_ROW1_KEY_ROW1,
MX31_PIN_KEY_ROW2_KEY_ROW2,
MX31_PIN_KEY_COL0_KEY_COL0,
MX31_PIN_KEY_COL1_KEY_COL1,
MX31_PIN_KEY_COL2_KEY_COL2,
MX31_PIN_KEY_COL3_KEY_COL3,
/* USB Host 2 */
IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT1),
IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT1),
IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT1),
IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT1),
IOMUX_MODE(MX31_PIN_IOIS16, IOMUX_CONFIG_ALT1),
IOMUX_MODE(MX31_PIN_PC_RW_B, IOMUX_CONFIG_ALT1),
/* USB Host2 reset */
IOMUX_MODE(MX31_PIN_USB_BYP, IOMUX_CONFIG_GPIO),
/* I2C1 */
MX31_PIN_I2C_CLK__I2C1_SCL,
MX31_PIN_I2C_DAT__I2C1_SDA,
/* SDHC1 */
MX31_PIN_SD1_DATA3__SD1_DATA3,
MX31_PIN_SD1_DATA2__SD1_DATA2,
MX31_PIN_SD1_DATA1__SD1_DATA1,
MX31_PIN_SD1_DATA0__SD1_DATA0,
MX31_PIN_SD1_CLK__SD1_CLK,
MX31_PIN_SD1_CMD__SD1_CMD,
MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */
MX31_PIN_GPIO3_0__GPIO3_0, /* OE */
/* Framebuffer */
MX31_PIN_LD0__LD0,
MX31_PIN_LD1__LD1,
MX31_PIN_LD2__LD2,
MX31_PIN_LD3__LD3,
MX31_PIN_LD4__LD4,
MX31_PIN_LD5__LD5,
MX31_PIN_LD6__LD6,
MX31_PIN_LD7__LD7,
MX31_PIN_LD8__LD8,
MX31_PIN_LD9__LD9,
MX31_PIN_LD10__LD10,
MX31_PIN_LD11__LD11,
MX31_PIN_LD12__LD12,
MX31_PIN_LD13__LD13,
MX31_PIN_LD14__LD14,
MX31_PIN_LD15__LD15,
MX31_PIN_LD16__LD16,
MX31_PIN_LD17__LD17,
MX31_PIN_VSYNC3__VSYNC3,
MX31_PIN_HSYNC__HSYNC,
MX31_PIN_FPSHIFT__FPSHIFT,
MX31_PIN_CONTRAST__CONTRAST,
/* SSI */
MX31_PIN_STXD4__STXD4,
MX31_PIN_SRXD4__SRXD4,
MX31_PIN_SCK4__SCK4,
MX31_PIN_SFS4__SFS4,
};
/*
* FB support
*/
static const struct fb_videomode fb_modedb[] = {
{ /* 480x640 @ 60 Hz */
.name = "Epson-VGA",
.refresh = 60,
.xres = 480,
.yres = 640,
.pixclock = 41701,
.left_margin = 20,
.right_margin = 41,
.upper_margin = 10,
.lower_margin = 5,
.hsync_len = 20,
.vsync_len = 10,
.sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
},
};
static struct mx3fb_platform_data mx3fb_pdata __initdata = {
.name = "Epson-VGA",
.mode = fb_modedb,
.num_modes = ARRAY_SIZE(fb_modedb),
};
/* LCD */
static struct gpiod_lookup_table mx31_3ds_lcd_gpiod_table = {
.dev_id = "spi0.2", /* Bus 0 chipselect 2 */
.table = {
/*
* "reset" has IOMUX_TO_GPIO(IOMUX_PIN(88, 28)).
* The macro only shifts 88 to bits 9..16 and then
* mask it and shift it back. The GPIO number is 88.
* 88 is 2*32+24
*/
GPIO_LOOKUP("imx31-gpio.2", 24, "reset", GPIO_ACTIVE_HIGH),
/*
* Same reasoning as above for
* IOMUX_TO_GPIO(IOMUX_PIN(89, 27), pin 89 is 2*32+25.
*/
GPIO_LOOKUP("imx31-gpio.2", 25, "enable", GPIO_ACTIVE_HIGH),
{ },
},
};
/*
* Support for SD card slot in personality board
*/
#define MX31_3DS_GPIO_SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
#define MX31_3DS_GPIO_SDHC1_BE IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
static struct gpio mx31_3ds_sdhc1_gpios[] = {
{ MX31_3DS_GPIO_SDHC1_CD, GPIOF_IN, "sdhc1-card-detect" },
{ MX31_3DS_GPIO_SDHC1_BE, GPIOF_OUT_INIT_LOW, "sdhc1-bus-en" },
};
static int mx31_3ds_sdhc1_init(struct device *dev,
irq_handler_t detect_irq,
void *data)
{
int ret;
ret = gpio_request_array(mx31_3ds_sdhc1_gpios,
ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
if (ret) {
pr_warn("Unable to request the SD/MMC GPIOs.\n");
return ret;
}
ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)),
detect_irq,
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
"sdhc1-detect", data);
if (ret) {
pr_warn("Unable to request the SD/MMC card-detect IRQ.\n");
goto gpio_free;
}
return 0;
gpio_free:
gpio_free_array(mx31_3ds_sdhc1_gpios,
ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
return ret;
}
static void mx31_3ds_sdhc1_exit(struct device *dev, void *data)
{
free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)), data);
gpio_free_array(mx31_3ds_sdhc1_gpios,
ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
}
static void mx31_3ds_sdhc1_setpower(struct device *dev, unsigned int vdd)
{
/*
* While the voltage stuff is done by the driver, activate the
* Buffer Enable Pin only if there is a card in slot to fix the card
* voltage issue caused by bi-directional chip TXB0108 on 3Stack.
* Done here because at this stage we have for sure a debounced value
* of the presence of the card, showed by the value of vdd.
* 7 == ilog2(MMC_VDD_165_195)
*/
if (vdd > 7)
gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 1);
else
gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 0);
}
static struct imxmmc_platform_data sdhc1_pdata = {
.init = mx31_3ds_sdhc1_init,
.exit = mx31_3ds_sdhc1_exit,
.setpower = mx31_3ds_sdhc1_setpower,
};
/*
* Matrix keyboard
*/
static const uint32_t mx31_3ds_keymap[] = {
KEY(0, 0, KEY_UP),
KEY(0, 1, KEY_DOWN),
KEY(1, 0, KEY_RIGHT),
KEY(1, 1, KEY_LEFT),
KEY(1, 2, KEY_ENTER),
KEY(2, 0, KEY_F6),
KEY(2, 1, KEY_F8),
KEY(2, 2, KEY_F9),
KEY(2, 3, KEY_F10),
};
static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
.keymap = mx31_3ds_keymap,
.keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
};
/* Regulators */
static struct regulator_init_data pwgtx_init = {
.constraints = {
.boot_on = 1,
.always_on = 1,
},
};
static struct regulator_init_data gpo_init = {
.constraints = {
.boot_on = 1,
.always_on = 1,
}
};
static struct regulator_consumer_supply vmmc2_consumers[] = {
REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"),
};
static struct regulator_init_data vmmc2_init = {
.constraints = {
.min_uV = 3000000,
.max_uV = 3000000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(vmmc2_consumers),
.consumer_supplies = vmmc2_consumers,
};
static struct regulator_consumer_supply vmmc1_consumers[] = {
REGULATOR_SUPPLY("vcore", "spi0.0"),
};
static struct regulator_init_data vmmc1_init = {
.constraints = {
.min_uV = 2800000,
.max_uV = 2800000,
.apply_uV = 1,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
.consumer_supplies = vmmc1_consumers,
};
static struct regulator_consumer_supply vgen_consumers[] = {
REGULATOR_SUPPLY("vdd", "spi0.0"),
};
static struct regulator_init_data vgen_init = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = 1,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
.consumer_supplies = vgen_consumers,
};
static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
{
.id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
.init_data = &pwgtx_init,
}, {
.id = MC13783_REG_PWGT2SPI, /* Power Gate for L2 Cache. */
.init_data = &pwgtx_init,
}, {
.id = MC13783_REG_GPO1, /* Turn on 1.8V */
.init_data = &gpo_init,
}, {
.id = MC13783_REG_GPO3, /* Turn on 3.3V */
.init_data = &gpo_init,
}, {
.id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */
.init_data = &vmmc2_init,
}, {
.id = MC13783_REG_VMMC1, /* Power LCD, CMOS, FM, GPS, Accel. */
.init_data = &vmmc1_init,
}, {
.id = MC13783_REG_VGEN, /* Power LCD */
.init_data = &vgen_init,
},
};
/* MC13783 */
static struct mc13xxx_codec_platform_data mx31_3ds_codec = {
.dac_ssi_port = MC13783_SSI1_PORT,
.adc_ssi_port = MC13783_SSI1_PORT,
};
static struct mc13xxx_platform_data mc13783_pdata = {
.regulators = {
.regulators = mx31_3ds_regulators,
.num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
},
.codec = &mx31_3ds_codec,
.flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC | MC13XXX_USE_CODEC,
};
static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = {
.flags = IMX_SSI_DMA | IMX_SSI_NET,
};
static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
{
.modalias = "mc13783",
.max_speed_hz = 1000000,
.bus_num = 1,
.chip_select = 2, /* SS2 */
.platform_data = &mc13783_pdata,
/* irq number is run-time assigned */
.mode = SPI_CS_HIGH,
}, {
.modalias = "l4f00242t03",
.max_speed_hz = 5000000,
.bus_num = 0,
.chip_select = 2, /* SS2 */
},
};
/*
* NAND Flash
*/
static const struct mxc_nand_platform_data
mx31_3ds_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
#ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT
.flash_bbt = 1,
#endif
};
/*
* USB OTG
*/
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
#define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
#define USBH2_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_BYP)
static int mx31_3ds_usbotg_init(void)
{
int err;
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
err = gpio_request(USBOTG_RST_B, "otgusb-reset");
if (err) {
pr_err("Failed to request the USB OTG reset gpio\n");
return err;
}
err = gpio_direction_output(USBOTG_RST_B, 0);
if (err) {
pr_err("Failed to drive the USB OTG reset gpio\n");
goto usbotg_free_reset;
}
mdelay(1);
gpio_set_value(USBOTG_RST_B, 1);
return 0;
usbotg_free_reset:
gpio_free(USBOTG_RST_B);
return err;
}
static int mx31_3ds_otg_init(struct platform_device *pdev)
{
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}
static int mx31_3ds_host2_init(struct platform_device *pdev)
{
int err;
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_PC_VS2, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_PC_BVD1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_PC_BVD2, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_PC_RST, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_IOIS16, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_PC_RW_B, USB_PAD_CFG);
err = gpio_request(USBH2_RST_B, "usbh2-reset");
if (err) {
pr_err("Failed to request the USB Host 2 reset gpio\n");
return err;
}
err = gpio_direction_output(USBH2_RST_B, 0);
if (err) {
pr_err("Failed to drive the USB Host 2 reset gpio\n");
goto usbotg_free_reset;
}
mdelay(1);
gpio_set_value(USBH2_RST_B, 1);
mdelay(10);
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
usbotg_free_reset:
gpio_free(USBH2_RST_B);
return err;
}
static struct mxc_usbh_platform_data otg_pdata __initdata = {
.init = mx31_3ds_otg_init,
.portsc = MXC_EHCI_MODE_ULPI,
};
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
.init = mx31_3ds_host2_init,
.portsc = MXC_EHCI_MODE_ULPI,
};
static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_ULPI,
};
static bool otg_mode_host __initdata;
static int __init mx31_3ds_otg_mode(char *options)
{
if (!strcmp(options, "host"))
otg_mode_host = true;
else if (!strcmp(options, "device"))
otg_mode_host = false;
else
pr_info("otg_mode neither \"host\" nor \"device\". "
"Defaulting to device\n");
return 1;
}
__setup("otg_mode=", mx31_3ds_otg_mode);
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static const struct imxi2c_platform_data mx31_3ds_i2c0_data __initconst = {
.bitrate = 100000,
};
static void __init mx31_3ds_init(void)
{
imx31_soc_init();
/* Configure SPI1 IOMUX */
mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true);
mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
"mx31_3ds");
imx31_add_imx_uart0(&uart_pdata);
imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
imx31_add_spi_imx1(NULL);
imx31_add_imx_keypad(&mx31_3ds_keymap_data);
imx31_add_imx2_wdt();
imx31_add_imx_i2c0(&mx31_3ds_i2c0_data);
imx31_add_spi_imx0(NULL);
imx31_add_ipu_core();
imx31_add_mx3_sdc_fb(&mx3fb_pdata);
imx31_add_imx_ssi(0, &mx31_3ds_ssi_pdata);
imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
}
static void __init mx31_3ds_late(void)
{
gpiod_add_lookup_table(&mx31_3ds_lcd_gpiod_table);
mx31_3ds_spi_devs[0].irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
spi_register_board_info(mx31_3ds_spi_devs,
ARRAY_SIZE(mx31_3ds_spi_devs));
mx31_3ds_usbotg_init();
if (otg_mode_host) {
otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (otg_pdata.otg)
imx31_add_mxc_ehci_otg(&otg_pdata);
}
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (usbh2_pdata.otg)
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
if (!otg_mode_host)
imx31_add_fsl_usb2_udc(&usbotg_pdata);
if (mxc_expio_init(MX31_CS5_BASE_ADDR, IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)))
printk(KERN_WARNING "Init of the debug board failed, all "
"devices on the debug board are unusable.\n");
imx31_add_mxc_mmc(0, &sdhc1_pdata);
}
static void __init mx31_3ds_timer_init(void)
{
mx31_clocks_init(26000000);
}
MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
/* Maintainer: Freescale Semiconductor, Inc. */
.atag_offset = 0x100,
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = mx31_3ds_timer_init,
.init_machine = mx31_3ds_init,
.init_late = mx31_3ds_late,
.restart = mxc_restart,
MACHINE_END

312
arch/arm/mach-imx/mach-mx31lilly.c
View File

@ -1,312 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* LILLY-1131 module support
*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
*
* based on code for other MX31 boards,
*
* Copyright 2005-2007 Freescale Semiconductor
* Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/moduleparam.h>
#include <linux/smsc911x.h>
#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/mfd/mc13783.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include "board-mx31lilly.h"
#include "common.h"
#include "devices-imx31.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"
/*
* This file contains module-specific initialization routines for LILLY-1131.
* Initialization of peripherals found on the baseboard is implemented in the
* appropriate baseboard support code.
*/
static unsigned int mx31lilly_pins[] __initdata = {
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
MX31_PIN_CTS2__CTS2,
MX31_PIN_RTS2__RTS2,
MX31_PIN_TXD2__TXD2,
MX31_PIN_RXD2__RXD2,
MX31_PIN_CSPI3_MOSI__RXD3,
MX31_PIN_CSPI3_MISO__TXD3,
MX31_PIN_CSPI3_SCLK__RTS3,
MX31_PIN_CSPI3_SPI_RDY__CTS3,
};
/* UART */
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
/* SMSC ethernet support */
static struct resource smsc91x_resources[] = {
{
.start = MX31_CS4_BASE_ADDR,
.end = MX31_CS4_BASE_ADDR + 0xffff,
.flags = IORESOURCE_MEM,
},
{
/* irq number is run-time assigned */
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
}
};
static struct smsc911x_platform_config smsc911x_config = {
.phy_interface = PHY_INTERFACE_MODE_MII,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
.flags = SMSC911X_USE_32BIT |
SMSC911X_SAVE_MAC_ADDRESS |
SMSC911X_FORCE_INTERNAL_PHY,
};
static struct platform_device smsc91x_device = {
.name = "smsc911x",
.id = -1,
.num_resources = ARRAY_SIZE(smsc91x_resources),
.resource = smsc91x_resources,
.dev = {
.platform_data = &smsc911x_config,
}
};
/* NOR flash */
static struct physmap_flash_data nor_flash_data = {
.width = 2,
};
static struct resource nor_flash_resource = {
.start = 0xa0000000,
.end = 0xa1ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device physmap_flash_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &nor_flash_data,
},
.resource = &nor_flash_resource,
.num_resources = 1,
};
/* USB */
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
static int usbh1_init(struct platform_device *pdev)
{
int pins[] = {
MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
MX31_PIN_CSPI1_MISO__USBH1_RXDP,
MX31_PIN_CSPI1_SS0__USBH1_TXDM,
MX31_PIN_CSPI1_SS1__USBH1_TXDP,
MX31_PIN_CSPI1_SS2__USBH1_RCV,
MX31_PIN_CSPI1_SCLK__USBH1_OEB,
MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
};
mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
mdelay(10);
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
MXC_EHCI_INTERFACE_SINGLE_UNI);
}
static int usbh2_init(struct platform_device *pdev)
{
int pins[] = {
MX31_PIN_USBH2_DATA0__USBH2_DATA0,
MX31_PIN_USBH2_DATA1__USBH2_DATA1,
MX31_PIN_USBH2_CLK__USBH2_CLK,
MX31_PIN_USBH2_DIR__USBH2_DIR,
MX31_PIN_USBH2_NXT__USBH2_NXT,
MX31_PIN_USBH2_STP__USBH2_STP,
};
mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
/* chip select */
mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
"USBH2_CS");
gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
mdelay(10);
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}
static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
.init = usbh1_init,
.portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
};
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
.init = usbh2_init,
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};
static void __init lilly1131_usb_init(void)
{
imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (usbh2_pdata.otg)
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
}
static struct mc13xxx_platform_data mc13783_pdata __initdata = {
.flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
};
static struct spi_board_info mc13783_dev __initdata = {
.modalias = "mc13783",
.max_speed_hz = 1000000,
.bus_num = 1,
.chip_select = 0,
.platform_data = &mc13783_pdata,
/* irq number is run-time assigned */
};
static struct platform_device *devices[] __initdata = {
&smsc91x_device,
&physmap_flash_device,
};
static int mx31lilly_baseboard;
core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
static void __init mx31lilly_board_init(void)
{
imx31_soc_init();
mxc_iomux_setup_multiple_pins(mx31lilly_pins,
ARRAY_SIZE(mx31lilly_pins), "mx31lily");
imx31_add_imx_uart0(&uart_pdata);
imx31_add_imx_uart1(&uart_pdata);
imx31_add_imx_uart2(&uart_pdata);
mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
/* SPI */
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
imx31_add_spi_imx0(NULL);
imx31_add_spi_imx1(NULL);
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
}
static void __init mx31lilly_late_init(void)
{
if (mx31lilly_baseboard == MX31LILLY_DB)
mx31lilly_db_init();
mc13783_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
spi_register_board_info(&mc13783_dev, 1);
smsc91x_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
smsc91x_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
platform_add_devices(devices, ARRAY_SIZE(devices));
/* USB */
lilly1131_usb_init();
}
static void __init mx31lilly_timer_init(void)
{
mx31_clocks_init(26000000);
}
MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
.atag_offset = 0x100,
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = mx31lilly_timer_init,
.init_machine = mx31lilly_board_init,
.init_late = mx31lilly_late_init,
.restart = mxc_restart,
MACHINE_END

290
arch/arm/mach-imx/mach-mx31lite.c
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@ -1,290 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2000 Deep Blue Solutions Ltd
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/memory.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/moduleparam.h>
#include <linux/smsc911x.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/mtd/physmap.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <asm/page.h>
#include <asm/setup.h>
#include "board-mx31lite.h"
#include "common.h"
#include "devices-imx31.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"
/*
* This file contains the module-specific initialization routines.
*/
static unsigned int mx31lite_pins[] = {
/* UART1 */
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
/* SPI 0 */
MX31_PIN_CSPI1_SCLK__SCLK,
MX31_PIN_CSPI1_MOSI__MOSI,
MX31_PIN_CSPI1_MISO__MISO,
MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI1_SS0__SS0,
MX31_PIN_CSPI1_SS1__SS1,
MX31_PIN_CSPI1_SS2__SS2,
/* LAN9117 IRQ pin */
IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
/* SPI 1 */
MX31_PIN_CSPI2_SCLK__SCLK,
MX31_PIN_CSPI2_MOSI__MOSI,
MX31_PIN_CSPI2_MISO__MISO,
MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI2_SS0__SS0,
MX31_PIN_CSPI2_SS1__SS1,
MX31_PIN_CSPI2_SS2__SS2,
};
/* UART */
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static const struct mxc_nand_platform_data
mx31lite_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
static struct smsc911x_platform_config smsc911x_config = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
.flags = SMSC911X_USE_16BIT,
};
static struct resource smsc911x_resources[] = {
{
.start = MX31_CS4_BASE_ADDR,
.end = MX31_CS4_BASE_ADDR + 0x100,
.flags = IORESOURCE_MEM,
}, {
/* irq number is run-time assigned */
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device smsc911x_device = {
.name = "smsc911x",
.id = -1,
.num_resources = ARRAY_SIZE(smsc911x_resources),
.resource = smsc911x_resources,
.dev = {
.platform_data = &smsc911x_config,
},
};
static struct mc13xxx_platform_data mc13783_pdata __initdata = {
.flags = MC13XXX_USE_RTC,
};
static struct spi_board_info mc13783_spi_dev __initdata = {
.modalias = "mc13783",
.max_speed_hz = 1000000,
.bus_num = 1,
.chip_select = 0,
.platform_data = &mc13783_pdata,
/* irq number is run-time assigned */
};
/*
* USB
*/
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
static int usbh2_init(struct platform_device *pdev)
{
int pins[] = {
MX31_PIN_USBH2_DATA0__USBH2_DATA0,
MX31_PIN_USBH2_DATA1__USBH2_DATA1,
MX31_PIN_USBH2_CLK__USBH2_CLK,
MX31_PIN_USBH2_DIR__USBH2_DIR,
MX31_PIN_USBH2_NXT__USBH2_NXT,
MX31_PIN_USBH2_STP__USBH2_STP,
};
mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
/* chip select */
mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
"USBH2_CS");
gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
mdelay(10);
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
.init = usbh2_init,
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};
/*
* NOR flash
*/
static struct physmap_flash_data nor_flash_data = {
.width = 2,
};
static struct resource nor_flash_resource = {
.start = 0xa0000000,
.end = 0xa1ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device physmap_flash_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &nor_flash_data,
},
.resource = &nor_flash_resource,
.num_resources = 1,
};
/*
* This structure defines the MX31 memory map.
*/
static struct map_desc mx31lite_io_desc[] __initdata = {
{
.virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
.length = MX31_CS4_SIZE,
.type = MT_DEVICE
}
};
/*
* Set up static virtual mappings.
*/
static void __init mx31lite_map_io(void)
{
mx31_map_io();
iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
}
static int mx31lite_baseboard;
core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
static void __init mx31lite_init(void)
{
imx31_soc_init();
mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
"mx31lite");
imx31_add_imx_uart0(&uart_pdata);
imx31_add_spi_imx0(NULL);
/* NOR and NAND flash */
platform_device_register(&physmap_flash_device);
imx31_add_mxc_nand(&mx31lite_nand_board_info);
imx31_add_spi_imx1(NULL);
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
}
static void __init mx31lite_late(void)
{
int ret;
if (mx31lite_baseboard == MX31LITE_DB)
mx31lite_db_init();
mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
spi_register_board_info(&mc13783_spi_dev, 1);
/* USB */
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (usbh2_pdata.otg)
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
/* SMSC9117 IRQ pin */
ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
if (ret)
pr_warn("could not get LAN irq gpio\n");
else {
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
smsc911x_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
smsc911x_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
platform_device_register(&smsc911x_device);
}
}
static void __init mx31lite_timer_init(void)
{
mx31_clocks_init(26000000);
}
MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
/* Maintainer: Freescale Semiconductor, Inc. */
.atag_offset = 0x100,
.map_io = mx31lite_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = mx31lite_timer_init,
.init_machine = mx31lite_init,
.init_late = mx31lite_late,
.restart = mxc_restart,
MACHINE_END

581
arch/arm/mach-imx/mach-mx31moboard.c
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@ -1,581 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group
*/
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/gfp.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/moduleparam.h>
#include <linux/leds.h>
#include <linux/memory.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/types.h>
#include <linux/memblock.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/input.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <asm/memblock.h>
#include <linux/platform_data/asoc-imx-ssi.h>
#include "board-mx31moboard.h"
#include "common.h"
#include "devices-imx31.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"
static unsigned int moboard_pins[] = {
/* UART0 */
MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1,
MX31_PIN_CTS1__GPIO2_7,
/* UART4 */
MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5,
MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5,
/* I2C0 */
MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL,
/* I2C1 */
MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL,
/* SDHC1 */
MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2,
MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0,
MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD,
MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27,
/* USB reset */
MX31_PIN_GPIO1_0__GPIO1_0,
/* USB OTG */
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
MX31_PIN_USB_OC__GPIO1_30,
/* USB H2 */
MX31_PIN_USBH2_DATA0__USBH2_DATA0,
MX31_PIN_USBH2_DATA1__USBH2_DATA1,
MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3,
MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5,
MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7,
MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR,
MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP,
MX31_PIN_SCK6__GPIO1_25,
/* LEDs */
MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
/* SPI1 */
MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO,
MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2,
/* Atlas IRQ */
MX31_PIN_GPIO1_3__GPIO1_3,
/* SPI2 */
MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO,
MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI2_SS1__CSPI3_SS1,
/* SSI */
MX31_PIN_STXD4__STXD4, MX31_PIN_SRXD4__SRXD4,
MX31_PIN_SCK4__SCK4, MX31_PIN_SFS4__SFS4,
};
static struct physmap_flash_data mx31moboard_flash_data = {
.width = 2,
};
static struct resource mx31moboard_flash_resource = {
.start = 0xa0000000,
.end = 0xa1ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device mx31moboard_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &mx31moboard_flash_data,
},
.resource = &mx31moboard_flash_resource,
.num_resources = 1,
};
static void __init moboard_uart0_init(void)
{
if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack")) {
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0);
gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1));
}
}
static const struct imxuart_platform_data uart0_pdata __initconst = {
};
static const struct imxuart_platform_data uart4_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static const struct imxi2c_platform_data moboard_i2c0_data __initconst = {
.bitrate = 400000,
};
static const struct imxi2c_platform_data moboard_i2c1_data __initconst = {
.bitrate = 100000,
};
static struct regulator_consumer_supply sdhc_consumers[] = {
{
.dev_name = "imx31-mmc.0",
.supply = "sdhc0_vcc",
},
{
.dev_name = "imx31-mmc.1",
.supply = "sdhc1_vcc",
},
};
static struct regulator_init_data sdhc_vreg_data = {
.constraints = {
.min_uV = 2700000,
.max_uV = 3000000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
.valid_modes_mask = REGULATOR_MODE_NORMAL |
REGULATOR_MODE_FAST,
.always_on = 0,
.boot_on = 1,
},
.num_consumer_supplies = ARRAY_SIZE(sdhc_consumers),
.consumer_supplies = sdhc_consumers,
};
static struct regulator_consumer_supply cam_consumers[] = {
{
.dev_name = "mx3_camera.0",
.supply = "cam_vcc",
},
};
static struct regulator_init_data cam_vreg_data = {
.constraints = {
.min_uV = 2700000,
.max_uV = 3000000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
.valid_modes_mask = REGULATOR_MODE_NORMAL |
REGULATOR_MODE_FAST,
.always_on = 0,
.boot_on = 1,
},
.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
.consumer_supplies = cam_consumers,
};
static struct mc13xxx_regulator_init_data moboard_regulators[] = {
{
.id = MC13783_REG_VMMC1,
.init_data = &sdhc_vreg_data,
},
{
.id = MC13783_REG_VCAM,
.init_data = &cam_vreg_data,
},
};
static struct mc13xxx_led_platform_data moboard_led[] = {
{
.id = MC13783_LED_R1,
.name = "coreboard-led-4:red",
},
{
.id = MC13783_LED_G1,
.name = "coreboard-led-4:green",
},
{
.id = MC13783_LED_B1,
.name = "coreboard-led-4:blue",
},
{
.id = MC13783_LED_R2,
.name = "coreboard-led-5:red",
},
{
.id = MC13783_LED_G2,
.name = "coreboard-led-5:green",
},
{
.id = MC13783_LED_B2,
.name = "coreboard-led-5:blue",
},
};
static struct mc13xxx_leds_platform_data moboard_leds = {
.num_leds = ARRAY_SIZE(moboard_led),
.led = moboard_led,
.led_control[0] = MC13783_LED_C0_ENABLE | MC13783_LED_C0_ABMODE(0),
.led_control[1] = MC13783_LED_C1_SLEWLIM,
.led_control[2] = MC13783_LED_C2_SLEWLIM,
.led_control[3] = MC13783_LED_C3_PERIOD(0) |
MC13783_LED_C3_CURRENT_R1(2) |
MC13783_LED_C3_CURRENT_G1(2) |
MC13783_LED_C3_CURRENT_B1(2),
.led_control[4] = MC13783_LED_C4_PERIOD(0) |
MC13783_LED_C4_CURRENT_R2(3) |
MC13783_LED_C4_CURRENT_G2(3) |
MC13783_LED_C4_CURRENT_B2(3),
};
static struct mc13xxx_buttons_platform_data moboard_buttons = {
.b1on_flags = MC13783_BUTTON_DBNC_750MS | MC13783_BUTTON_ENABLE |
MC13783_BUTTON_POL_INVERT,
.b1on_key = KEY_POWER,
};
static struct mc13xxx_codec_platform_data moboard_codec = {
.dac_ssi_port = MC13783_SSI1_PORT,
.adc_ssi_port = MC13783_SSI1_PORT,
};
static struct mc13xxx_platform_data moboard_pmic = {
.regulators = {
.regulators = moboard_regulators,
.num_regulators = ARRAY_SIZE(moboard_regulators),
},
.leds = &moboard_leds,
.buttons = &moboard_buttons,
.codec = &moboard_codec,
.flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC | MC13XXX_USE_CODEC,
};
static struct imx_ssi_platform_data moboard_ssi_pdata = {
.flags = IMX_SSI_DMA | IMX_SSI_NET,
};
static struct spi_board_info moboard_spi_board_info[] __initdata = {
{
.modalias = "mc13783",
/* irq number is run-time assigned */
.max_speed_hz = 300000,
.bus_num = 1,
.chip_select = 0,
.platform_data = &moboard_pmic,
.mode = SPI_CS_HIGH,
},
};
#define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0)
#define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1)
static int moboard_sdhc1_get_ro(struct device *dev)
{
return !gpio_get_value(SDHC1_WP);
}
static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
void *data)
{
int ret;
ret = gpio_request(SDHC1_CD, "sdhc-detect");
if (ret)
return ret;
gpio_direction_input(SDHC1_CD);
ret = gpio_request(SDHC1_WP, "sdhc-wp");
if (ret)
goto err_gpio_free;
gpio_direction_input(SDHC1_WP);
ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"sdhc1-card-detect", data);
if (ret)
goto err_gpio_free_2;
return 0;
err_gpio_free_2:
gpio_free(SDHC1_WP);
err_gpio_free:
gpio_free(SDHC1_CD);
return ret;
}
static void moboard_sdhc1_exit(struct device *dev, void *data)
{
free_irq(gpio_to_irq(SDHC1_CD), data);
gpio_free(SDHC1_WP);
gpio_free(SDHC1_CD);
}
static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
.get_ro = moboard_sdhc1_get_ro,
.init = moboard_sdhc1_init,
.exit = moboard_sdhc1_exit,
};
/*
* this pin is dedicated for all mx31moboard systems, so we do it here
*/
#define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS)
#define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC)
#define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6)
static void usb_xcvr_reset(void)
{
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG | PAD_CTL_100K_PD);
gpio_request(OTG_EN_B, "usb-udc-en");
gpio_direction_output(OTG_EN_B, 0);
gpio_request(USBH2_EN_B, "usbh2-en");
gpio_direction_output(USBH2_EN_B, 0);
gpio_request(USB_RESET_B, "usb-reset");
gpio_direction_output(USB_RESET_B, 0);
mdelay(1);
gpio_set_value(USB_RESET_B, 1);
mdelay(1);
}
static int moboard_usbh2_init_hw(struct platform_device *pdev)
{
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
.init = moboard_usbh2_init_hw,
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};
static int __init moboard_usbh2_init(void)
{
struct platform_device *pdev;
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (!usbh2_pdata.otg)
return -ENODEV;
pdev = imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
return PTR_ERR_OR_ZERO(pdev);
}
static const struct gpio_led mx31moboard_leds[] __initconst = {
{
.name = "coreboard-led-0:red:running",
.default_trigger = "heartbeat",
.gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0),
}, {
.name = "coreboard-led-1:red",
.gpio = IOMUX_TO_GPIO(MX31_PIN_STX0),
}, {
.name = "coreboard-led-2:red",
.gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0),
}, {
.name = "coreboard-led-3:red",
.gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0),
},
};
static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = {
.num_leds = ARRAY_SIZE(mx31moboard_leds),
.leds = mx31moboard_leds,
};
static struct platform_device *devices[] __initdata = {
&mx31moboard_flash,
};
static struct mx3_camera_pdata camera_pdata __initdata = {
.flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
.mclk_10khz = 4800,
};
static phys_addr_t mx3_camera_base __initdata;
#define MX3_CAMERA_BUF_SIZE SZ_4M
static int __init mx31moboard_init_cam(void)
{
int ret;
struct platform_device *pdev;
imx31_add_ipu_core();
pdev = imx31_alloc_mx3_camera(&camera_pdata);
if (IS_ERR(pdev))
return PTR_ERR(pdev);
ret = dma_declare_coherent_memory(&pdev->dev,
mx3_camera_base, mx3_camera_base,
MX3_CAMERA_BUF_SIZE);
if (ret)
goto err;
ret = platform_device_add(pdev);
if (ret)
err:
platform_device_put(pdev);
return ret;
}
static void mx31moboard_poweroff(void)
{
struct clk *clk = clk_get_sys("imx2-wdt.0", NULL);
if (!IS_ERR(clk))
clk_prepare_enable(clk);
mxc_iomux_mode(MX31_PIN_WATCHDOG_RST__WATCHDOG_RST);
imx_writew(1 << 6 | 1 << 2, MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
}
static int mx31moboard_baseboard;
core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444);
/*
* Board specific initialization.
*/
static void __init mx31moboard_init(void)
{
imx31_soc_init();
mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins),
"moboard");
platform_add_devices(devices, ARRAY_SIZE(devices));
imx31_add_imx2_wdt();
imx31_add_imx_uart0(&uart0_pdata);
imx31_add_imx_uart4(&uart4_pdata);
imx31_add_imx_i2c0(&moboard_i2c0_data);
imx31_add_imx_i2c1(&moboard_i2c1_data);
imx31_add_spi_imx1(NULL);
imx31_add_spi_imx2(NULL);
mx31moboard_init_cam();
imx31_add_imx_ssi(0, &moboard_ssi_pdata);
pm_power_off = mx31moboard_poweroff;
}
static void __init mx31moboard_late(void)
{
gpio_led_register_device(-1, &mx31moboard_led_pdata);
moboard_uart0_init();
gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq");
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
moboard_spi_board_info[0].irq =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
spi_register_board_info(moboard_spi_board_info,
ARRAY_SIZE(moboard_spi_board_info));
imx31_add_mxc_mmc(0, &sdhc1_pdata);
usb_xcvr_reset();
moboard_usbh2_init();
imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
switch (mx31moboard_baseboard) {
case MX31NOBOARD:
break;
case MX31DEVBOARD:
mx31moboard_devboard_init();
break;
case MX31MARXBOT:
mx31moboard_marxbot_init();
break;
case MX31SMARTBOT:
case MX31EYEBOT:
mx31moboard_smartbot_init(mx31moboard_baseboard);
break;
default:
printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n",
mx31moboard_baseboard);
}
}
static void __init mx31moboard_timer_init(void)
{
mx31_clocks_init(26000000);
}
static void __init mx31moboard_reserve(void)
{
/* reserve 4 MiB for mx3-camera */
mx3_camera_base = arm_memblock_steal(MX3_CAMERA_BUF_SIZE,
MX3_CAMERA_BUF_SIZE);
}
MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
/* Maintainer: Philippe Retornaz, EPFL Mobots group */
.atag_offset = 0x100,
.reserve = mx31moboard_reserve,
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = mx31moboard_timer_init,
.init_machine = mx31moboard_init,
.init_late = mx31moboard_late,
.restart = mxc_restart,
MACHINE_END

585
arch/arm/mach-imx/mach-pcm037.c
View File

@ -1,585 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2008 Sascha Hauer, Pengutronix
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/plat-ram.h>
#include <linux/memory.h>
#include <linux/gpio.h>
#include <linux/smsc911x.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/property.h>
#include <linux/delay.h>
#include <linux/spi/spi.h>
#include <linux/irq.h>
#include <linux/can/platform/sja1000.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/gfp.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include "common.h"
#include "devices-imx31.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "pcm037.h"
#include "ulpi.h"
static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
static int __init pcm037_variant_setup(char *str)
{
if (!strcmp("eet", str))
pcm037_instance = PCM037_EET;
else if (strcmp("pcm970", str))
pr_warn("Unknown pcm037 baseboard variant %s\n", str);
return 1;
}
/* Supported values: "pcm970" (default) and "eet" */
__setup("pcm037_variant=", pcm037_variant_setup);
enum pcm037_board_variant pcm037_variant(void)
{
return pcm037_instance;
}
/* UART1 with RTS/CTS handshake signals */
static unsigned int pcm037_uart1_handshake_pins[] = {
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
};
/* UART1 without RTS/CTS handshake signals */
static unsigned int pcm037_uart1_pins[] = {
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
};
static unsigned int pcm037_pins[] = {
/* I2C */
MX31_PIN_CSPI2_MOSI__SCL,
MX31_PIN_CSPI2_MISO__SDA,
MX31_PIN_CSPI2_SS2__I2C3_SDA,
MX31_PIN_CSPI2_SCLK__I2C3_SCL,
/* SDHC1 */
MX31_PIN_SD1_DATA3__SD1_DATA3,
MX31_PIN_SD1_DATA2__SD1_DATA2,
MX31_PIN_SD1_DATA1__SD1_DATA1,
MX31_PIN_SD1_DATA0__SD1_DATA0,
MX31_PIN_SD1_CLK__SD1_CLK,
MX31_PIN_SD1_CMD__SD1_CMD,
IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
/* SPI1 */
MX31_PIN_CSPI1_MOSI__MOSI,
MX31_PIN_CSPI1_MISO__MISO,
MX31_PIN_CSPI1_SCLK__SCLK,
MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI1_SS0__SS0,
MX31_PIN_CSPI1_SS1__SS1,
MX31_PIN_CSPI1_SS2__SS2,
/* UART2 */
MX31_PIN_TXD2__TXD2,
MX31_PIN_RXD2__RXD2,
MX31_PIN_CTS2__CTS2,
MX31_PIN_RTS2__RTS2,
/* UART3 */
MX31_PIN_CSPI3_MOSI__RXD3,
MX31_PIN_CSPI3_MISO__TXD3,
MX31_PIN_CSPI3_SCLK__RTS3,
MX31_PIN_CSPI3_SPI_RDY__CTS3,
/* LAN9217 irq pin */
IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
/* Onewire */
MX31_PIN_BATT_LINE__OWIRE,
/* Framebuffer */
MX31_PIN_LD0__LD0,
MX31_PIN_LD1__LD1,
MX31_PIN_LD2__LD2,
MX31_PIN_LD3__LD3,
MX31_PIN_LD4__LD4,
MX31_PIN_LD5__LD5,
MX31_PIN_LD6__LD6,
MX31_PIN_LD7__LD7,
MX31_PIN_LD8__LD8,
MX31_PIN_LD9__LD9,
MX31_PIN_LD10__LD10,
MX31_PIN_LD11__LD11,
MX31_PIN_LD12__LD12,
MX31_PIN_LD13__LD13,
MX31_PIN_LD14__LD14,
MX31_PIN_LD15__LD15,
MX31_PIN_LD16__LD16,
MX31_PIN_LD17__LD17,
MX31_PIN_VSYNC3__VSYNC3,
MX31_PIN_HSYNC__HSYNC,
MX31_PIN_FPSHIFT__FPSHIFT,
MX31_PIN_DRDY0__DRDY0,
MX31_PIN_D3_REV__D3_REV,
MX31_PIN_CONTRAST__CONTRAST,
MX31_PIN_D3_SPL__D3_SPL,
MX31_PIN_D3_CLS__D3_CLS,
MX31_PIN_LCS0__GPIO3_23,
/* GPIO */
IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
/* OTG */
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
MX31_PIN_USBOTG_CLK__USBOTG_CLK,
MX31_PIN_USBOTG_DIR__USBOTG_DIR,
MX31_PIN_USBOTG_NXT__USBOTG_NXT,
MX31_PIN_USBOTG_STP__USBOTG_STP,
/* USB host 2 */
IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
};
static struct physmap_flash_data pcm037_flash_data = {
.width = 2,
};
static struct resource pcm037_flash_resource = {
.start = 0xa0000000,
.end = 0xa1ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device pcm037_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &pcm037_flash_data,
},
.resource = &pcm037_flash_resource,
.num_resources = 1,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct resource smsc911x_resources[] = {
{
.start = MX31_CS1_BASE_ADDR + 0x300,
.end = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
}, {
/* irq number is run-time assigned */
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
},
};
static struct smsc911x_platform_config smsc911x_info = {
.flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
SMSC911X_SAVE_MAC_ADDRESS,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
.phy_interface = PHY_INTERFACE_MODE_MII,
};
static struct platform_device pcm037_eth = {
.name = "smsc911x",
.id = -1,
.num_resources = ARRAY_SIZE(smsc911x_resources),
.resource = smsc911x_resources,
.dev = {
.platform_data = &smsc911x_info,
},
};
static struct platdata_mtd_ram pcm038_sram_data = {
.bankwidth = 2,
};
static struct resource pcm038_sram_resource = {
.start = MX31_CS4_BASE_ADDR,
.end = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device pcm037_sram_device = {
.name = "mtd-ram",
.id = 0,
.dev = {
.platform_data = &pcm038_sram_data,
},
.num_resources = 1,
.resource = &pcm038_sram_resource,
};
static const struct mxc_nand_platform_data
pcm037_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
static const struct imxi2c_platform_data pcm037_i2c1_data __initconst = {
.bitrate = 100000,
};
static const struct imxi2c_platform_data pcm037_i2c2_data __initconst = {
.bitrate = 20000,
};
static const struct property_entry board_eeprom_properties[] = {
PROPERTY_ENTRY_U32("pagesize", 32),
{ }
};
static struct i2c_board_info pcm037_i2c_devices[] = {
{
I2C_BOARD_INFO("24c32", 0x52), /* E0=0, E1=1, E2=0 */
.properties = board_eeprom_properties,
}, {
I2C_BOARD_INFO("pcf8563", 0x51),
}
};
/* Not connected by default */
#ifdef PCM970_SDHC_RW_SWITCH
static int pcm970_sdhc1_get_ro(struct device *dev)
{
return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
}
#endif
#define SDHC1_GPIO_WP IOMUX_TO_GPIO(MX31_PIN_SFS6)
#define SDHC1_GPIO_DET IOMUX_TO_GPIO(MX31_PIN_SCK6)
static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
void *data)
{
int ret;
ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
if (ret)
return ret;
gpio_direction_input(SDHC1_GPIO_DET);
#ifdef PCM970_SDHC_RW_SWITCH
ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
if (ret)
goto err_gpio_free;
gpio_direction_input(SDHC1_GPIO_WP);
#endif
ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SCK6)), detect_irq,
IRQF_TRIGGER_FALLING, "sdhc-detect", data);
if (ret)
goto err_gpio_free_2;
return 0;
err_gpio_free_2:
#ifdef PCM970_SDHC_RW_SWITCH
gpio_free(SDHC1_GPIO_WP);
err_gpio_free:
#endif
gpio_free(SDHC1_GPIO_DET);
return ret;
}
static void pcm970_sdhc1_exit(struct device *dev, void *data)
{
free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SCK6)), data);
gpio_free(SDHC1_GPIO_DET);
gpio_free(SDHC1_GPIO_WP);
}
static const struct imxmmc_platform_data sdhc_pdata __initconst = {
#ifdef PCM970_SDHC_RW_SWITCH
.get_ro = pcm970_sdhc1_get_ro,
#endif
.init = pcm970_sdhc1_init,
.exit = pcm970_sdhc1_exit,
};
static struct platform_device *devices[] __initdata = {
&pcm037_flash,
&pcm037_sram_device,
};
static const struct fb_videomode fb_modedb[] = {
{
/* 240x320 @ 60 Hz Sharp */
.name = "Sharp-LQ035Q7DH06-QVGA",
.refresh = 60,
.xres = 240,
.yres = 320,
.pixclock = 185925,
.left_margin = 9,
.right_margin = 16,
.upper_margin = 7,
.lower_margin = 9,
.hsync_len = 1,
.vsync_len = 1,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
}, {
/* 240x320 @ 60 Hz */
.name = "TX090",
.refresh = 60,
.xres = 240,
.yres = 320,
.pixclock = 38255,
.left_margin = 144,
.right_margin = 0,
.upper_margin = 7,
.lower_margin = 40,
.hsync_len = 96,
.vsync_len = 1,
.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
}, {
/* 240x320 @ 60 Hz */
.name = "CMEL-OLED",
.refresh = 60,
.xres = 240,
.yres = 320,
.pixclock = 185925,
.left_margin = 9,
.right_margin = 16,
.upper_margin = 7,
.lower_margin = 9,
.hsync_len = 1,
.vsync_len = 1,
.sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
},
};
static struct mx3fb_platform_data mx3fb_pdata = {
.name = "Sharp-LQ035Q7DH06-QVGA",
.mode = fb_modedb,
.num_modes = ARRAY_SIZE(fb_modedb),
};
static struct resource pcm970_sja1000_resources[] = {
{
.start = MX31_CS5_BASE_ADDR,
.end = MX31_CS5_BASE_ADDR + 0x100 - 1,
.flags = IORESOURCE_MEM,
}, {
/* irq number is run-time assigned */
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
},
};
static struct sja1000_platform_data pcm970_sja1000_platform_data = {
.osc_freq = 16000000,
.ocr = OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
.cdr = CDR_CBP,
};
static struct platform_device pcm970_sja1000 = {
.name = "sja1000_platform",
.dev = {
.platform_data = &pcm970_sja1000_platform_data,
},
.resource = pcm970_sja1000_resources,
.num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
};
static int pcm037_otg_init(struct platform_device *pdev)
{
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}
static struct mxc_usbh_platform_data otg_pdata __initdata = {
.init = pcm037_otg_init,
.portsc = MXC_EHCI_MODE_ULPI,
};
static int pcm037_usbh2_init(struct platform_device *pdev)
{
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
.init = pcm037_usbh2_init,
.portsc = MXC_EHCI_MODE_ULPI,
};
static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_ULPI,
};
static bool otg_mode_host __initdata;
static int __init pcm037_otg_mode(char *options)
{
if (!strcmp(options, "host"))
otg_mode_host = true;
else if (!strcmp(options, "device"))
otg_mode_host = false;
else
pr_info("otg_mode neither \"host\" nor \"device\". "
"Defaulting to device\n");
return 1;
}
__setup("otg_mode=", pcm037_otg_mode);
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
/*
* Board specific initialization.
*/
static void __init pcm037_init(void)
{
imx31_soc_init();
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
"pcm037");
#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
| PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA2 */
mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA3 */
mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA4 */
mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA5 */
mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA6 */
mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA7 */
if (pcm037_variant() == PCM037_EET)
mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
else
mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
ARRAY_SIZE(pcm037_uart1_handshake_pins),
"pcm037_uart1");
platform_add_devices(devices, ARRAY_SIZE(devices));
imx31_add_imx2_wdt();
imx31_add_imx_uart0(&uart_pdata);
/* XXX: should't this have .flags = 0 (i.e. no RTSCTS) on PCM037_EET? */
imx31_add_imx_uart1(&uart_pdata);
imx31_add_imx_uart2(&uart_pdata);
imx31_add_mxc_w1();
/* I2C adapters and devices */
i2c_register_board_info(1, pcm037_i2c_devices,
ARRAY_SIZE(pcm037_i2c_devices));
imx31_add_imx_i2c1(&pcm037_i2c1_data);
imx31_add_imx_i2c2(&pcm037_i2c2_data);
imx31_add_mxc_nand(&pcm037_nand_board_info);
imx31_add_ipu_core();
imx31_add_mx3_sdc_fb(&mx3fb_pdata);
if (otg_mode_host) {
otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (otg_pdata.otg)
imx31_add_mxc_ehci_otg(&otg_pdata);
}
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (usbh2_pdata.otg)
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
if (!otg_mode_host)
imx31_add_fsl_usb2_udc(&otg_device_pdata);
}
static void __init pcm037_timer_init(void)
{
mx31_clocks_init(26000000);
}
static void __init pcm037_init_late(void)
{
int ret;
/* LAN9217 IRQ pin */
ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
if (!ret) {
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
smsc911x_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
smsc911x_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
platform_device_register(&pcm037_eth);
} else {
pr_warn("could not get LAN irq gpio\n");
}
imx31_add_mxc_mmc(0, &sdhc_pdata);
pcm970_sja1000_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105)));
pcm970_sja1000_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105)));
platform_device_register(&pcm970_sja1000);
pcm037_eet_init_devices();
}
MACHINE_START(PCM037, "Phytec Phycore pcm037")
/* Maintainer: Pengutronix */
.atag_offset = 0x100,
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = pcm037_timer_init,
.init_machine = pcm037_init,
.init_late = pcm037_init_late,
.restart = mxc_restart,
MACHINE_END

166
arch/arm/mach-imx/mach-pcm037_eet.c
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@ -1,166 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2009
* Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
*/
#include <linux/gpio.h>
#include <linux/input.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <asm/mach-types.h>
#include "pcm037.h"
#include "common.h"
#include "devices-imx31.h"
#include "iomux-mx3.h"
static unsigned int pcm037_eet_pins[] = {
/* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */
IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_GPIO),
/* GPIO keys */
IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO), /* 0 */
IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), /* 1 */
IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO), /* 2 */
IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), /* 3 */
IOMUX_MODE(MX31_PIN_SVEN0, IOMUX_CONFIG_GPIO), /* 32 */
IOMUX_MODE(MX31_PIN_STX0, IOMUX_CONFIG_GPIO), /* 33 */
IOMUX_MODE(MX31_PIN_SRX0, IOMUX_CONFIG_GPIO), /* 34 */
IOMUX_MODE(MX31_PIN_SIMPD0, IOMUX_CONFIG_GPIO), /* 35 */
IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO), /* 38 */
IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_GPIO), /* 39 */
IOMUX_MODE(MX31_PIN_KEY_ROW4, IOMUX_CONFIG_GPIO), /* 50 */
IOMUX_MODE(MX31_PIN_KEY_ROW5, IOMUX_CONFIG_GPIO), /* 51 */
IOMUX_MODE(MX31_PIN_KEY_ROW6, IOMUX_CONFIG_GPIO), /* 52 */
IOMUX_MODE(MX31_PIN_KEY_ROW7, IOMUX_CONFIG_GPIO), /* 53 */
/* LEDs */
IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_CONFIG_GPIO), /* 44 */
IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_GPIO), /* 45 */
IOMUX_MODE(MX31_PIN_KEY_COL5, IOMUX_CONFIG_GPIO), /* 55 */
IOMUX_MODE(MX31_PIN_KEY_COL6, IOMUX_CONFIG_GPIO), /* 56 */
};
/* SPI */
static struct spi_board_info pcm037_spi_dev[] = {
{
.modalias = "dac124s085",
.max_speed_hz = 400000,
.bus_num = 0,
.chip_select = 1, /* Index in pcm037_spi1_cs[] */
.mode = SPI_CPHA,
},
};
/* GPIO-keys input device */
static struct gpio_keys_button pcm037_gpio_keys[] = {
{
.type = EV_KEY,
.code = KEY_L,
.gpio = 0,
.desc = "Wheel Manual",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_A,
.gpio = 1,
.desc = "Wheel AF",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_V,
.gpio = 2,
.desc = "Wheel View",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_M,
.gpio = 3,
.desc = "Wheel Menu",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_UP,
.gpio = 32,
.desc = "Nav Pad Up",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_RIGHT,
.gpio = 33,
.desc = "Nav Pad Right",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_DOWN,
.gpio = 34,
.desc = "Nav Pad Down",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_LEFT,
.gpio = 35,
.desc = "Nav Pad Left",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_ENTER,
.gpio = 38,
.desc = "Nav Pad Ok",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_O,
.gpio = 39,
.desc = "Wheel Off",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = BTN_FORWARD,
.gpio = 50,
.desc = "Focus Forward",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = BTN_BACK,
.gpio = 51,
.desc = "Focus Backward",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = BTN_MIDDLE,
.gpio = 52,
.desc = "Release Half",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = BTN_EXTRA,
.gpio = 53,
.desc = "Release Full",
.wakeup = 0,
},
};
static const struct gpio_keys_platform_data
pcm037_gpio_keys_platform_data __initconst = {
.buttons = pcm037_gpio_keys,
.nbuttons = ARRAY_SIZE(pcm037_gpio_keys),
.rep = 0, /* No auto-repeat */
};
int __init pcm037_eet_init_devices(void)
{
if (pcm037_variant() != PCM037_EET)
return 0;
mxc_iomux_setup_multiple_pins(pcm037_eet_pins,
ARRAY_SIZE(pcm037_eet_pins), "pcm037_eet");
/* SPI */
spi_register_board_info(pcm037_spi_dev, ARRAY_SIZE(pcm037_spi_dev));
imx31_add_spi_imx0(NULL);
imx_add_gpio_keys(&pcm037_gpio_keys_platform_data);
return 0;
}

262
arch/arm/mach-imx/mach-qong.c
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@ -1,262 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2009 Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/memory.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/platnand.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <asm/page.h>
#include <asm/setup.h>
#include "common.h"
#include "devices-imx31.h"
#include "hardware.h"
#include "iomux-mx3.h"
/* FPGA defines */
#define QONG_FPGA_VERSION(major, minor, rev) \
(((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF))
#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR
#define QONG_FPGA_PERIPH_SIZE (1 << 24)
#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR
#define QONG_FPGA_CTRL_SIZE 0x10
/* FPGA control registers */
#define QONG_FPGA_CTRL_VERSION 0x00
#define QONG_DNET_ID 1
#define QONG_DNET_BASEADDR \
(QONG_FPGA_BASEADDR + QONG_DNET_ID * QONG_FPGA_PERIPH_SIZE)
#define QONG_DNET_SIZE 0x00001000
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static int uart_pins[] = {
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1
};
static inline void __init mxc_init_imx_uart(void)
{
mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins),
"uart-0");
imx31_add_imx_uart0(&uart_pdata);
}
static struct resource dnet_resources[] = {
{
.name = "dnet-memory",
.start = QONG_DNET_BASEADDR,
.end = QONG_DNET_BASEADDR + QONG_DNET_SIZE - 1,
.flags = IORESOURCE_MEM,
}, {
/* irq number is run-time assigned */
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device dnet_device = {
.name = "dnet",
.id = -1,
.num_resources = ARRAY_SIZE(dnet_resources),
.resource = dnet_resources,
};
static int __init qong_init_dnet(void)
{
int ret;
dnet_resources[1].start =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1));
dnet_resources[1].end =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1));
ret = platform_device_register(&dnet_device);
return ret;
}
/* MTD NOR flash */
static struct physmap_flash_data qong_flash_data = {
.width = 2,
};
static struct resource qong_flash_resource = {
.start = MX31_CS0_BASE_ADDR,
.end = MX31_CS0_BASE_ADDR + SZ_128M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device qong_nor_mtd_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &qong_flash_data,
},
.resource = &qong_flash_resource,
.num_resources = 1,
};
static void qong_init_nor_mtd(void)
{
(void)platform_device_register(&qong_nor_mtd_device);
}
/*
* Hardware specific access to control-lines
*/
static void qong_nand_cmd_ctrl(struct nand_chip *nand_chip, int cmd,
unsigned int ctrl)
{
if (cmd == NAND_CMD_NONE)
return;
if (ctrl & NAND_CLE)
writeb(cmd, nand_chip->legacy.IO_ADDR_W + (1 << 24));
else
writeb(cmd, nand_chip->legacy.IO_ADDR_W + (1 << 23));
}
/*
* Read the Device Ready pin.
*/
static int qong_nand_device_ready(struct nand_chip *chip)
{
return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_NFRB));
}
static void qong_nand_select_chip(struct nand_chip *chip, int cs)
{
if (cs >= 0)
gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0);
else
gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 1);
}
static struct platform_nand_data qong_nand_data = {
.chip = {
.nr_chips = 1,
.chip_delay = 20,
.options = 0,
},
.ctrl = {
.cmd_ctrl = qong_nand_cmd_ctrl,
.dev_ready = qong_nand_device_ready,
.select_chip = qong_nand_select_chip,
}
};
static struct resource qong_nand_resource = {
.start = MX31_CS3_BASE_ADDR,
.end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device qong_nand_device = {
.name = "gen_nand",
.id = -1,
.dev = {
.platform_data = &qong_nand_data,
},
.num_resources = 1,
.resource = &qong_nand_resource,
};
static void __init qong_init_nand_mtd(void)
{
/* init CS */
imx_writel(0x00004f00, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(3)));
imx_writel(0x20013b31, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(3)));
imx_writel(0x00020800, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(3)));
mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true);
/* enable pin */
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFCE_B, IOMUX_CONFIG_GPIO));
if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), "nand_enable"))
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0);
/* ready/busy pin */
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFRB, IOMUX_CONFIG_GPIO));
if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFRB), "nand_rdy"))
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFRB));
/* write protect pin */
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFWP_B, IOMUX_CONFIG_GPIO));
if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFWP_B), "nand_wp"))
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFWP_B));
platform_device_register(&qong_nand_device);
}
static void __init qong_init_fpga(void)
{
void __iomem *regs;
u32 fpga_ver;
regs = ioremap(QONG_FPGA_CTRL_BASEADDR, QONG_FPGA_CTRL_SIZE);
if (!regs) {
printk(KERN_ERR "%s: failed to map registers, aborting.\n",
__func__);
return;
}
fpga_ver = readl(regs + QONG_FPGA_CTRL_VERSION);
iounmap(regs);
printk(KERN_INFO "Qong FPGA version %d.%d.%d\n",
(fpga_ver & 0xF000) >> 12,
(fpga_ver & 0x0F00) >> 8, fpga_ver & 0x00FF);
if (fpga_ver < QONG_FPGA_VERSION(0, 8, 7)) {
printk(KERN_ERR "qong: Unexpected FPGA version, FPGA-based "
"devices won't be registered!\n");
return;
}
/* register FPGA-based devices */
qong_init_nand_mtd();
qong_init_dnet();
}
/*
* Board specific initialization.
*/
static void __init qong_init(void)
{
imx31_soc_init();
mxc_init_imx_uart();
qong_init_nor_mtd();
imx31_add_imx2_wdt();
}
static void __init qong_timer_init(void)
{
mx31_clocks_init(26000000);
}
MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
/* Maintainer: DENX Software Engineering GmbH */
.atag_offset = 0x100,
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = qong_timer_init,
.init_machine = qong_init,
.init_late = qong_init_fpga,
.restart = mxc_restart,
MACHINE_END

182
arch/arm/mach-imx/mx31lilly-db.c
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@ -1,182 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* LILLY-1131 development board support
*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
*
* based on code for other MX31 boards,
*
* Copyright 2005-2007 Freescale Semiconductor
* Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "board-mx31lilly.h"
#include "common.h"
#include "devices-imx31.h"
#include "hardware.h"
#include "iomux-mx3.h"
/*
* This file contains board-specific initialization routines for the
* LILLY-1131 development board. If you design an own baseboard for the
* module, use this file as base for support code.
*/
static unsigned int lilly_db_board_pins[] __initdata = {
MX31_PIN_SD1_DATA3__SD1_DATA3,
MX31_PIN_SD1_DATA2__SD1_DATA2,
MX31_PIN_SD1_DATA1__SD1_DATA1,
MX31_PIN_SD1_DATA0__SD1_DATA0,
MX31_PIN_SD1_CLK__SD1_CLK,
MX31_PIN_SD1_CMD__SD1_CMD,
MX31_PIN_LD0__LD0,
MX31_PIN_LD1__LD1,
MX31_PIN_LD2__LD2,
MX31_PIN_LD3__LD3,
MX31_PIN_LD4__LD4,
MX31_PIN_LD5__LD5,
MX31_PIN_LD6__LD6,
MX31_PIN_LD7__LD7,
MX31_PIN_LD8__LD8,
MX31_PIN_LD9__LD9,
MX31_PIN_LD10__LD10,
MX31_PIN_LD11__LD11,
MX31_PIN_LD12__LD12,
MX31_PIN_LD13__LD13,
MX31_PIN_LD14__LD14,
MX31_PIN_LD15__LD15,
MX31_PIN_LD16__LD16,
MX31_PIN_LD17__LD17,
MX31_PIN_VSYNC3__VSYNC3,
MX31_PIN_HSYNC__HSYNC,
MX31_PIN_FPSHIFT__FPSHIFT,
MX31_PIN_DRDY0__DRDY0,
MX31_PIN_CONTRAST__CONTRAST,
};
/* MMC support */
static int mxc_mmc1_get_ro(struct device *dev)
{
return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
}
static int gpio_det, gpio_wp;
#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
static int mxc_mmc1_init(struct device *dev,
irq_handler_t detect_irq, void *data)
{
int ret;
gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1);
gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0);
mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
ret = gpio_request(gpio_det, "MMC detect");
if (ret)
return ret;
ret = gpio_request(gpio_wp, "MMC w/p");
if (ret)
goto exit_free_det;
gpio_direction_input(gpio_det);
gpio_direction_input(gpio_wp);
ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)),
detect_irq, IRQF_TRIGGER_FALLING,
"MMC detect", data);
if (ret)
goto exit_free_wp;
return 0;
exit_free_wp:
gpio_free(gpio_wp);
exit_free_det:
gpio_free(gpio_det);
return ret;
}
static void mxc_mmc1_exit(struct device *dev, void *data)
{
gpio_free(gpio_det);
gpio_free(gpio_wp);
free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)), data);
}
static const struct imxmmc_platform_data mmc_pdata __initconst = {
.get_ro = mxc_mmc1_get_ro,
.init = mxc_mmc1_init,
.exit = mxc_mmc1_exit,
};
/* Framebuffer support */
static const struct fb_videomode fb_modedb = {
/* 640x480 TFT panel (IPS-056T) */
.name = "CRT-VGA",
.refresh = 64,
.xres = 640,
.yres = 480,
.pixclock = 30000,
.left_margin = 200,
.right_margin = 2,
.upper_margin = 2,
.lower_margin = 2,
.hsync_len = 3,
.vsync_len = 1,
.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
};
static struct mx3fb_platform_data fb_pdata __initdata = {
.name = "CRT-VGA",
.mode = &fb_modedb,
.num_modes = 1,
};
#define LCD_VCC_EN_GPIO (7)
static void __init mx31lilly_init_fb(void)
{
if (gpio_request(LCD_VCC_EN_GPIO, "LCD enable") != 0) {
printk(KERN_WARNING "unable to request LCD_VCC_EN pin.\n");
return;
}
imx31_add_ipu_core();
imx31_add_mx3_sdc_fb(&fb_pdata);
gpio_direction_output(LCD_VCC_EN_GPIO, 1);
}
void __init mx31lilly_db_init(void)
{
mxc_iomux_setup_multiple_pins(lilly_db_board_pins,
ARRAY_SIZE(lilly_db_board_pins),
"development board pins");
imx31_add_mxc_mmc(0, &mmc_pdata);
mx31lilly_init_fb();
}

238
arch/arm/mach-imx/mx31moboard-devboard.c
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@ -1,238 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/usb/otg.h>
#include "board-mx31moboard.h"
#include "common.h"
#include "devices-imx31.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"
static unsigned int devboard_pins[] = {
/* UART1 */
MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
/* SDHC2 */
MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
/* USB H1 */
MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
/* SEL */
MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
static int devboard_sdhc2_get_ro(struct device *dev)
{
return !gpio_get_value(SDHC2_WP);
}
static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
void *data)
{
int ret;
ret = gpio_request(SDHC2_CD, "sdhc-detect");
if (ret)
return ret;
gpio_direction_input(SDHC2_CD);
ret = gpio_request(SDHC2_WP, "sdhc-wp");
if (ret)
goto err_gpio_free;
gpio_direction_input(SDHC2_WP);
ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"sdhc2-card-detect", data);
if (ret)
goto err_gpio_free_2;
return 0;
err_gpio_free_2:
gpio_free(SDHC2_WP);
err_gpio_free:
gpio_free(SDHC2_CD);
return ret;
}
static void devboard_sdhc2_exit(struct device *dev, void *data)
{
free_irq(gpio_to_irq(SDHC2_CD), data);
gpio_free(SDHC2_WP);
gpio_free(SDHC2_CD);
}
static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
.get_ro = devboard_sdhc2_get_ro,
.init = devboard_sdhc2_init,
.exit = devboard_sdhc2_exit,
};
#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
static void devboard_init_sel_gpios(void)
{
if (!gpio_request(SEL0, "sel0")) {
gpio_direction_input(SEL0);
gpio_export(SEL0, true);
}
if (!gpio_request(SEL1, "sel1")) {
gpio_direction_input(SEL1);
gpio_export(SEL1, true);
}
if (!gpio_request(SEL2, "sel2")) {
gpio_direction_input(SEL2);
gpio_export(SEL2, true);
}
if (!gpio_request(SEL3, "sel3")) {
gpio_direction_input(SEL3);
gpio_export(SEL3, true);
}
}
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
static int devboard_usbh1_hw_init(struct platform_device *pdev)
{
mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
mdelay(10);
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
MXC_EHCI_INTERFACE_SINGLE_UNI);
}
#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
static int devboard_isp1105_init(struct usb_phy *otg)
{
int ret = gpio_request(USBH1_MODE, "usbh1-mode");
if (ret)
return ret;
/* single ended */
gpio_direction_output(USBH1_MODE, 0);
ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
if (ret) {
gpio_free(USBH1_MODE);
return ret;
}
gpio_direction_output(USBH1_VBUSEN_B, 1);
return 0;
}
static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
{
if (on)
gpio_set_value(USBH1_VBUSEN_B, 0);
else
gpio_set_value(USBH1_VBUSEN_B, 1);
return 0;
}
static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
.init = devboard_usbh1_hw_init,
.portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
};
static int __init devboard_usbh1_init(void)
{
struct usb_phy *phy;
struct platform_device *pdev;
phy = kzalloc(sizeof(*phy), GFP_KERNEL);
if (!phy)
return -ENOMEM;
phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
if (!phy->otg) {
kfree(phy);
return -ENOMEM;
}
phy->label = "ISP1105";
phy->init = devboard_isp1105_init;
phy->otg->set_vbus = devboard_isp1105_set_vbus;
usbh1_pdata.otg = phy;
pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
return PTR_ERR_OR_ZERO(pdev);
}
static const struct fsl_usb2_platform_data usb_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_ULPI,
};
/*
* system init for baseboard usage. Will be called by mx31moboard init.
*/
void __init mx31moboard_devboard_init(void)
{
printk(KERN_INFO "Initializing mx31devboard peripherals\n");
mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
"devboard");
imx31_add_imx_uart1(&uart_pdata);
imx31_add_mxc_mmc(1, &sdhc2_pdata);
devboard_init_sel_gpios();
imx31_add_fsl_usb2_udc(&usb_pdata);
devboard_usbh1_init();
}

270
arch/arm/mach-imx/mx31moboard-marxbot.c
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@ -1,270 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/usb/otg.h>
#include "board-mx31moboard.h"
#include "common.h"
#include "devices-imx31.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"
static unsigned int marxbot_pins[] = {
/* SDHC2 */
MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
/* dsPIC resets */
MX31_PIN_STXD5__GPIO1_21, MX31_PIN_SRXD5__GPIO1_22,
/*battery detection */
MX31_PIN_LCS0__GPIO3_23,
/* USB H1 */
MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
/* SEL */
MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
};
#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
static int marxbot_sdhc2_get_ro(struct device *dev)
{
return !gpio_get_value(SDHC2_WP);
}
static int marxbot_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
void *data)
{
int ret;
ret = gpio_request(SDHC2_CD, "sdhc-detect");
if (ret)
return ret;
gpio_direction_input(SDHC2_CD);
ret = gpio_request(SDHC2_WP, "sdhc-wp");
if (ret)
goto err_gpio_free;
gpio_direction_input(SDHC2_WP);
ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"sdhc2-card-detect", data);
if (ret)
goto err_gpio_free_2;
return 0;
err_gpio_free_2:
gpio_free(SDHC2_WP);
err_gpio_free:
gpio_free(SDHC2_CD);
return ret;
}
static void marxbot_sdhc2_exit(struct device *dev, void *data)
{
free_irq(gpio_to_irq(SDHC2_CD), data);
gpio_free(SDHC2_WP);
gpio_free(SDHC2_CD);
}
static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
.get_ro = marxbot_sdhc2_get_ro,
.init = marxbot_sdhc2_init,
.exit = marxbot_sdhc2_exit,
};
#define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_STXD5)
#define DSPICS_RST_B IOMUX_TO_GPIO(MX31_PIN_SRXD5)
static void dspics_resets_init(void)
{
if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
gpio_direction_output(TRSLAT_RST_B, 0);
gpio_export(TRSLAT_RST_B, false);
}
if (!gpio_request(DSPICS_RST_B, "dspics-rst")) {
gpio_direction_output(DSPICS_RST_B, 0);
gpio_export(DSPICS_RST_B, false);
}
}
static struct spi_board_info marxbot_spi_board_info[] __initdata = {
{
.modalias = "spidev",
.max_speed_hz = 300000,
.bus_num = 1,
.chip_select = 1, /* according spi1_cs[] ! */
},
};
#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
static void marxbot_init_sel_gpios(void)
{
if (!gpio_request(SEL0, "sel0")) {
gpio_direction_input(SEL0);
gpio_export(SEL0, true);
}
if (!gpio_request(SEL1, "sel1")) {
gpio_direction_input(SEL1);
gpio_export(SEL1, true);
}
if (!gpio_request(SEL2, "sel2")) {
gpio_direction_input(SEL2);
gpio_export(SEL2, true);
}
if (!gpio_request(SEL3, "sel3")) {
gpio_direction_input(SEL3);
gpio_export(SEL3, true);
}
}
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
static int marxbot_usbh1_hw_init(struct platform_device *pdev)
{
mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
mdelay(10);
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
MXC_EHCI_INTERFACE_SINGLE_UNI);
}
#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
static int marxbot_isp1105_init(struct usb_phy *otg)
{
int ret = gpio_request(USBH1_MODE, "usbh1-mode");
if (ret)
return ret;
/* single ended */
gpio_direction_output(USBH1_MODE, 0);
ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
if (ret) {
gpio_free(USBH1_MODE);
return ret;
}
gpio_direction_output(USBH1_VBUSEN_B, 1);
return 0;
}
static int marxbot_isp1105_set_vbus(struct usb_otg *otg, bool on)
{
if (on)
gpio_set_value(USBH1_VBUSEN_B, 0);
else
gpio_set_value(USBH1_VBUSEN_B, 1);
return 0;
}
static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
.init = marxbot_usbh1_hw_init,
.portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
};
static int __init marxbot_usbh1_init(void)
{
struct usb_phy *phy;
struct platform_device *pdev;
phy = kzalloc(sizeof(*phy), GFP_KERNEL);
if (!phy)
return -ENOMEM;
phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
if (!phy->otg) {
kfree(phy);
return -ENOMEM;
}
phy->label = "ISP1105";
phy->init = marxbot_isp1105_init;
phy->otg->set_vbus = marxbot_isp1105_set_vbus;
usbh1_pdata.otg = phy;
pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
return PTR_ERR_OR_ZERO(pdev);
}
static const struct fsl_usb2_platform_data usb_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_ULPI,
};
/*
* system init for baseboard usage. Will be called by mx31moboard init.
*/
void __init mx31moboard_marxbot_init(void)
{
printk(KERN_INFO "Initializing mx31marxbot peripherals\n");
mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins),
"marxbot");
marxbot_init_sel_gpios();
dspics_resets_init();
imx31_add_mxc_mmc(1, &sdhc2_pdata);
spi_register_board_info(marxbot_spi_board_info,
ARRAY_SIZE(marxbot_spi_board_info));
/* battery present pin */
gpio_request(IOMUX_TO_GPIO(MX31_PIN_LCS0), "bat-present");
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0));
gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false);
imx31_add_fsl_usb2_udc(&usb_pdata);
marxbot_usbh1_init();
}

124
arch/arm/mach-imx/mx31moboard-smartbot.c
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@ -1,124 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include "board-mx31moboard.h"
#include "common.h"
#include "devices-imx31.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"
static unsigned int smartbot_pins[] = {
/* UART1 */
MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
/* ENABLES */
MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static const struct fsl_usb2_platform_data usb_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_ULPI,
};
#if defined(CONFIG_USB_ULPI)
static int smartbot_otg_init(struct platform_device *pdev)
{
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}
static struct mxc_usbh_platform_data otg_host_pdata __initdata = {
.init = smartbot_otg_init,
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};
static int __init smartbot_otg_host_init(void)
{
struct platform_device *pdev;
otg_host_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (!otg_host_pdata.otg)
return -ENODEV;
pdev = imx31_add_mxc_ehci_otg(&otg_host_pdata);
return PTR_ERR_OR_ZERO(pdev);
}
#else
static inline int smartbot_otg_host_init(void) { return 0; }
#endif
#define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
#define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
#define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
#define TRSLAT_SRC_CHOICE IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
static void smartbot_resets_init(void)
{
if (!gpio_request(POWER_EN, "power-enable")) {
gpio_direction_output(POWER_EN, 0);
gpio_export(POWER_EN, false);
}
if (!gpio_request(DSPIC_RST_B, "dspic-rst")) {
gpio_direction_output(DSPIC_RST_B, 0);
gpio_export(DSPIC_RST_B, false);
}
if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
gpio_direction_output(TRSLAT_RST_B, 0);
gpio_export(TRSLAT_RST_B, false);
}
if (!gpio_request(TRSLAT_SRC_CHOICE, "translator-src-choice")) {
gpio_direction_output(TRSLAT_SRC_CHOICE, 0);
gpio_export(TRSLAT_SRC_CHOICE, false);
}
}
/*
* system init for baseboard usage. Will be called by mx31moboard init.
*/
void __init mx31moboard_smartbot_init(int board)
{
printk(KERN_INFO "Initializing mx31smartbot peripherals\n");
mxc_iomux_setup_multiple_pins(smartbot_pins, ARRAY_SIZE(smartbot_pins),
"smartbot");
imx31_add_imx_uart1(&uart_pdata);
switch (board) {
case MX31SMARTBOT:
imx31_add_fsl_usb2_udc(&usb_pdata);
break;
case MX31EYEBOT:
smartbot_otg_host_init();
break;
default:
printk(KERN_WARNING "Unknown board %d, USB OTG not initialized",
board);
}
smartbot_resets_init();
}