i2c: mxs: handle spurious interrupt

After an error interrupt setting cmd->err, I see another interrupt that
the data engine is empty which clears cmd->err before being processed.
So, clear cmd->err at the beginning of a transfer only to handle these
consecutive interrupts.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
This commit is contained in:
Wolfram Sang 2012-04-05 16:15:24 +02:00
parent 0964071367
commit c95eeae9e3
1 changed files with 1 additions and 2 deletions

View File

@ -227,6 +227,7 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,
return -EINVAL;
init_completion(&i2c->cmd_complete);
i2c->cmd_err = 0;
flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;
@ -299,8 +300,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
MXS_I2C_CTRL1_SLAVE_STOP_IRQ | MXS_I2C_CTRL1_SLAVE_IRQ))
/* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */
i2c->cmd_err = -EIO;
else
i2c->cmd_err = 0;
is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) &
MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0;