mirror of https://gitee.com/openkylin/linux.git
net: pch_gbe: Remove {read,write}_phy_reg HAL abstraction
For some reason the pch_gbe driver contains a struct pch_gbe_functions with pointers used by a HAL abstraction layer, even though there is only one implementation of each function. This patch removes the read_phy_reg & write_phy_reg abstractions in favor of calling pch_gbe_phy_read_reg_miic & pch_gbe_phy_write_reg_miic directly. Signed-off-by: Paul Burton <paul.burton@mips.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -332,14 +332,10 @@ struct pch_gbe_hw;
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* struct pch_gbe_functions - HAL APi function pointer
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* @get_bus_info: for pch_gbe_hal_get_bus_info
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* @init_hw: for pch_gbe_hal_init_hw
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* @read_phy_reg: for pch_gbe_hal_read_phy_reg
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* @write_phy_reg: for pch_gbe_hal_write_phy_reg
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*/
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struct pch_gbe_functions {
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void (*get_bus_info) (struct pch_gbe_hw *);
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s32 (*init_hw) (struct pch_gbe_hw *);
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s32 (*read_phy_reg) (struct pch_gbe_hw *, u32, u16 *);
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s32 (*write_phy_reg) (struct pch_gbe_hw *, u32, u16);
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};
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/**
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@ -86,8 +86,6 @@ static s32 pch_gbe_plat_init_hw(struct pch_gbe_hw *hw)
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static const struct pch_gbe_functions pch_gbe_ops = {
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.get_bus_info = pch_gbe_plat_get_bus_info,
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.init_hw = pch_gbe_plat_init_hw,
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.read_phy_reg = pch_gbe_phy_read_reg_miic,
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.write_phy_reg = pch_gbe_phy_write_reg_miic,
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};
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/**
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@ -153,37 +151,3 @@ s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw)
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}
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return hw->func->init_hw(hw);
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}
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/**
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* pch_gbe_hal_read_phy_reg - Reads PHY register
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* @hw: Pointer to the HW structure
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* @offset: The register to read
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* @data: The buffer to store the 16-bit read.
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* Returns:
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* 0: Successfully
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* Negative value: Failed
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*/
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s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset,
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u16 *data)
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{
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if (!hw->func->read_phy_reg)
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return 0;
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return hw->func->read_phy_reg(hw, offset, data);
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}
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/**
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* pch_gbe_hal_write_phy_reg - Writes PHY register
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* @hw: Pointer to the HW structure
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* @offset: The register to read
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* @data: The value to write.
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* Returns:
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* 0: Successfully
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* Negative value: Failed
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*/
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s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset,
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u16 data)
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{
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if (!hw->func->write_phy_reg)
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return 0;
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return hw->func->write_phy_reg(hw, offset, data);
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}
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@ -24,7 +24,5 @@
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s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw);
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void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw);
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s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw);
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s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 *data);
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s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 data);
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#endif
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@ -125,7 +125,7 @@ static int pch_gbe_set_link_ksettings(struct net_device *netdev,
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u32 advertising;
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int ret;
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pch_gbe_hal_write_phy_reg(hw, MII_BMCR, BMCR_RESET);
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pch_gbe_phy_write_reg_miic(hw, MII_BMCR, BMCR_RESET);
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memcpy(©_ecmd, ecmd, sizeof(*ecmd));
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@ -204,7 +204,7 @@ static void pch_gbe_get_regs(struct net_device *netdev,
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*regs_buff++ = ioread32(&hw->reg->INT_ST + i);
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/* PHY register */
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for (i = 0; i < PCH_GBE_PHY_REGS_LEN; i++) {
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pch_gbe_hal_read_phy_reg(&adapter->hw, i, &tmp);
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pch_gbe_phy_read_reg_miic(&adapter->hw, i, &tmp);
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*regs_buff++ = tmp;
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}
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}
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