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drm/amdgpu/atom: add support for new mul32 opcodes (v2) 

Better precision than the regular mul opcode.

v2: handle big endian properly.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2015-10-02 14:16:11 -04:00
parent 554384198c
commit c9c145021f
2 changed files with 18 additions and 2 deletions
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18
drivers/gpu/drm/amd/amdgpu/atom.c
View File

@ -788,6 +788,20 @@ static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
ctx->ctx->divmul[0] = dst * src; ctx->ctx->divmul[0] = dst * src;
} }
static void atom_op_mul32(atom_exec_context *ctx, int *ptr, int arg)
{
uint64_t val64;
uint8_t attr = U8((*ptr)++);
uint32_t dst, src;
SDEBUG(" src1: ");
dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
SDEBUG(" src2: ");
src = atom_get_src(ctx, attr, ptr);
val64 = (uint64_t)dst * (uint64_t)src;
ctx->ctx->divmul[0] = lower_32_bits(val64);
ctx->ctx->divmul[1] = upper_32_bits(val64);
}
static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg) static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
{ {
/* nothing */ /* nothing */
@ -1160,7 +1174,9 @@ static struct {
atom_op_shr, ATOM_ARG_PLL}, { atom_op_shr, ATOM_ARG_PLL}, {
atom_op_shr, ATOM_ARG_MC}, { atom_op_shr, ATOM_ARG_MC}, {
atom_op_debug, 0}, { atom_op_debug, 0}, {
atom_op_processds, 0}, atom_op_processds, 0}, {
atom_op_mul32, ATOM_ARG_PS}, {
atom_op_mul32, ATOM_ARG_WS},
}; };
static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params) static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)

2
drivers/gpu/drm/amd/amdgpu/atom.h
View File

@ -60,7 +60,7 @@
#define ATOM_CT_PS_MASK 0x7F #define ATOM_CT_PS_MASK 0x7F
#define ATOM_CT_CODE_PTR 6 #define ATOM_CT_CODE_PTR 6
#define ATOM_OP_CNT 123 #define ATOM_OP_CNT 125
#define ATOM_OP_EOT 91 #define ATOM_OP_EOT 91
#define ATOM_CASE_MAGIC 0x63 #define ATOM_CASE_MAGIC 0x63