mirror of https://gitee.com/openkylin/linux.git
drm/amdgpu: Split set_pg_state into separate function
1. add amdgpu_device_ip_late_set_pg_state function for set pg state. 2. delete duplicate pg state setting on gfx_v8_0's late_init. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1730,12 +1730,34 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
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}
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}
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}
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}
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if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
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return 0;
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/* enable gfx powergating */
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}
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amdgpu_device_ip_set_powergating_state(adev,
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AMD_IP_BLOCK_TYPE_GFX,
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AMD_PG_STATE_GATE);
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static int amdgpu_device_ip_late_set_pg_state(struct amdgpu_device *adev)
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{
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int i = 0, r;
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if (amdgpu_emu_mode == 1)
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return 0;
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for (i = 0; i < adev->num_ip_blocks; i++) {
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if (!adev->ip_blocks[i].status.valid)
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continue;
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/* skip CG for VCE/UVD, it's handled specially */
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if (adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_UVD &&
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adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_VCE &&
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adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_VCN &&
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adev->ip_blocks[i].version->funcs->set_powergating_state) {
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/* enable powergating to save power */
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r = adev->ip_blocks[i].version->funcs->set_powergating_state((void *)adev,
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AMD_PG_STATE_GATE);
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if (r) {
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DRM_ERROR("set_powergating_state(gate) of IP block <%s> failed %d\n",
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adev->ip_blocks[i].version->funcs->name, r);
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return r;
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}
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}
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}
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return 0;
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return 0;
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}
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}
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@ -1898,6 +1920,7 @@ static void amdgpu_device_ip_late_init_func_handler(struct work_struct *work)
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struct amdgpu_device *adev =
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struct amdgpu_device *adev =
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container_of(work, struct amdgpu_device, late_init_work.work);
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container_of(work, struct amdgpu_device, late_init_work.work);
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amdgpu_device_ip_late_set_cg_state(adev);
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amdgpu_device_ip_late_set_cg_state(adev);
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amdgpu_device_ip_late_set_pg_state(adev);
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}
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}
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/**
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/**
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@ -5596,10 +5596,6 @@ static int gfx_v8_0_late_init(void *handle)
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return r;
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return r;
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}
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}
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amdgpu_device_ip_set_powergating_state(adev,
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AMD_IP_BLOCK_TYPE_GFX,
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AMD_PG_STATE_GATE);
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return 0;
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return 0;
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}
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}
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