mirror of https://gitee.com/openkylin/linux.git
drm/nouveau/falcon: fix port offset for DMEM register
DMEM registers are replicated with a stride of 8 bytes. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -72,18 +72,19 @@ nvkm_falcon_v1_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start,
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size -= rem;
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nvkm_falcon_wr32(falcon, 0x1c0 + (port * 16), start | (0x1 << 24));
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nvkm_falcon_wr32(falcon, 0x1c0 + (port * 8), start | (0x1 << 24));
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for (i = 0; i < size / 4; i++)
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nvkm_falcon_wr32(falcon, 0x1c4, ((u32 *)data)[i]);
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nvkm_falcon_wr32(falcon, 0x1c4 + (port * 8), ((u32 *)data)[i]);
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/*
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* If size is not a multiple of 4, mask the last work to ensure garbage
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* does not get read
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* If size is not a multiple of 4, mask the last word to ensure garbage
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* does not get written
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*/
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if (rem) {
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u32 extra = ((u32 *)data)[i];
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nvkm_falcon_wr32(falcon, 0x1c4, extra & (BIT(rem * 8) - 1));
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nvkm_falcon_wr32(falcon, 0x1c4 + (port * 8),
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extra & (BIT(rem * 8) - 1));
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}
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}
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@ -96,16 +97,16 @@ nvkm_falcon_v1_read_dmem(struct nvkm_falcon *falcon, u32 start, u32 size,
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size -= rem;
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nvkm_falcon_wr32(falcon, 0x1c0 + (port * 16), start | (0x1 << 25));
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nvkm_falcon_wr32(falcon, 0x1c0 + (port * 8), start | (0x1 << 25));
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for (i = 0; i < size / 4; i++)
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((u32 *)data)[i] = nvkm_falcon_rd32(falcon, 0x1c4);
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((u32 *)data)[i] = nvkm_falcon_rd32(falcon, 0x1c4 + (port * 8));
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/*
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* If size is not a multiple of 4, mask the last work to ensure garbage
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* If size is not a multiple of 4, mask the last word to ensure garbage
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* does not get read
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*/
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if (rem) {
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u32 extra = nvkm_falcon_rd32(falcon, 0x1c4);
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u32 extra = nvkm_falcon_rd32(falcon, 0x1c4 + (port * 8));
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for (i = size; i < size + rem; i++) {
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((u8 *)data)[i] = (u8)(extra & 0xff);
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