mirror of https://gitee.com/openkylin/linux.git
sfc: Make struct efx_special_buffer less special
On EF10, the firmware is in charge of allocating buffer table entries. Change struct efx_special_buffer to use a struct efx_buffer member, so that it can be used with efx_nic_{alloc,free}_buffer() in that case. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
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@ -93,21 +93,36 @@ struct efx_ptp_data;
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struct efx_self_tests;
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/**
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* struct efx_special_buffer - An Efx special buffer
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* @addr: CPU base address of the buffer
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* struct efx_buffer - A general-purpose DMA buffer
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* @addr: host base address of the buffer
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* @dma_addr: DMA base address of the buffer
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* @len: Buffer length, in bytes
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* @index: Buffer index within controller;s buffer table
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* @entries: Number of buffer table entries
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*
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* Special buffers are used for the event queues and the TX and RX
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* descriptor queues for each channel. They are *not* used for the
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* actual transmit and receive buffers.
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* The NIC uses these buffers for its interrupt status registers and
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* MAC stats dumps.
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*/
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struct efx_special_buffer {
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struct efx_buffer {
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void *addr;
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dma_addr_t dma_addr;
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unsigned int len;
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};
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/**
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* struct efx_special_buffer - DMA buffer entered into buffer table
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* @buf: Standard &struct efx_buffer
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* @index: Buffer index within controller;s buffer table
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* @entries: Number of buffer table entries
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*
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* The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
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* Event and descriptor rings are addressed via one or more buffer
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* table entries (and so can be physically non-contiguous, although we
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* currently do not take advantage of that). On Falcon and Siena we
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* have to take care of allocating and initialising the entries
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* ourselves. On later hardware this is managed by the firmware and
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* @index and @entries are left as 0.
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*/
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struct efx_special_buffer {
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struct efx_buffer buf;
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unsigned int index;
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unsigned int entries;
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};
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@ -325,22 +340,6 @@ struct efx_rx_queue {
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unsigned int slow_fill_count;
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};
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/**
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* struct efx_buffer - An Efx general-purpose buffer
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* @addr: host base address of the buffer
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* @dma_addr: DMA base address of the buffer
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* @len: Buffer length, in bytes
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*
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* The NIC uses these buffers for its interrupt status registers and
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* MAC stats dumps.
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*/
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struct efx_buffer {
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void *addr;
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dma_addr_t dma_addr;
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unsigned int len;
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};
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enum efx_rx_alloc_method {
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RX_ALLOC_METHOD_AUTO = 0,
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RX_ALLOC_METHOD_SKB = 1,
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@ -93,7 +93,7 @@ static inline void efx_write_buf_tbl(struct efx_nic *efx, efx_qword_t *value,
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static inline efx_qword_t *efx_event(struct efx_channel *channel,
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unsigned int index)
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{
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return ((efx_qword_t *) (channel->eventq.addr)) +
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return ((efx_qword_t *) (channel->eventq.buf.addr)) +
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(index & channel->eventq_mask);
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}
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@ -196,12 +196,12 @@ efx_init_special_buffer(struct efx_nic *efx, struct efx_special_buffer *buffer)
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dma_addr_t dma_addr;
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int i;
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EFX_BUG_ON_PARANOID(!buffer->addr);
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EFX_BUG_ON_PARANOID(!buffer->buf.addr);
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/* Write buffer descriptors to NIC */
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for (i = 0; i < buffer->entries; i++) {
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index = buffer->index + i;
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dma_addr = buffer->dma_addr + (i * EFX_BUF_SIZE);
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dma_addr = buffer->buf.dma_addr + (i * EFX_BUF_SIZE);
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netif_dbg(efx, probe, efx->net_dev,
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"mapping special buffer %d at %llx\n",
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index, (unsigned long long)dma_addr);
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@ -250,13 +250,10 @@ static int efx_alloc_special_buffer(struct efx_nic *efx,
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{
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len = ALIGN(len, EFX_BUF_SIZE);
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buffer->addr = dma_alloc_coherent(&efx->pci_dev->dev, len,
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&buffer->dma_addr, GFP_KERNEL);
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if (!buffer->addr)
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if (efx_nic_alloc_buffer(efx, &buffer->buf, len, GFP_KERNEL))
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return -ENOMEM;
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buffer->len = len;
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buffer->entries = len / EFX_BUF_SIZE;
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BUG_ON(buffer->dma_addr & (EFX_BUF_SIZE - 1));
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BUG_ON(buffer->buf.dma_addr & (EFX_BUF_SIZE - 1));
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/* Select new buffer ID */
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buffer->index = efx->next_buffer_table;
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@ -270,8 +267,8 @@ static int efx_alloc_special_buffer(struct efx_nic *efx,
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"allocating special buffers %d-%d at %llx+%x "
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"(virt %p phys %llx)\n", buffer->index,
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buffer->index + buffer->entries - 1,
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(u64)buffer->dma_addr, len,
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buffer->addr, (u64)virt_to_phys(buffer->addr));
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(u64)buffer->buf.dma_addr, len,
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buffer->buf.addr, (u64)virt_to_phys(buffer->buf.addr));
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return 0;
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}
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@ -279,19 +276,17 @@ static int efx_alloc_special_buffer(struct efx_nic *efx,
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static void
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efx_free_special_buffer(struct efx_nic *efx, struct efx_special_buffer *buffer)
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{
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if (!buffer->addr)
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if (!buffer->buf.addr)
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return;
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netif_dbg(efx, hw, efx->net_dev,
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"deallocating special buffers %d-%d at %llx+%x "
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"(virt %p phys %llx)\n", buffer->index,
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buffer->index + buffer->entries - 1,
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(u64)buffer->dma_addr, buffer->len,
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buffer->addr, (u64)virt_to_phys(buffer->addr));
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(u64)buffer->buf.dma_addr, buffer->buf.len,
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buffer->buf.addr, (u64)virt_to_phys(buffer->buf.addr));
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dma_free_coherent(&efx->pci_dev->dev, buffer->len, buffer->addr,
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buffer->dma_addr);
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buffer->addr = NULL;
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efx_nic_free_buffer(efx, &buffer->buf);
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buffer->entries = 0;
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}
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@ -335,7 +330,7 @@ void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer)
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static inline efx_qword_t *
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efx_tx_desc(struct efx_tx_queue *tx_queue, unsigned int index)
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{
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return ((efx_qword_t *) (tx_queue->txd.addr)) + index;
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return ((efx_qword_t *) (tx_queue->txd.buf.addr)) + index;
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}
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/* This writes to the TX_DESC_WPTR; write pointer for TX descriptor ring */
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@ -534,7 +529,7 @@ void efx_nic_remove_tx(struct efx_tx_queue *tx_queue)
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static inline efx_qword_t *
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efx_rx_desc(struct efx_rx_queue *rx_queue, unsigned int index)
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{
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return ((efx_qword_t *) (rx_queue->rxd.addr)) + index;
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return ((efx_qword_t *) (rx_queue->rxd.buf.addr)) + index;
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}
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/* This creates an entry in the RX descriptor queue */
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@ -1415,7 +1410,7 @@ void efx_nic_init_eventq(struct efx_channel *channel)
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efx_init_special_buffer(efx, &channel->eventq);
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/* Fill event queue with all ones (i.e. empty events) */
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memset(channel->eventq.addr, 0xff, channel->eventq.len);
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memset(channel->eventq.buf.addr, 0xff, channel->eventq.buf.len);
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/* Push event queue to card */
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EFX_POPULATE_OWORD_3(reg,
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