mirror of https://gitee.com/openkylin/linux.git
ARM: OMAP2+: Drop i2c platform data for am33xx and am43xx
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -39,8 +39,6 @@ extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2;
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extern struct omap_hwmod_ocp_if am33xx_l3_s__gpmc;
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extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c2;
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extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c3;
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extern struct omap_hwmod_ocp_if am33xx_l4_per__mailbox;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__spinlock;
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extern struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp0;
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@ -94,9 +92,6 @@ extern struct omap_hwmod am33xx_gpio1_hwmod;
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extern struct omap_hwmod am33xx_gpio2_hwmod;
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extern struct omap_hwmod am33xx_gpio3_hwmod;
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extern struct omap_hwmod am33xx_gpmc_hwmod;
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extern struct omap_hwmod am33xx_i2c1_hwmod;
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extern struct omap_hwmod am33xx_i2c2_hwmod;
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extern struct omap_hwmod am33xx_i2c3_hwmod;
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extern struct omap_hwmod am33xx_mailbox_hwmod;
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extern struct omap_hwmod am33xx_mcasp0_hwmod;
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extern struct omap_hwmod am33xx_mcasp1_hwmod;
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@ -188,21 +188,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
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.user = OCP_USER_MPU,
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};
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/* i2c2 */
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struct omap_hwmod_ocp_if am33xx_l4_per__i2c2 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am33xx_i2c2_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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struct omap_hwmod_ocp_if am33xx_l4_per__i2c3 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am33xx_i2c3_hwmod,
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.clk = "l4ls_gclk",
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.user = OCP_USER_MPU,
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};
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/* l4 ls -> mailbox */
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struct omap_hwmod_ocp_if am33xx_l4_per__mailbox = {
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.master = &am33xx_l4_ls_hwmod,
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@ -17,7 +17,6 @@
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#include <linux/types.h>
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#include "omap_hwmod.h"
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#include "i2c.h"
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#include "wd_timer.h"
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#include "cm33xx.h"
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#include "prm33xx.h"
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@ -625,67 +624,6 @@ struct omap_hwmod am33xx_gpmc_hwmod = {
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},
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};
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/* 'i2c' class */
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static struct omap_hwmod_class_sysconfig am33xx_i2c_sysc = {
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.rev_offs = 0,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0090,
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.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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SIDLE_SMART_WKUP),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class i2c_class = {
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.name = "i2c",
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.sysc = &am33xx_i2c_sysc,
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.reset = &omap_i2c_reset,
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};
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/* i2c1 */
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struct omap_hwmod am33xx_i2c1_hwmod = {
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.name = "i2c1",
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.class = &i2c_class,
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.clkdm_name = "l4_wkup_clkdm",
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.main_clk = "dpll_per_m2_div4_wkupdm_ck",
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.prcm = {
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.omap4 = {
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* i2c1 */
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struct omap_hwmod am33xx_i2c2_hwmod = {
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.name = "i2c2",
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.class = &i2c_class,
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.clkdm_name = "l4ls_clkdm",
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.main_clk = "dpll_per_m2_div4_ck",
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.prcm = {
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.omap4 = {
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* i2c3 */
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struct omap_hwmod am33xx_i2c3_hwmod = {
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.name = "i2c3",
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.class = &i2c_class,
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.clkdm_name = "l4ls_clkdm",
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.main_clk = "dpll_per_m2_div4_ck",
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.prcm = {
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.omap4 = {
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/*
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* 'mailbox' class
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* mailbox module allowing communication between the on-chip processors using a
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@ -1206,8 +1144,6 @@ static void omap_hwmod_am33xx_clkctrl(void)
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CLKCTRL(am33xx_gpio1_hwmod, AM33XX_CM_PER_GPIO1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_gpio2_hwmod, AM33XX_CM_PER_GPIO2_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_gpio3_hwmod, AM33XX_CM_PER_GPIO3_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_i2c2_hwmod, AM33XX_CM_PER_I2C1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_i2c3_hwmod, AM33XX_CM_PER_I2C2_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_mailbox_hwmod, AM33XX_CM_PER_MAILBOX0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_mcasp0_hwmod, AM33XX_CM_PER_MCASP0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_mcasp1_hwmod, AM33XX_CM_PER_MCASP1_CLKCTRL_OFFSET);
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@ -1226,7 +1162,6 @@ static void omap_hwmod_am33xx_clkctrl(void)
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AM33XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_uart1_hwmod, AM33XX_CM_WKUP_UART0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_timer1_hwmod, AM33XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_i2c1_hwmod, AM33XX_CM_WKUP_I2C0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_wd_timer1_hwmod, AM33XX_CM_WKUP_WDT1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_rtc_hwmod, AM33XX_CM_RTC_RTC_CLKCTRL_OFFSET);
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PRCM_FLAGS(am33xx_rtc_hwmod, HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET);
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@ -1278,8 +1213,6 @@ static void omap_hwmod_am43xx_clkctrl(void)
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CLKCTRL(am33xx_gpio1_hwmod, AM43XX_CM_PER_GPIO1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_gpio2_hwmod, AM43XX_CM_PER_GPIO2_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_gpio3_hwmod, AM43XX_CM_PER_GPIO3_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_i2c2_hwmod, AM43XX_CM_PER_I2C1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_i2c3_hwmod, AM43XX_CM_PER_I2C2_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_mailbox_hwmod, AM43XX_CM_PER_MAILBOX0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_mcasp0_hwmod, AM43XX_CM_PER_MCASP0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_mcasp1_hwmod, AM43XX_CM_PER_MCASP1_CLKCTRL_OFFSET);
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@ -1298,7 +1231,6 @@ static void omap_hwmod_am43xx_clkctrl(void)
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AM43XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_uart1_hwmod, AM43XX_CM_WKUP_UART0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_timer1_hwmod, AM43XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_i2c1_hwmod, AM43XX_CM_WKUP_I2C0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_wd_timer1_hwmod, AM43XX_CM_WKUP_WDT1_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_rtc_hwmod, AM43XX_CM_RTC_RTC_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_gpmc_hwmod, AM43XX_CM_PER_GPMC_CLKCTRL_OFFSET);
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@ -14,8 +14,6 @@
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* GNU General Public License for more details.
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*/
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#include <linux/platform_data/i2c-omap.h>
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#include "omap_hwmod.h"
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#include "omap_hwmod_common_data.h"
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@ -23,7 +21,6 @@
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#include "cm33xx.h"
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#include "prm33xx.h"
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#include "prm-regbits-33xx.h"
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#include "i2c.h"
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#include "wd_timer.h"
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#include "omap_hwmod_33xx_43xx_common_data.h"
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@ -388,14 +385,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__control = {
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.user = OCP_USER_MPU,
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};
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/* L4 WKUP -> I2C1 */
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static struct omap_hwmod_ocp_if am33xx_l4_wkup__i2c1 = {
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.master = &am33xx_l4_wkup_hwmod,
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.slave = &am33xx_i2c1_hwmod,
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.clk = "dpll_core_m4_div2_ck",
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.user = OCP_USER_MPU,
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};
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/* L4 WKUP -> GPIO1 */
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static struct omap_hwmod_ocp_if am33xx_l4_wkup__gpio0 = {
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.master = &am33xx_l4_wkup_hwmod,
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@ -482,7 +471,6 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l4_wkup__uart1,
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&am33xx_l4_wkup__timer1,
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&am33xx_l4_wkup__rtc,
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&am33xx_l4_wkup__i2c1,
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&am33xx_l4_wkup__gpio0,
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&am33xx_l4_wkup__adc_tsc,
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&am33xx_l4_wkup__wd_timer1,
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@ -492,8 +480,6 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l4_per__gpio1,
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&am33xx_l4_per__gpio2,
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&am33xx_l4_per__gpio3,
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&am33xx_l4_per__i2c2,
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&am33xx_l4_per__i2c3,
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&am33xx_l4_per__mailbox,
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&am33xx_l4_ls__mcasp0,
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&am33xx_l4_ls__mcasp1,
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@ -650,13 +650,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_wkup__control = {
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_l4_wkup__i2c1 = {
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.master = &am33xx_l4_wkup_hwmod,
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.slave = &am33xx_i2c1_hwmod,
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.clk = "sys_clkin_ck",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if am43xx_l4_wkup__gpio0 = {
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.master = &am33xx_l4_wkup_hwmod,
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.slave = &am43xx_gpio0_hwmod,
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@ -929,7 +922,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
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&am43xx_l4_wkup__smartreflex1,
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&am43xx_l4_wkup__uart1,
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&am43xx_l4_wkup__timer1,
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&am43xx_l4_wkup__i2c1,
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&am43xx_l4_wkup__gpio0,
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&am43xx_l4_wkup__wd_timer1,
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&am43xx_l4_wkup__adc_tsc,
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@ -939,8 +931,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l4_per__gpio1,
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&am33xx_l4_per__gpio2,
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&am33xx_l4_per__gpio3,
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&am33xx_l4_per__i2c2,
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&am33xx_l4_per__i2c3,
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&am33xx_l4_per__mailbox,
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&am33xx_l4_per__rng,
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&am33xx_l4_ls__mcasp0,
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