mirror of https://gitee.com/openkylin/linux.git
ARM: perf: remove useless return and check of idx in counter handling
Idx sanity check was once implemented separately in these counter handling functions and then return value was treated as a judgement. armv7_pmnc_select_counter() armv7_pmnc_enable_counter() armv7_pmnc_disable_counter() armv7_pmnc_enable_intens() armv7_pmnc_disable_intens() But we do not need to do this now, as idx validation check was moved out all these functions by commit 7279adbd9bb8ef8f(ARM: perf: check ARMv7 counter validity on a per-pmu basis). Let's remove the useless return of idx from these functions. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: chai wen <chaiw.fnst@cn.fujitsu.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -564,13 +564,11 @@ static inline int armv7_pmnc_counter_has_overflowed(u32 pmnc, int idx)
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return pmnc & BIT(ARMV7_IDX_TO_COUNTER(idx));
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}
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static inline int armv7_pmnc_select_counter(int idx)
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static inline void armv7_pmnc_select_counter(int idx)
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{
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u32 counter = ARMV7_IDX_TO_COUNTER(idx);
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asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (counter));
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isb();
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return idx;
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}
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static inline u32 armv7pmu_read_counter(struct perf_event *event)
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@ -580,13 +578,15 @@ static inline u32 armv7pmu_read_counter(struct perf_event *event)
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int idx = hwc->idx;
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u32 value = 0;
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if (!armv7_pmnc_counter_valid(cpu_pmu, idx))
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if (!armv7_pmnc_counter_valid(cpu_pmu, idx)) {
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pr_err("CPU%u reading wrong counter %d\n",
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smp_processor_id(), idx);
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else if (idx == ARMV7_IDX_CYCLE_COUNTER)
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} else if (idx == ARMV7_IDX_CYCLE_COUNTER) {
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asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (value));
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else if (armv7_pmnc_select_counter(idx) == idx)
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} else {
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armv7_pmnc_select_counter(idx);
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asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (value));
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}
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return value;
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}
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@ -597,45 +597,43 @@ static inline void armv7pmu_write_counter(struct perf_event *event, u32 value)
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struct hw_perf_event *hwc = &event->hw;
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int idx = hwc->idx;
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if (!armv7_pmnc_counter_valid(cpu_pmu, idx))
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if (!armv7_pmnc_counter_valid(cpu_pmu, idx)) {
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pr_err("CPU%u writing wrong counter %d\n",
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smp_processor_id(), idx);
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else if (idx == ARMV7_IDX_CYCLE_COUNTER)
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} else if (idx == ARMV7_IDX_CYCLE_COUNTER) {
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asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (value));
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else if (armv7_pmnc_select_counter(idx) == idx)
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} else {
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armv7_pmnc_select_counter(idx);
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asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" (value));
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}
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}
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static inline void armv7_pmnc_write_evtsel(int idx, u32 val)
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{
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if (armv7_pmnc_select_counter(idx) == idx) {
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val &= ARMV7_EVTYPE_MASK;
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asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val));
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}
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armv7_pmnc_select_counter(idx);
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val &= ARMV7_EVTYPE_MASK;
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asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val));
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}
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static inline int armv7_pmnc_enable_counter(int idx)
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static inline void armv7_pmnc_enable_counter(int idx)
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{
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u32 counter = ARMV7_IDX_TO_COUNTER(idx);
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asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (BIT(counter)));
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return idx;
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}
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static inline int armv7_pmnc_disable_counter(int idx)
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static inline void armv7_pmnc_disable_counter(int idx)
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{
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u32 counter = ARMV7_IDX_TO_COUNTER(idx);
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asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (BIT(counter)));
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return idx;
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}
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static inline int armv7_pmnc_enable_intens(int idx)
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static inline void armv7_pmnc_enable_intens(int idx)
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{
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u32 counter = ARMV7_IDX_TO_COUNTER(idx);
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asm volatile("mcr p15, 0, %0, c9, c14, 1" : : "r" (BIT(counter)));
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return idx;
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}
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static inline int armv7_pmnc_disable_intens(int idx)
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static inline void armv7_pmnc_disable_intens(int idx)
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{
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u32 counter = ARMV7_IDX_TO_COUNTER(idx);
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asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
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@ -643,8 +641,6 @@ static inline int armv7_pmnc_disable_intens(int idx)
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/* Clear the overflow flag in case an interrupt is pending. */
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asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
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isb();
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return idx;
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}
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static inline u32 armv7_pmnc_getreset_flags(void)
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