mirror of https://gitee.com/openkylin/linux.git
scsi: lpfc: cleanup: convert eq_delay to usdelay
Review of the eq coalescing logic showed the code was a bit fragmented. Sometimes it would save/set via an interrupt max value, while in others it would do so via a usdelay. There were also two places changing eq delay, one place that issued mailbox commands, and another that changed via register writes if supported. Clean this up by: - Standardizing the operation of lpfc_modify_hba_eq_delay() routine so that it is always told of a us delay to impose. The routine then chooses the best way to set that - via register or via mbx. - Rather than two value types stored in eq->q_mode (usdelay if change via register, imax if change via mbox) - q_mode always contains usdelay. Before any value change, old vs new value is compared and only if different is a change done. - Revised the dmult calculation. dmult is not set based on overall imax divided by hardware queues - instead imax applies to a single cpu and the value will be replicated to all cpus. Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by: James Smart <jsmart2021@gmail.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -4935,6 +4935,7 @@ lpfc_fcp_imax_store(struct device *dev, struct device_attribute *attr,
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struct Scsi_Host *shost = class_to_shost(dev);
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struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
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struct lpfc_hba *phba = vport->phba;
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uint32_t usdelay;
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int val = 0, i;
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/* fcp_imax is only valid for SLI4 */
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@ -4958,9 +4959,14 @@ lpfc_fcp_imax_store(struct device *dev, struct device_attribute *attr,
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phba->cfg_fcp_imax = (uint32_t)val;
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phba->initial_imax = phba->cfg_fcp_imax;
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if (phba->cfg_fcp_imax)
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usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
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else
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usdelay = 0;
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for (i = 0; i < phba->cfg_irq_chann; i += LPFC_MAX_EQ_DELAY_EQID_CNT)
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lpfc_modify_hba_eq_delay(phba, i, LPFC_MAX_EQ_DELAY_EQID_CNT,
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val);
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usdelay);
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return strlen(buf);
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}
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@ -9336,7 +9336,7 @@ lpfc_sli4_queue_setup(struct lpfc_hba *phba)
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struct lpfc_sli4_hdw_queue *qp;
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LPFC_MBOXQ_t *mboxq;
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int qidx;
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uint32_t length;
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uint32_t length, usdelay;
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int rc = -ENOMEM;
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/* Check for dual-ULP support */
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@ -9643,10 +9643,15 @@ lpfc_sli4_queue_setup(struct lpfc_hba *phba)
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phba->sli4_hba.dat_rq->queue_id,
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phba->sli4_hba.els_cq->queue_id);
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if (phba->cfg_fcp_imax)
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usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
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else
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usdelay = 0;
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for (qidx = 0; qidx < phba->cfg_irq_chann;
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qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
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lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
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phba->cfg_fcp_imax);
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usdelay);
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if (phba->sli4_hba.cq_max) {
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kfree(phba->sli4_hba.cq_lookup);
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@ -14425,43 +14425,86 @@ lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
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}
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/**
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* lpfc_modify_hba_eq_delay - Modify Delay Multiplier on FCP EQs
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* @phba: HBA structure that indicates port to create a queue on.
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* @startq: The starting FCP EQ to modify
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* lpfc_modify_hba_eq_delay - Modify Delay Multiplier on EQs
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* @phba: HBA structure that EQs are on.
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* @startq: The starting EQ index to modify
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* @numq: The number of EQs (consecutive indexes) to modify
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* @usdelay: amount of delay
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*
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* This function sends an MODIFY_EQ_DELAY mailbox command to the HBA.
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* The command allows up to LPFC_MAX_EQ_DELAY_EQID_CNT EQ ID's to be
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* updated in one mailbox command.
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* This function revises the EQ delay on 1 or more EQs. The EQ delay
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* is set either by writing to a register (if supported by the SLI Port)
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* or by mailbox command. The mailbox command allows several EQs to be
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* updated at once.
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*
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* The @phba struct is used to send mailbox command to HBA. The @startq
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* is used to get the starting FCP EQ to change.
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* This function is asynchronous and will wait for the mailbox
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* command to finish before continuing.
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* The @phba struct is used to send a mailbox command to HBA. The @startq
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* is used to get the starting EQ index to change. The @numq value is
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* used to specify how many consecutive EQ indexes, starting at EQ index,
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* are to be changed. This function is asynchronous and will wait for any
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* mailbox commands to finish before returning.
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*
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* On success this function will return a zero. If unable to allocate enough
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* memory this function will return -ENOMEM. If the queue create mailbox command
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* fails this function will return -ENXIO.
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* On success this function will return a zero. If unable to allocate
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* enough memory this function will return -ENOMEM. If a mailbox command
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* fails this function will return -ENXIO. Note: on ENXIO, some EQs may
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* have had their delay multipler changed.
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**/
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int
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void
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lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
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uint32_t numq, uint32_t imax)
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uint32_t numq, uint32_t usdelay)
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{
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struct lpfc_mbx_modify_eq_delay *eq_delay;
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LPFC_MBOXQ_t *mbox;
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struct lpfc_queue *eq;
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int cnt, rc, length, status = 0;
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int cnt = 0, rc, length;
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uint32_t shdr_status, shdr_add_status;
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uint32_t result, val;
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uint32_t dmult;
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struct lpfc_register reg_data;
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int qidx;
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union lpfc_sli4_cfg_shdr *shdr;
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uint16_t dmult;
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if (startq >= phba->cfg_irq_chann)
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return 0;
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return;
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if (usdelay > 0xFFFF) {
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lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP | LOG_NVME,
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"6429 usdelay %d too large. Scaled down to "
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"0xFFFF.\n", usdelay);
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usdelay = 0xFFFF;
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}
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/* set values by EQ_DELAY register if supported */
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if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
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for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
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eq = phba->sli4_hba.hdwq[qidx].hba_eq;
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if (!eq)
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continue;
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/* save value last set */
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eq->q_mode = usdelay;
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/* write register */
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reg_data.word0 = 0;
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bf_set(lpfc_sliport_eqdelay_id, ®_data,
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eq->queue_id);
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bf_set(lpfc_sliport_eqdelay_delay, ®_data, usdelay);
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writel(reg_data.word0,
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phba->sli4_hba.u.if_type2.EQDregaddr);
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if (++cnt >= numq)
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break;
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}
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return;
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}
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/* Otherwise, set values by mailbox cmd */
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mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
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if (!mbox)
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return -ENOMEM;
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if (!mbox) {
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lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_FCP | LOG_NVME,
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"6428 Failed allocating mailbox cmd buffer."
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" EQ delay was not set.\n");
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return;
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}
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length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
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sizeof(struct lpfc_sli4_cfg_mhdr));
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lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
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@ -14470,44 +14513,22 @@ lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
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eq_delay = &mbox->u.mqe.un.eq_delay;
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/* Calculate delay multiper from maximum interrupt per second */
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result = imax / phba->cfg_irq_chann;
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if (result > LPFC_DMULT_CONST || result == 0)
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dmult = 0;
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else
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dmult = LPFC_DMULT_CONST/result - 1;
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dmult = (usdelay * LPFC_DMULT_CONST) / LPFC_SEC_TO_USEC;
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if (dmult)
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dmult--;
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if (dmult > LPFC_DMULT_MAX)
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dmult = LPFC_DMULT_MAX;
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cnt = 0;
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for (qidx = startq; qidx < phba->cfg_irq_chann; qidx++) {
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eq = phba->sli4_hba.hdwq[qidx].hba_eq;
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if (!eq)
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continue;
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eq->q_mode = imax;
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eq->q_mode = usdelay;
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eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
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eq_delay->u.request.eq[cnt].phase = 0;
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eq_delay->u.request.eq[cnt].delay_multi = dmult;
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cnt++;
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/* q_mode is only used for auto_imax */
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if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
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/* Use EQ Delay Register method for q_mode */
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/* Convert for EQ Delay register */
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val = phba->cfg_fcp_imax;
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if (val) {
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/* First, interrupts per sec per EQ */
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val = phba->cfg_fcp_imax / phba->cfg_irq_chann;
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/* us delay between each interrupt */
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val = LPFC_SEC_TO_USEC / val;
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}
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eq->q_mode = val;
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} else {
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eq->q_mode = imax;
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}
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if (cnt >= numq)
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if (++cnt >= numq)
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break;
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}
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eq_delay->u.request.num_eq = cnt;
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@ -14525,10 +14546,9 @@ lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
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"2512 MODIFY_EQ_DELAY mailbox failed with "
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"status x%x add_status x%x, mbx status x%x\n",
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shdr_status, shdr_add_status, rc);
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status = -ENXIO;
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}
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mempool_free(mbox, phba->mbox_mem_pool);
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return status;
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return;
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}
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/**
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@ -956,8 +956,8 @@ struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
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uint32_t, uint32_t);
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void lpfc_sli4_queue_free(struct lpfc_queue *);
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int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t);
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int lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
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uint32_t numq, uint32_t imax);
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void lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
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uint32_t numq, uint32_t usdelay);
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int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
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struct lpfc_queue *, uint32_t, uint32_t);
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int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
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