mirror of https://gitee.com/openkylin/linux.git
regmap: Add 1-Wire bus support
Add basic support regmap (register map access) API for 1-Wire bus Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
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2ea659a9ef
commit
cc5d0db390
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@ -3,7 +3,7 @@
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# subsystems should select the appropriate symbols.
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config REGMAP
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default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ)
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default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ)
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select LZO_COMPRESS
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select LZO_DECOMPRESS
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select IRQ_DOMAIN if REGMAP_IRQ
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@ -24,6 +24,10 @@ config REGMAP_SPMI
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tristate
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depends on SPMI
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config REGMAP_W1
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tristate
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depends on W1
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config REGMAP_MMIO
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tristate
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@ -10,3 +10,4 @@ obj-$(CONFIG_REGMAP_SPI) += regmap-spi.o
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obj-$(CONFIG_REGMAP_SPMI) += regmap-spmi.o
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obj-$(CONFIG_REGMAP_MMIO) += regmap-mmio.o
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obj-$(CONFIG_REGMAP_IRQ) += regmap-irq.o
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obj-$(CONFIG_REGMAP_W1) += regmap-w1.o
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@ -0,0 +1,245 @@
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/*
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* Register map access API - W1 (1-Wire) support
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*
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* Copyright (C) 2017 OAO Radioavionica
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* Author: Alex A. Mihaylov <minimumlaw@rambler.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation
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*/
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#include <linux/regmap.h>
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#include <linux/module.h>
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#include "../../w1/w1.h"
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#include "internal.h"
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#define W1_CMD_READ_DATA 0x69
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#define W1_CMD_WRITE_DATA 0x6C
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/*
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* 1-Wire slaves registers with addess 8 bit and data 8 bit
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*/
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static int w1_reg_a8_v8_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 255)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_READ_DATA);
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w1_write_8(sl->master, reg);
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*val = w1_read_8(sl->master);
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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static int w1_reg_a8_v8_write(void *context, unsigned int reg, unsigned int val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 255)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_WRITE_DATA);
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w1_write_8(sl->master, reg);
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w1_write_8(sl->master, val);
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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/*
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* 1-Wire slaves registers with addess 8 bit and data 16 bit
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*/
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static int w1_reg_a8_v16_read(void *context, unsigned int reg,
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unsigned int *val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 255)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_READ_DATA);
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w1_write_8(sl->master, reg);
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*val = w1_read_8(sl->master);
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*val |= w1_read_8(sl->master)<<8;
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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static int w1_reg_a8_v16_write(void *context, unsigned int reg,
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unsigned int val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 255)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_WRITE_DATA);
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w1_write_8(sl->master, reg);
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w1_write_8(sl->master, val & 0x00FF);
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w1_write_8(sl->master, val>>8 & 0x00FF);
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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/*
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* 1-Wire slaves registers with addess 16 bit and data 16 bit
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*/
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static int w1_reg_a16_v16_read(void *context, unsigned int reg,
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unsigned int *val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 65535)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_READ_DATA);
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w1_write_8(sl->master, reg & 0x00FF);
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w1_write_8(sl->master, reg>>8 & 0x00FF);
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*val = w1_read_8(sl->master);
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*val |= w1_read_8(sl->master)<<8;
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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static int w1_reg_a16_v16_write(void *context, unsigned int reg,
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unsigned int val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 65535)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_WRITE_DATA);
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w1_write_8(sl->master, reg & 0x00FF);
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w1_write_8(sl->master, reg>>8 & 0x00FF);
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w1_write_8(sl->master, val & 0x00FF);
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w1_write_8(sl->master, val>>8 & 0x00FF);
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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/*
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* Various types of supported bus addressing
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*/
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static struct regmap_bus regmap_w1_bus_a8_v8 = {
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.reg_read = w1_reg_a8_v8_read,
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.reg_write = w1_reg_a8_v8_write,
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};
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static struct regmap_bus regmap_w1_bus_a8_v16 = {
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.reg_read = w1_reg_a8_v16_read,
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.reg_write = w1_reg_a8_v16_write,
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};
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static struct regmap_bus regmap_w1_bus_a16_v16 = {
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.reg_read = w1_reg_a16_v16_read,
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.reg_write = w1_reg_a16_v16_write,
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};
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static const struct regmap_bus *regmap_get_w1_bus(struct device *w1_dev,
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const struct regmap_config *config)
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{
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if (config->reg_bits == 8 && config->val_bits == 8)
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return ®map_w1_bus_a8_v8;
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if (config->reg_bits == 8 && config->val_bits == 16)
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return ®map_w1_bus_a8_v16;
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if (config->reg_bits == 16 && config->val_bits == 16)
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return ®map_w1_bus_a16_v16;
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return ERR_PTR(-ENOTSUPP);
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}
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struct regmap *__regmap_init_w1(struct device *w1_dev,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name)
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{
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const struct regmap_bus *bus = regmap_get_w1_bus(w1_dev, config);
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if (IS_ERR(bus))
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return ERR_CAST(bus);
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return __regmap_init(w1_dev, bus, w1_dev, config,
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lock_key, lock_name);
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return NULL;
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}
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EXPORT_SYMBOL_GPL(__regmap_init_w1);
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struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name)
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{
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const struct regmap_bus *bus = regmap_get_w1_bus(w1_dev, config);
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if (IS_ERR(bus))
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return ERR_CAST(bus);
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return __devm_regmap_init(w1_dev, bus, w1_dev, config,
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lock_key, lock_name);
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return NULL;
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}
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EXPORT_SYMBOL_GPL(__devm_regmap_init_w1);
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MODULE_LICENSE("GPL");
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@ -461,6 +461,10 @@ struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name);
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struct regmap *__regmap_init_w1(struct device *w1_dev,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name);
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struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
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void __iomem *regs,
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const struct regmap_config *config,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name);
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struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name);
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struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
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const char *clk_id,
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void __iomem *regs,
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__regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \
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dev, config)
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/**
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* regmap_init_w1() - Initialise register map
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*
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* @w1_dev: Device that will be interacted with
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* @config: Configuration for register map
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*
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* The return value will be an ERR_PTR() on error or a valid pointer to
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* a struct regmap.
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*/
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#define regmap_init_w1(w1_dev, config) \
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__regmap_lockdep_wrapper(__regmap_init_w1, #config, \
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w1_dev, config)
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/**
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* regmap_init_mmio_clk() - Initialise register map with register clock
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*
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__regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \
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dev, config)
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/**
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* devm_regmap_init_w1() - Initialise managed register map
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*
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* @w1_dev: Device that will be interacted with
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* @config: Configuration for register map
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*
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* The return value will be an ERR_PTR() on error or a valid pointer
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* to a struct regmap. The regmap will be automatically freed by the
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* device management code.
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*/
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#define devm_regmap_init_w1(w1_dev, config) \
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__regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \
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w1_dev, config)
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/**
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* devm_regmap_init_mmio_clk() - Initialise managed register map with clock
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*
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