mirror of https://gitee.com/openkylin/linux.git
ARM: tegra: Add new PCIe regulator properties
These new properties more accurately reflect the real connections of the boards and therefore make it easier to match them up with schematics. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -562,9 +562,17 @@ pmc@7000e400 {
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};
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pcie-controller@80003000 {
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status = "okay";
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avdd-pex-supply = <&pci_vdd_reg>;
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vdd-pex-supply = <&pci_vdd_reg>;
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avdd-pex-pll-supply = <&pci_vdd_reg>;
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avdd-plle-supply = <&pci_vdd_reg>;
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vddio-pex-clk-supply = <&pci_clk_reg>;
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/* deprecated */
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pex-clk-supply = <&pci_clk_reg>;
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vdd-supply = <&pci_vdd_reg>;
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status = "okay";
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pci@1,0 {
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status = "okay";
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@ -473,6 +473,13 @@ pmc@7000e400 {
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};
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pcie-controller@80003000 {
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avdd-pex-supply = <&pci_vdd_reg>;
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vdd-pex-supply = <&pci_vdd_reg>;
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avdd-pex-pll-supply = <&pci_vdd_reg>;
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avdd-plle-supply = <&pci_vdd_reg>;
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vddio-pex-clk-supply = <&pci_clk_reg>;
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/* deprecated */
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pex-clk-supply = <&pci_clk_reg>;
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vdd-supply = <&pci_vdd_reg>;
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};
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@ -318,6 +318,14 @@ pmc@7000e400 {
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pcie-controller@80003000 {
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status = "okay";
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avdd-pex-supply = <&pci_vdd_reg>;
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vdd-pex-supply = <&pci_vdd_reg>;
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avdd-pex-pll-supply = <&pci_vdd_reg>;
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avdd-plle-supply = <&pci_vdd_reg>;
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vddio-pex-clk-supply = <&pci_clk_reg>;
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/* deprecated */
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pex-clk-supply = <&pci_clk_reg>;
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vdd-supply = <&pci_vdd_reg>;
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@ -17,6 +17,17 @@ memory {
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pcie-controller@00003000 {
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status = "okay";
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avdd-pexa-supply = <&ldo1_reg>;
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vdd-pexa-supply = <&ldo1_reg>;
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avdd-pexb-supply = <&ldo1_reg>;
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vdd-pexb-supply = <&ldo1_reg>;
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avdd-pex-pll-supply = <&ldo1_reg>;
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avdd-plle-supply = <&ldo1_reg>;
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vddio-pex-ctl-supply = <&sys_3v3_reg>;
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hvdd-pex-supply = <&sys_3v3_pexs_reg>;
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/* deprecated */
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pex-clk-supply = <&sys_3v3_pexs_reg>;
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vdd-supply = <&ldo1_reg>;
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avdd-supply = <&ldo2_reg>;
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@ -38,6 +38,16 @@ memory {
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pcie-controller@00003000 {
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status = "okay";
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/* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
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avdd-pexb-supply = <&ldo1_reg>;
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vdd-pexb-supply = <&ldo1_reg>;
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avdd-pex-pll-supply = <&ldo1_reg>;
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hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
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vddio-pex-ctl-supply = <&sys_3v3_reg>;
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avdd-plle-supply = <&ldo2_reg>;
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/* deprecated */
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pex-clk-supply = <&pex_hvdd_3v3_reg>;
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vdd-supply = <&ldo1_reg>;
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avdd-supply = <&ldo2_reg>;
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