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drm/i915: refactor register fw read/write macros for recent GENs 

The only difference for the more recent of those macros is the version
of the *_reg_<read/write>_fw_domains function. Passing the function
prefix in allows us to re-use the same macro to generate functions for
different GENs and will make it easier to add new accessors in the future

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1486171409-21542-1-git-send-email-daniele.ceraolospurio@intel.com
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Daniele Ceraolo Spurio 2017-02-03 17:23:29 -08:00 committed by Chris Wilson
parent 4a04e37122
commit ccfceda22c
1 changed files with 10 additions and 30 deletions
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40
drivers/gpu/drm/i915/intel_uncore.c
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@ -992,29 +992,19 @@ static inline void __force_wake_auto(struct drm_i915_private *dev_priv,
___force_wake_auto(dev_priv, fw_domains); ___force_wake_auto(dev_priv, fw_domains);
} }
#define __gen6_read(x) \ #define __gen_read(func, x) \
static u##x \ static u##x \
gen6_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \ func##_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \
enum forcewake_domains fw_engine; \ enum forcewake_domains fw_engine; \
GEN6_READ_HEADER(x); \ GEN6_READ_HEADER(x); \
fw_engine = __gen6_reg_read_fw_domains(offset); \ fw_engine = __##func##_reg_read_fw_domains(offset); \
if (fw_engine) \
__force_wake_auto(dev_priv, fw_engine); \
val = __raw_i915_read##x(dev_priv, reg); \
GEN6_READ_FOOTER; \
}
#define __fwtable_read(x) \
static u##x \
fwtable_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \
enum forcewake_domains fw_engine; \
GEN6_READ_HEADER(x); \
fw_engine = __fwtable_reg_read_fw_domains(offset); \
if (fw_engine) \ if (fw_engine) \
__force_wake_auto(dev_priv, fw_engine); \ __force_wake_auto(dev_priv, fw_engine); \
val = __raw_i915_read##x(dev_priv, reg); \ val = __raw_i915_read##x(dev_priv, reg); \
GEN6_READ_FOOTER; \ GEN6_READ_FOOTER; \
} }
#define __gen6_read(x) __gen_read(gen6, x)
#define __fwtable_read(x) __gen_read(fwtable, x)
#define __gen9_decoupled_read(x) \ #define __gen9_decoupled_read(x) \
static u##x \ static u##x \
@ -1115,29 +1105,19 @@ gen6_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool
GEN6_WRITE_FOOTER; \ GEN6_WRITE_FOOTER; \
} }
#define __gen8_write(x) \ #define __gen_write(func, x) \
static void \ static void \
gen8_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \ func##_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \
enum forcewake_domains fw_engine; \ enum forcewake_domains fw_engine; \
GEN6_WRITE_HEADER; \ GEN6_WRITE_HEADER; \
fw_engine = __gen8_reg_write_fw_domains(offset); \ fw_engine = __##func##_reg_write_fw_domains(offset); \
if (fw_engine) \
__force_wake_auto(dev_priv, fw_engine); \
__raw_i915_write##x(dev_priv, reg, val); \
GEN6_WRITE_FOOTER; \
}
#define __fwtable_write(x) \
static void \
fwtable_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \
enum forcewake_domains fw_engine; \
GEN6_WRITE_HEADER; \
fw_engine = __fwtable_reg_write_fw_domains(offset); \
if (fw_engine) \ if (fw_engine) \
__force_wake_auto(dev_priv, fw_engine); \ __force_wake_auto(dev_priv, fw_engine); \
__raw_i915_write##x(dev_priv, reg, val); \ __raw_i915_write##x(dev_priv, reg, val); \
GEN6_WRITE_FOOTER; \ GEN6_WRITE_FOOTER; \
} }
#define __gen8_write(x) __gen_write(gen8, x)
#define __fwtable_write(x) __gen_write(fwtable, x)
#define __gen9_decoupled_write(x) \ #define __gen9_decoupled_write(x) \
static void \ static void \