mirror of https://gitee.com/openkylin/linux.git
powerpc/85xx: Add AltiVec support for e6500
The e6500 core adds support for AltiVec on a Book-E class processor. Connect up all the various exception handling code and build config mechanisms to allow user spaces apps to utilize AltiVec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -374,7 +374,7 @@ extern const char *powerpc_base_platform;
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#define CPU_FTRS_E6500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
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CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
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CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
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CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
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CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_ALTIVEC_COMP)
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#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
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/* 64-bit CPUs */
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@ -67,6 +67,10 @@
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#define BOOKE_INTERRUPT_HV_SYSCALL 40
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#define BOOKE_INTERRUPT_HV_PRIV 41
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/* altivec */
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#define BOOKE_INTERRUPT_ALTIVEC_UNAVAIL 42
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#define BOOKE_INTERRUPT_ALTIVEC_ASSIST 43
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/* book3s */
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#define BOOK3S_INTERRUPT_SYSTEM_RESET 0x100
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@ -53,6 +53,15 @@ _GLOBAL(__e500_dcache_setup)
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isync
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blr
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_GLOBAL(__setup_cpu_e6500)
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mflr r6
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#ifdef CONFIG_PPC64
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bl .setup_altivec_ivors
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#endif
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bl __setup_cpu_e5500
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mtlr r6
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blr
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#ifdef CONFIG_PPC32
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_GLOBAL(__setup_cpu_e200)
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/* enable dedicated debug exception handling resources (Debug APU) */
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@ -107,6 +116,13 @@ _GLOBAL(__setup_cpu_e5500)
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#endif
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#ifdef CONFIG_PPC_BOOK3E_64
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_GLOBAL(__restore_cpu_e6500)
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mflr r5
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bl .setup_altivec_ivors
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bl __restore_cpu_e5500
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mtlr r5
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blr
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_GLOBAL(__restore_cpu_e5500)
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mflr r4
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bl __e500_icache_setup
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@ -74,7 +74,9 @@ extern void __restore_cpu_a2(void);
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#endif /* CONFIG_PPC64 */
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#if defined(CONFIG_E500)
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extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_e5500(void);
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extern void __restore_cpu_e6500(void);
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#endif /* CONFIG_E500 */
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
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@ -2065,7 +2067,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.pvr_value = 0x80400000,
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.cpu_name = "e6500",
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.cpu_features = CPU_FTRS_E6500,
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.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
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.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
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MMU_FTR_USE_TLBILX,
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.icache_bsize = 64,
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@ -2073,9 +2076,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.num_pmcs = 4,
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.oprofile_cpu_type = "ppc/e6500",
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.oprofile_type = PPC_OPROFILE_FSL_EMB,
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.cpu_setup = __setup_cpu_e5500,
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.cpu_setup = __setup_cpu_e6500,
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#ifndef CONFIG_PPC32
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.cpu_restore = __restore_cpu_e5500,
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.cpu_restore = __restore_cpu_e6500,
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#endif
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.machine_check = machine_check_e500mc,
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.platform = "ppce6500",
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@ -299,6 +299,8 @@ interrupt_base_book3e: /* fake trap */
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EXCEPTION_STUB(0x1a0, watchdog) /* 0x09f0 */
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EXCEPTION_STUB(0x1c0, data_tlb_miss)
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EXCEPTION_STUB(0x1e0, instruction_tlb_miss)
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EXCEPTION_STUB(0x200, altivec_unavailable) /* 0x0f20 */
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EXCEPTION_STUB(0x220, altivec_assist) /* 0x1700 */
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EXCEPTION_STUB(0x260, perfmon)
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EXCEPTION_STUB(0x280, doorbell)
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EXCEPTION_STUB(0x2a0, doorbell_crit)
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@ -395,6 +397,45 @@ interrupt_end_book3e:
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bl .kernel_fp_unavailable_exception
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b .ret_from_except
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/* Altivec Unavailable Interrupt */
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START_EXCEPTION(altivec_unavailable);
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NORMAL_EXCEPTION_PROLOG(0x200, BOOKE_INTERRUPT_ALTIVEC_UNAVAIL,
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PROLOG_ADDITION_NONE)
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/* we can probably do a shorter exception entry for that one... */
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EXCEPTION_COMMON(0x200, PACA_EXGEN, INTS_KEEP)
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#ifdef CONFIG_ALTIVEC
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BEGIN_FTR_SECTION
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ld r12,_MSR(r1)
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andi. r0,r12,MSR_PR;
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beq- 1f
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bl .load_up_altivec
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b fast_exception_return
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1:
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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#endif
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INTS_DISABLE
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bl .save_nvgprs
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .altivec_unavailable_exception
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b .ret_from_except
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/* AltiVec Assist */
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START_EXCEPTION(altivec_assist);
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NORMAL_EXCEPTION_PROLOG(0x220, BOOKE_INTERRUPT_ALTIVEC_ASSIST,
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PROLOG_ADDITION_NONE)
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EXCEPTION_COMMON(0x220, PACA_EXGEN, INTS_DISABLE)
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bl .save_nvgprs
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addi r3,r1,STACK_FRAME_OVERHEAD
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#ifdef CONFIG_ALTIVEC
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BEGIN_FTR_SECTION
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bl .altivec_assist_exception
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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#else
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bl .unknown_exception
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#endif
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b .ret_from_except
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/* Decrementer Interrupt */
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MASKABLE_EXCEPTION(0x900, BOOKE_INTERRUPT_DECREMENTER,
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decrementer, .timer_interrupt, ACK_DEC)
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@ -807,6 +848,7 @@ fast_exception_return:
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BAD_STACK_TRAMPOLINE(0x000)
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BAD_STACK_TRAMPOLINE(0x100)
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BAD_STACK_TRAMPOLINE(0x200)
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BAD_STACK_TRAMPOLINE(0x220)
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BAD_STACK_TRAMPOLINE(0x260)
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BAD_STACK_TRAMPOLINE(0x280)
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BAD_STACK_TRAMPOLINE(0x2a0)
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@ -1350,6 +1392,11 @@ _GLOBAL(__setup_base_ivors)
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blr
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_GLOBAL(setup_altivec_ivors)
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SET_IVOR(32, 0x200) /* AltiVec Unavailable */
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SET_IVOR(33, 0x220) /* AltiVec Assist */
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blr
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_GLOBAL(setup_perfmon_ivor)
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SET_IVOR(35, 0x260) /* Performance Monitor */
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blr
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@ -232,7 +232,7 @@ config PHYS_64BIT
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config ALTIVEC
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bool "AltiVec Support"
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depends on 6xx || POWER4
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depends on 6xx || POWER4 || (PPC_E500MC && PPC64)
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---help---
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This option enables kernel support for the Altivec extensions to the
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PowerPC processor. The kernel currently supports saving and restoring
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