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e1000e: 82577/8/9 mis-configured OEM bits during S0->Sx
The LPLU (Low Power Link Up) and Gigabit Disable bits (a.k.a. OEM bits) were being configured incorrectly when device goes to D3 state. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -3591,7 +3591,7 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
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ew32(PHY_CTRL, phy_ctrl);
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if (hw->mac.type >= e1000_pchlan) {
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e1000_oem_bits_config_ich8lan(hw, true);
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e1000_oem_bits_config_ich8lan(hw, false);
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ret_val = hw->phy.ops.acquire(hw);
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if (ret_val)
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return;
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