openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

ARM: S5PV310: Change to using s3c_gpio_cfgpin_range() 

This patch changes the code setting ranges of GPIO pins in mach-s5pv310 using
s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range().

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Kukjin Kim 2010-10-01 16:05:07 +09:00
parent 64c5bd841b
commit ce5d3ac1f5
3 changed files with 3 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/mach-s5pv310/setup-i2c0.c
View File

@ -21,8 +21,7 @@ struct platform_device; /* don't need the contents */
void s3c_i2c0_cfg_gpio(struct platform_device *dev) void s3c_i2c0_cfg_gpio(struct platform_device *dev)
{ {
s3c_gpio_cfgpin(S5PV310_GPD1(0), S3C_GPIO_SFN(2)); s3c_gpio_cfgpin_range(S5PV310_GPD1(0), 2, S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV310_GPD1(0), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PV310_GPD1(0), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PV310_GPD1(1), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV310_GPD1(1), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PV310_GPD1(1), S3C_GPIO_PULL_UP);
} }

3
arch/arm/mach-s5pv310/setup-i2c1.c
View File

@ -18,8 +18,7 @@ struct platform_device; /* don't need the contents */
void s3c_i2c1_cfg_gpio(struct platform_device *dev) void s3c_i2c1_cfg_gpio(struct platform_device *dev)
{ {
s3c_gpio_cfgpin(S5PV310_GPD1(2), S3C_GPIO_SFN(2)); s3c_gpio_cfgpin_range(S5PV310_GPD1(2), 2, S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV310_GPD1(2), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PV310_GPD1(2), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PV310_GPD1(3), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV310_GPD1(3), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PV310_GPD1(3), S3C_GPIO_PULL_UP);
} }

3
arch/arm/mach-s5pv310/setup-i2c2.c
View File

@ -18,8 +18,7 @@ struct platform_device; /* don't need the contents */
void s3c_i2c2_cfg_gpio(struct platform_device *dev) void s3c_i2c2_cfg_gpio(struct platform_device *dev)
{ {
s3c_gpio_cfgpin(S5PV310_GPA0(6), S3C_GPIO_SFN(3)); s3c_gpio_cfgpin_range(S5PV310_GPA0(6), 2, S3C_GPIO_SFN(3));
s3c_gpio_setpull(S5PV310_GPA0(6), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PV310_GPA0(6), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PV310_GPA0(7), S3C_GPIO_SFN(3));
s3c_gpio_setpull(S5PV310_GPA0(7), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PV310_GPA0(7), S3C_GPIO_PULL_UP);
} }