mirror of https://gitee.com/openkylin/linux.git
MIPS: Sort out CPU type to name translation.
As noticed by David Daney <ddaney@caviumnetworks.com>, the old long switch statement did not comply with the Linux C coding style. It was also yet another place of code to be changed when adding a new processor type leading to annoying bugs for example in /proc/cpuinfo. Fixed by moving the setting of the CPU type string into the core of the probing code and a few BUG_ON() test to ensure the CPU probing code indeed did its job and removing multiple now redundant tests. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
parent
255a12fbf9
commit
cea7e2dfde
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@ -286,11 +286,12 @@ static inline int __cpu_has_fpu(void)
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#define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE \
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| MIPS_CPU_COUNTER)
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static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
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{
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_R2000:
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c->cputype = CPU_R2000;
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__cpu_name[cpu] = "R2000";
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c->isa_level = MIPS_CPU_ISA_I;
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c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
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MIPS_CPU_NOFPUEX;
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@ -299,13 +300,19 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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c->tlbsize = 64;
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break;
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case PRID_IMP_R3000:
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if ((c->processor_id & 0xff) == PRID_REV_R3000A)
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if (cpu_has_confreg())
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if ((c->processor_id & 0xff) == PRID_REV_R3000A) {
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if (cpu_has_confreg()) {
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c->cputype = CPU_R3081E;
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else
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__cpu_name[cpu] = "R3081";
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} else {
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c->cputype = CPU_R3000A;
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else
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__cpu_name[cpu] = "R3000A";
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}
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break;
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} else {
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c->cputype = CPU_R3000;
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__cpu_name[cpu] = "R3000";
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}
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c->isa_level = MIPS_CPU_ISA_I;
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c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
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MIPS_CPU_NOFPUEX;
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@ -315,15 +322,21 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R4000:
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if (read_c0_config() & CONF_SC) {
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if ((c->processor_id & 0xff) >= PRID_REV_R4400)
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if ((c->processor_id & 0xff) >= PRID_REV_R4400) {
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c->cputype = CPU_R4400PC;
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else
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c->cputype = CPU_R4000PC;
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__cpu_name[cpu] = "R4400PC";
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} else {
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if ((c->processor_id & 0xff) >= PRID_REV_R4400)
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c->cputype = CPU_R4000PC;
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__cpu_name[cpu] = "R4000PC";
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}
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} else {
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if ((c->processor_id & 0xff) >= PRID_REV_R4400) {
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c->cputype = CPU_R4400SC;
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else
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__cpu_name[cpu] = "R4400SC";
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} else {
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c->cputype = CPU_R4000SC;
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__cpu_name[cpu] = "R4000SC";
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}
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}
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c->isa_level = MIPS_CPU_ISA_III;
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@ -336,25 +349,34 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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switch (c->processor_id & 0xf0) {
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case PRID_REV_VR4111:
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c->cputype = CPU_VR4111;
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__cpu_name[cpu] = "NEC VR4111";
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break;
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case PRID_REV_VR4121:
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c->cputype = CPU_VR4121;
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__cpu_name[cpu] = "NEC VR4121";
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break;
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case PRID_REV_VR4122:
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if ((c->processor_id & 0xf) < 0x3)
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if ((c->processor_id & 0xf) < 0x3) {
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c->cputype = CPU_VR4122;
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else
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__cpu_name[cpu] = "NEC VR4122";
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} else {
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c->cputype = CPU_VR4181A;
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__cpu_name[cpu] = "NEC VR4181A";
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}
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break;
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case PRID_REV_VR4130:
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if ((c->processor_id & 0xf) < 0x4)
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if ((c->processor_id & 0xf) < 0x4) {
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c->cputype = CPU_VR4131;
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else
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__cpu_name[cpu] = "NEC VR4131";
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} else {
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c->cputype = CPU_VR4133;
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__cpu_name[cpu] = "NEC VR4133";
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}
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break;
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default:
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printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
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c->cputype = CPU_VR41XX;
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__cpu_name[cpu] = "NEC Vr41xx";
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break;
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}
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c->isa_level = MIPS_CPU_ISA_III;
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@ -363,6 +385,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R4300:
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c->cputype = CPU_R4300;
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__cpu_name[cpu] = "R4300";
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c->isa_level = MIPS_CPU_ISA_III;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
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MIPS_CPU_LLSC;
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@ -370,6 +393,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R4600:
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c->cputype = CPU_R4600;
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__cpu_name[cpu] = "R4600";
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c->isa_level = MIPS_CPU_ISA_III;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
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MIPS_CPU_LLSC;
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@ -384,6 +408,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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* it's c0_prid id number with the TX3900.
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*/
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c->cputype = CPU_R4650;
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__cpu_name[cpu] = "R4650";
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c->isa_level = MIPS_CPU_ISA_III;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
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c->tlbsize = 48;
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@ -395,25 +420,26 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) {
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c->cputype = CPU_TX3927;
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__cpu_name[cpu] = "TX3927";
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c->tlbsize = 64;
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} else {
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switch (c->processor_id & 0xff) {
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case PRID_REV_TX3912:
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c->cputype = CPU_TX3912;
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__cpu_name[cpu] = "TX3912";
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c->tlbsize = 32;
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break;
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case PRID_REV_TX3922:
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c->cputype = CPU_TX3922;
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__cpu_name[cpu] = "TX3922";
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c->tlbsize = 64;
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break;
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default:
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c->cputype = CPU_UNKNOWN;
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break;
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}
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}
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break;
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case PRID_IMP_R4700:
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c->cputype = CPU_R4700;
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__cpu_name[cpu] = "R4700";
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c->isa_level = MIPS_CPU_ISA_III;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
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MIPS_CPU_LLSC;
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@ -421,6 +447,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_TX49:
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c->cputype = CPU_TX49XX;
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__cpu_name[cpu] = "R49XX";
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c->isa_level = MIPS_CPU_ISA_III;
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c->options = R4K_OPTS | MIPS_CPU_LLSC;
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if (!(c->processor_id & 0x08))
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@ -429,6 +456,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R5000:
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c->cputype = CPU_R5000;
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__cpu_name[cpu] = "R5000";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
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MIPS_CPU_LLSC;
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@ -436,6 +464,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R5432:
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c->cputype = CPU_R5432;
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__cpu_name[cpu] = "R5432";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
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MIPS_CPU_WATCH | MIPS_CPU_LLSC;
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@ -443,6 +472,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R5500:
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c->cputype = CPU_R5500;
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__cpu_name[cpu] = "R5500";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
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MIPS_CPU_WATCH | MIPS_CPU_LLSC;
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@ -450,6 +480,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_NEVADA:
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c->cputype = CPU_NEVADA;
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__cpu_name[cpu] = "Nevada";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
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MIPS_CPU_DIVEC | MIPS_CPU_LLSC;
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@ -457,6 +488,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R6000:
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c->cputype = CPU_R6000;
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__cpu_name[cpu] = "R6000";
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c->isa_level = MIPS_CPU_ISA_II;
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c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
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MIPS_CPU_LLSC;
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@ -464,6 +496,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R6000A:
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c->cputype = CPU_R6000A;
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__cpu_name[cpu] = "R6000A";
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c->isa_level = MIPS_CPU_ISA_II;
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c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
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MIPS_CPU_LLSC;
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@ -471,6 +504,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_RM7000:
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c->cputype = CPU_RM7000;
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__cpu_name[cpu] = "RM7000";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
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MIPS_CPU_LLSC;
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@ -486,6 +520,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_RM9000:
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c->cputype = CPU_RM9000;
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__cpu_name[cpu] = "RM9000";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
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MIPS_CPU_LLSC;
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@ -500,6 +535,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R8000:
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c->cputype = CPU_R8000;
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__cpu_name[cpu] = "RM8000";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
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MIPS_CPU_FPU | MIPS_CPU_32FPR |
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@ -508,6 +544,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R10000:
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c->cputype = CPU_R10000;
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__cpu_name[cpu] = "R10000";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
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MIPS_CPU_FPU | MIPS_CPU_32FPR |
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@ -517,6 +554,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R12000:
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c->cputype = CPU_R12000;
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__cpu_name[cpu] = "R12000";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
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MIPS_CPU_FPU | MIPS_CPU_32FPR |
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@ -526,6 +564,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_R14000:
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c->cputype = CPU_R14000;
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__cpu_name[cpu] = "R14000";
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c->isa_level = MIPS_CPU_ISA_IV;
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c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
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MIPS_CPU_FPU | MIPS_CPU_32FPR |
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@ -535,6 +574,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
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break;
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case PRID_IMP_LOONGSON2:
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c->cputype = CPU_LOONGSON2;
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__cpu_name[cpu] = "ICT Loongson-2";
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c->isa_level = MIPS_CPU_ISA_III;
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c->options = R4K_OPTS |
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MIPS_CPU_FPU | MIPS_CPU_LLSC |
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@ -678,51 +718,62 @@ extern void spram_config(void);
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static inline void spram_config(void) {}
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#endif
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static inline void cpu_probe_mips(struct cpuinfo_mips *c)
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static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
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{
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decode_configs(c);
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_4KC:
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c->cputype = CPU_4KC;
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__cpu_name[cpu] = "MIPS 4Kc";
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break;
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case PRID_IMP_4KEC:
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c->cputype = CPU_4KEC;
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__cpu_name[cpu] = "MIPS 4KEc";
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break;
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case PRID_IMP_4KECR2:
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c->cputype = CPU_4KEC;
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__cpu_name[cpu] = "MIPS 4KEc";
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break;
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case PRID_IMP_4KSC:
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case PRID_IMP_4KSD:
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c->cputype = CPU_4KSC;
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__cpu_name[cpu] = "MIPS 4KSc";
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break;
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case PRID_IMP_5KC:
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c->cputype = CPU_5KC;
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__cpu_name[cpu] = "MIPS 5Kc";
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break;
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case PRID_IMP_20KC:
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c->cputype = CPU_20KC;
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__cpu_name[cpu] = "MIPS 20Kc";
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break;
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case PRID_IMP_24K:
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case PRID_IMP_24KE:
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c->cputype = CPU_24K;
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__cpu_name[cpu] = "MIPS 24Kc";
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break;
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case PRID_IMP_25KF:
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c->cputype = CPU_25KF;
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__cpu_name[cpu] = "MIPS 25Kc";
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break;
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case PRID_IMP_34K:
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c->cputype = CPU_34K;
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__cpu_name[cpu] = "MIPS 34Kc";
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break;
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case PRID_IMP_74K:
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c->cputype = CPU_74K;
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__cpu_name[cpu] = "MIPS 74Kc";
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break;
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case PRID_IMP_1004K:
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c->cputype = CPU_1004K;
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__cpu_name[cpu] = "MIPS 1004Kc";
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break;
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}
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spram_config();
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}
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static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
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static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu)
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{
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decode_configs(c);
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switch (c->processor_id & 0xff00) {
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@ -731,23 +782,31 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
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switch ((c->processor_id >> 24) & 0xff) {
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case 0:
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c->cputype = CPU_AU1000;
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__cpu_name[cpu] = "Au1000";
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break;
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case 1:
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c->cputype = CPU_AU1500;
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__cpu_name[cpu] = "Au1500";
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break;
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case 2:
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c->cputype = CPU_AU1100;
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__cpu_name[cpu] = "Au1100";
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break;
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case 3:
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c->cputype = CPU_AU1550;
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__cpu_name[cpu] = "Au1550";
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break;
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case 4:
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c->cputype = CPU_AU1200;
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if (2 == (c->processor_id & 0xff))
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__cpu_name[cpu] = "Au1200";
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if ((c->processor_id & 0xff) == 2) {
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c->cputype = CPU_AU1250;
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__cpu_name[cpu] = "Au1250";
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}
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break;
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case 5:
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c->cputype = CPU_AU1210;
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__cpu_name[cpu] = "Au1210";
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break;
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default:
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panic("Unknown Au Core!");
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@ -757,154 +816,67 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
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}
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}
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static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
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static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu)
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{
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decode_configs(c);
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switch (c->processor_id & 0xff00) {
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||||
case PRID_IMP_SB1:
|
||||
c->cputype = CPU_SB1;
|
||||
__cpu_name[cpu] = "SiByte SB1";
|
||||
/* FPU in pass1 is known to have issues. */
|
||||
if ((c->processor_id & 0xff) < 0x02)
|
||||
c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
|
||||
break;
|
||||
case PRID_IMP_SB1A:
|
||||
c->cputype = CPU_SB1A;
|
||||
__cpu_name[cpu] = "SiByte SB1A";
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
|
||||
static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu)
|
||||
{
|
||||
decode_configs(c);
|
||||
switch (c->processor_id & 0xff00) {
|
||||
case PRID_IMP_SR71000:
|
||||
c->cputype = CPU_SR71000;
|
||||
__cpu_name[cpu] = "Sandcraft SR71000";
|
||||
c->scache.ways = 8;
|
||||
c->tlbsize = 64;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void cpu_probe_nxp(struct cpuinfo_mips *c)
|
||||
static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu)
|
||||
{
|
||||
decode_configs(c);
|
||||
switch (c->processor_id & 0xff00) {
|
||||
case PRID_IMP_PR4450:
|
||||
c->cputype = CPU_PR4450;
|
||||
__cpu_name[cpu] = "Philips PR4450";
|
||||
c->isa_level = MIPS_CPU_ISA_M32R1;
|
||||
break;
|
||||
default:
|
||||
panic("Unknown NXP Core!"); /* REVISIT: die? */
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
|
||||
static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
|
||||
{
|
||||
decode_configs(c);
|
||||
switch (c->processor_id & 0xff00) {
|
||||
case PRID_IMP_BCM3302:
|
||||
c->cputype = CPU_BCM3302;
|
||||
__cpu_name[cpu] = "Broadcom BCM3302";
|
||||
break;
|
||||
case PRID_IMP_BCM4710:
|
||||
c->cputype = CPU_BCM4710;
|
||||
break;
|
||||
default:
|
||||
c->cputype = CPU_UNKNOWN;
|
||||
__cpu_name[cpu] = "Broadcom BCM4710";
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
const char *__cpu_name[NR_CPUS];
|
||||
|
||||
/*
|
||||
* Name a CPU
|
||||
*/
|
||||
static __cpuinit const char *cpu_to_name(struct cpuinfo_mips *c)
|
||||
{
|
||||
const char *name = NULL;
|
||||
|
||||
switch (c->cputype) {
|
||||
case CPU_UNKNOWN: name = "unknown"; break;
|
||||
case CPU_R2000: name = "R2000"; break;
|
||||
case CPU_R3000: name = "R3000"; break;
|
||||
case CPU_R3000A: name = "R3000A"; break;
|
||||
case CPU_R3041: name = "R3041"; break;
|
||||
case CPU_R3051: name = "R3051"; break;
|
||||
case CPU_R3052: name = "R3052"; break;
|
||||
case CPU_R3081: name = "R3081"; break;
|
||||
case CPU_R3081E: name = "R3081E"; break;
|
||||
case CPU_R4000PC: name = "R4000PC"; break;
|
||||
case CPU_R4000SC: name = "R4000SC"; break;
|
||||
case CPU_R4000MC: name = "R4000MC"; break;
|
||||
case CPU_R4200: name = "R4200"; break;
|
||||
case CPU_R4400PC: name = "R4400PC"; break;
|
||||
case CPU_R4400SC: name = "R4400SC"; break;
|
||||
case CPU_R4400MC: name = "R4400MC"; break;
|
||||
case CPU_R4600: name = "R4600"; break;
|
||||
case CPU_R6000: name = "R6000"; break;
|
||||
case CPU_R6000A: name = "R6000A"; break;
|
||||
case CPU_R8000: name = "R8000"; break;
|
||||
case CPU_R10000: name = "R10000"; break;
|
||||
case CPU_R12000: name = "R12000"; break;
|
||||
case CPU_R14000: name = "R14000"; break;
|
||||
case CPU_R4300: name = "R4300"; break;
|
||||
case CPU_R4650: name = "R4650"; break;
|
||||
case CPU_R4700: name = "R4700"; break;
|
||||
case CPU_R5000: name = "R5000"; break;
|
||||
case CPU_R5000A: name = "R5000A"; break;
|
||||
case CPU_R4640: name = "R4640"; break;
|
||||
case CPU_NEVADA: name = "Nevada"; break;
|
||||
case CPU_RM7000: name = "RM7000"; break;
|
||||
case CPU_RM9000: name = "RM9000"; break;
|
||||
case CPU_R5432: name = "R5432"; break;
|
||||
case CPU_4KC: name = "MIPS 4Kc"; break;
|
||||
case CPU_5KC: name = "MIPS 5Kc"; break;
|
||||
case CPU_R4310: name = "R4310"; break;
|
||||
case CPU_SB1: name = "SiByte SB1"; break;
|
||||
case CPU_SB1A: name = "SiByte SB1A"; break;
|
||||
case CPU_TX3912: name = "TX3912"; break;
|
||||
case CPU_TX3922: name = "TX3922"; break;
|
||||
case CPU_TX3927: name = "TX3927"; break;
|
||||
case CPU_AU1000: name = "Au1000"; break;
|
||||
case CPU_AU1500: name = "Au1500"; break;
|
||||
case CPU_AU1100: name = "Au1100"; break;
|
||||
case CPU_AU1550: name = "Au1550"; break;
|
||||
case CPU_AU1200: name = "Au1200"; break;
|
||||
case CPU_AU1210: name = "Au1210"; break;
|
||||
case CPU_AU1250: name = "Au1250"; break;
|
||||
case CPU_4KEC: name = "MIPS 4KEc"; break;
|
||||
case CPU_4KSC: name = "MIPS 4KSc"; break;
|
||||
case CPU_VR41XX: name = "NEC Vr41xx"; break;
|
||||
case CPU_R5500: name = "R5500"; break;
|
||||
case CPU_TX49XX: name = "TX49xx"; break;
|
||||
case CPU_20KC: name = "MIPS 20Kc"; break;
|
||||
case CPU_24K: name = "MIPS 24K"; break;
|
||||
case CPU_25KF: name = "MIPS 25Kf"; break;
|
||||
case CPU_34K: name = "MIPS 34K"; break;
|
||||
case CPU_1004K: name = "MIPS 1004K"; break;
|
||||
case CPU_74K: name = "MIPS 74K"; break;
|
||||
case CPU_VR4111: name = "NEC VR4111"; break;
|
||||
case CPU_VR4121: name = "NEC VR4121"; break;
|
||||
case CPU_VR4122: name = "NEC VR4122"; break;
|
||||
case CPU_VR4131: name = "NEC VR4131"; break;
|
||||
case CPU_VR4133: name = "NEC VR4133"; break;
|
||||
case CPU_VR4181: name = "NEC VR4181"; break;
|
||||
case CPU_VR4181A: name = "NEC VR4181A"; break;
|
||||
case CPU_SR71000: name = "Sandcraft SR71000"; break;
|
||||
case CPU_BCM3302: name = "Broadcom BCM3302"; break;
|
||||
case CPU_BCM4710: name = "Broadcom BCM4710"; break;
|
||||
case CPU_PR4450: name = "Philips PR4450"; break;
|
||||
case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
|
||||
return name;
|
||||
}
|
||||
|
||||
__cpuinit void cpu_probe(void)
|
||||
{
|
||||
struct cpuinfo_mips *c = ¤t_cpu_data;
|
||||
|
|
@ -917,30 +889,31 @@ __cpuinit void cpu_probe(void)
|
|||
c->processor_id = read_c0_prid();
|
||||
switch (c->processor_id & 0xff0000) {
|
||||
case PRID_COMP_LEGACY:
|
||||
cpu_probe_legacy(c);
|
||||
cpu_probe_legacy(c, cpu);
|
||||
break;
|
||||
case PRID_COMP_MIPS:
|
||||
cpu_probe_mips(c);
|
||||
cpu_probe_mips(c, cpu);
|
||||
break;
|
||||
case PRID_COMP_ALCHEMY:
|
||||
cpu_probe_alchemy(c);
|
||||
cpu_probe_alchemy(c, cpu);
|
||||
break;
|
||||
case PRID_COMP_SIBYTE:
|
||||
cpu_probe_sibyte(c);
|
||||
cpu_probe_sibyte(c, cpu);
|
||||
break;
|
||||
case PRID_COMP_BROADCOM:
|
||||
cpu_probe_broadcom(c);
|
||||
cpu_probe_broadcom(c, cpu);
|
||||
break;
|
||||
case PRID_COMP_SANDCRAFT:
|
||||
cpu_probe_sandcraft(c);
|
||||
cpu_probe_sandcraft(c, cpu);
|
||||
break;
|
||||
case PRID_COMP_NXP:
|
||||
cpu_probe_nxp(c);
|
||||
cpu_probe_nxp(c, cpu);
|
||||
break;
|
||||
default:
|
||||
c->cputype = CPU_UNKNOWN;
|
||||
}
|
||||
|
||||
BUG_ON(!__cpu_name[cpu]);
|
||||
BUG_ON(c->cputype == CPU_UNKNOWN);
|
||||
|
||||
/*
|
||||
* Platform code can force the cpu type to optimize code
|
||||
* generation. In that case be sure the cpu type is correctly
|
||||
|
|
@ -960,8 +933,6 @@ __cpuinit void cpu_probe(void)
|
|||
}
|
||||
}
|
||||
|
||||
__cpu_name[cpu] = cpu_to_name(c);
|
||||
|
||||
if (cpu_has_mips_r2)
|
||||
c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
|
||||
else
|
||||
|
|
|
|||
Loading…
Reference in New Issue