mirror of https://gitee.com/openkylin/linux.git
thermal: exynos: Add support to handle many instances of TMU
This patch adds support to handle multiple instances of the TMU controllers. This is done by removing the static structure to register with the core thermal and creating it dynamically for each instance of the TMU controller. The interrupt is made shared type to handle shared interrupts. Now since the ISR needs the core thermal framework to be registered so request_irq is moved after the core registration is done. Also the identifier of the TMU controller is extracted from device tree alias. This will be used for TMU specific initialisation. Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Acked-by: Eduardo Valentin <eduardo.valentin@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
This commit is contained in:
parent
1cd1ecb611
commit
cebe7373a7
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@ -85,6 +85,7 @@ struct thermal_sensor_conf {
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struct thermal_cooling_conf cooling_data;
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void *driver_data;
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void *pzone_data;
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struct device *dev;
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};
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/*Functions used exynos based thermal sensor driver*/
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@ -26,15 +26,32 @@
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include "exynos_thermal_common.h"
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#include "exynos_tmu.h"
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#include "exynos_tmu_data.h"
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/**
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* struct exynos_tmu_data : A structure to hold the private data of the TMU
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driver
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* @id: identifier of the one instance of the TMU controller.
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* @pdata: pointer to the tmu platform/configuration data
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* @base: base address of the single instance of the TMU controller.
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* @irq: irq number of the TMU controller.
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* @soc: id of the SOC type.
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* @irq_work: pointer to the irq work structure.
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* @lock: lock to implement synchronization.
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* @clk: pointer to the clock structure.
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* @temp_error1: fused value of the first point trim.
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* @temp_error2: fused value of the second point trim.
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* @reg_conf: pointer to structure to register with core thermal.
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*/
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struct exynos_tmu_data {
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int id;
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struct exynos_tmu_platform_data *pdata;
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struct resource *mem;
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void __iomem *base;
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int irq;
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enum soc_type soc;
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@ -42,6 +59,7 @@ struct exynos_tmu_data {
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struct mutex lock;
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struct clk *clk;
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u8 temp_error1, temp_error2;
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struct thermal_sensor_conf *reg_conf;
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};
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/*
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@ -345,12 +363,6 @@ static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
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{ return -EINVAL; }
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#endif/*CONFIG_THERMAL_EMULATION*/
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static struct thermal_sensor_conf exynos_sensor_conf = {
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.name = "exynos-therm",
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.read_temperature = (int (*)(void *))exynos_tmu_read,
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.write_emul_temp = exynos_tmu_set_emulation,
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};
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static void exynos_tmu_work(struct work_struct *work)
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{
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struct exynos_tmu_data *data = container_of(work,
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@ -359,7 +371,7 @@ static void exynos_tmu_work(struct work_struct *work)
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const struct exynos_tmu_registers *reg = pdata->registers;
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unsigned int val_irq;
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exynos_report_trigger(&exynos_sensor_conf);
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exynos_report_trigger(data->reg_conf);
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mutex_lock(&data->lock);
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clk_enable(data->clk);
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@ -404,33 +416,73 @@ MODULE_DEVICE_TABLE(of, exynos_tmu_match);
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#endif
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static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
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struct platform_device *pdev)
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struct platform_device *pdev, int id)
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{
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#ifdef CONFIG_OF
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struct exynos_tmu_init_data *data_table;
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struct exynos_tmu_platform_data *tmu_data;
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if (pdev->dev.of_node) {
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const struct of_device_id *match;
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match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
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if (!match)
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return NULL;
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return (struct exynos_tmu_platform_data *) match->data;
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data_table = (struct exynos_tmu_init_data *) match->data;
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if (!data_table || id >= data_table->tmu_count)
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return NULL;
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tmu_data = data_table->tmu_data;
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return (struct exynos_tmu_platform_data *) (tmu_data + id);
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}
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#endif
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return NULL;
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}
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static int exynos_tmu_probe(struct platform_device *pdev)
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static int exynos_map_dt_data(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data;
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struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
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int ret, i;
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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struct exynos_tmu_platform_data *pdata;
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struct resource res;
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if (!pdata)
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pdata = exynos_get_driver_data(pdev);
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if (!data)
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return -ENODEV;
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data->id = of_alias_get_id(pdev->dev.of_node, "tmuctrl");
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if (data->id < 0)
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data->id = 0;
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data->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
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if (data->irq <= 0) {
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dev_err(&pdev->dev, "failed to get IRQ\n");
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return -ENODEV;
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}
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if (of_address_to_resource(pdev->dev.of_node, 0, &res)) {
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dev_err(&pdev->dev, "failed to get Resource 0\n");
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return -ENODEV;
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}
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data->base = devm_ioremap(&pdev->dev, res.start, resource_size(&res));
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if (!data->base) {
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dev_err(&pdev->dev, "Failed to ioremap memory\n");
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return -EADDRNOTAVAIL;
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}
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pdata = exynos_get_driver_data(pdev, data->id);
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if (!pdata) {
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dev_err(&pdev->dev, "No platform init data supplied.\n");
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return -ENODEV;
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}
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data->pdata = pdata;
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return 0;
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}
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static int exynos_tmu_probe(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data;
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struct exynos_tmu_platform_data *pdata;
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struct thermal_sensor_conf *sensor_conf;
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int ret, i;
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data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
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GFP_KERNEL);
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if (!data) {
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@ -438,26 +490,17 @@ static int exynos_tmu_probe(struct platform_device *pdev)
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return -ENOMEM;
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}
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data->irq = platform_get_irq(pdev, 0);
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if (data->irq < 0) {
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dev_err(&pdev->dev, "Failed to get platform irq\n");
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return data->irq;
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}
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platform_set_drvdata(pdev, data);
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mutex_init(&data->lock);
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ret = exynos_map_dt_data(pdev);
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if (ret)
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return ret;
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pdata = data->pdata;
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INIT_WORK(&data->irq_work, exynos_tmu_work);
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data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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data->base = devm_ioremap_resource(&pdev->dev, data->mem);
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if (IS_ERR(data->base))
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return PTR_ERR(data->base);
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ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
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IRQF_TRIGGER_RISING, "exynos-tmu", data);
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if (ret) {
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dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
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return ret;
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}
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data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
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if (IS_ERR(data->clk)) {
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dev_err(&pdev->dev, "Failed to get clock\n");
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@ -477,10 +520,6 @@ static int exynos_tmu_probe(struct platform_device *pdev)
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goto err_clk;
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}
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data->pdata = pdata;
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platform_set_drvdata(pdev, data);
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mutex_init(&data->lock);
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ret = exynos_tmu_initialize(pdev);
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if (ret) {
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dev_err(&pdev->dev, "Failed to initialize TMU\n");
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@ -489,35 +528,54 @@ static int exynos_tmu_probe(struct platform_device *pdev)
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exynos_tmu_control(pdev, true);
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/* Register the sensor with thermal management interface */
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(&exynos_sensor_conf)->driver_data = data;
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exynos_sensor_conf.trip_data.trip_count = pdata->trigger_enable[0] +
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/* Allocate a structure to register with the exynos core thermal */
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sensor_conf = devm_kzalloc(&pdev->dev,
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sizeof(struct thermal_sensor_conf), GFP_KERNEL);
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if (!sensor_conf) {
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dev_err(&pdev->dev, "Failed to allocate registration struct\n");
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ret = -ENOMEM;
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goto err_clk;
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}
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sprintf(sensor_conf->name, "therm_zone%d", data->id);
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sensor_conf->read_temperature = (int (*)(void *))exynos_tmu_read;
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sensor_conf->write_emul_temp =
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(int (*)(void *, unsigned long))exynos_tmu_set_emulation;
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sensor_conf->driver_data = data;
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sensor_conf->trip_data.trip_count = pdata->trigger_enable[0] +
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pdata->trigger_enable[1] + pdata->trigger_enable[2]+
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pdata->trigger_enable[3];
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for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++) {
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exynos_sensor_conf.trip_data.trip_val[i] =
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for (i = 0; i < sensor_conf->trip_data.trip_count; i++) {
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sensor_conf->trip_data.trip_val[i] =
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pdata->threshold + pdata->trigger_levels[i];
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exynos_sensor_conf.trip_data.trip_type[i] =
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sensor_conf->trip_data.trip_type[i] =
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pdata->trigger_type[i];
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}
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exynos_sensor_conf.trip_data.trigger_falling = pdata->threshold_falling;
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sensor_conf->trip_data.trigger_falling = pdata->threshold_falling;
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exynos_sensor_conf.cooling_data.freq_clip_count =
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pdata->freq_tab_count;
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sensor_conf->cooling_data.freq_clip_count = pdata->freq_tab_count;
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for (i = 0; i < pdata->freq_tab_count; i++) {
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exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
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sensor_conf->cooling_data.freq_data[i].freq_clip_max =
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pdata->freq_tab[i].freq_clip_max;
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exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
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sensor_conf->cooling_data.freq_data[i].temp_level =
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pdata->freq_tab[i].temp_level;
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}
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ret = exynos_register_thermal(&exynos_sensor_conf);
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sensor_conf->dev = &pdev->dev;
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/* Register the sensor with thermal management interface */
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ret = exynos_register_thermal(sensor_conf);
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if (ret) {
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dev_err(&pdev->dev, "Failed to register thermal interface\n");
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goto err_clk;
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}
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data->reg_conf = sensor_conf;
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ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
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IRQF_TRIGGER_RISING | IRQF_SHARED, dev_name(&pdev->dev), data);
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if (ret) {
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dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
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goto err_clk;
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}
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return 0;
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err_clk:
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@ -531,7 +589,7 @@ static int exynos_tmu_remove(struct platform_device *pdev)
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exynos_tmu_control(pdev, false);
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exynos_unregister_thermal(&exynos_sensor_conf);
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exynos_unregister_thermal(data->reg_conf);
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clk_unprepare(data->clk);
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@ -250,4 +250,17 @@ struct exynos_tmu_platform_data {
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unsigned int freq_tab_count;
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const struct exynos_tmu_registers *registers;
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};
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/**
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* struct exynos_tmu_init_data
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* @tmu_count: number of TMU instances.
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* @tmu_data: platform data of all TMU instances.
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* This structure is required to store data for multi-instance exynos tmu
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* driver.
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*/
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struct exynos_tmu_init_data {
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int tmu_count;
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struct exynos_tmu_platform_data tmu_data[];
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};
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#endif /* _EXYNOS_TMU_H */
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@ -48,38 +48,44 @@ static const struct exynos_tmu_registers exynos4210_tmu_registers = {
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.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
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.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
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};
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struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
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.threshold = 80,
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.trigger_levels[0] = 5,
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.trigger_levels[1] = 20,
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.trigger_levels[2] = 30,
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.trigger_enable[0] = true,
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.trigger_enable[1] = true,
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.trigger_enable[2] = true,
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.trigger_enable[3] = false,
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.trigger_type[0] = THROTTLE_ACTIVE,
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.trigger_type[1] = THROTTLE_ACTIVE,
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.trigger_type[2] = SW_TRIP,
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.max_trigger_level = 4,
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.gain = 15,
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.reference_voltage = 7,
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.cal_type = TYPE_ONE_POINT_TRIMMING,
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.min_efuse_value = 40,
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.max_efuse_value = 100,
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.first_point_trim = 25,
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.second_point_trim = 85,
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.default_temp_offset = 50,
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.freq_tab[0] = {
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.freq_clip_max = 800 * 1000,
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.temp_level = 85,
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struct exynos_tmu_init_data const exynos4210_default_tmu_data = {
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.tmu_data = {
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{
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.threshold = 80,
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.trigger_levels[0] = 5,
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.trigger_levels[1] = 20,
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.trigger_levels[2] = 30,
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.trigger_enable[0] = true,
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.trigger_enable[1] = true,
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.trigger_enable[2] = true,
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.trigger_enable[3] = false,
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.trigger_type[0] = THROTTLE_ACTIVE,
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.trigger_type[1] = THROTTLE_ACTIVE,
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.trigger_type[2] = SW_TRIP,
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.max_trigger_level = 4,
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.gain = 15,
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.reference_voltage = 7,
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.cal_type = TYPE_ONE_POINT_TRIMMING,
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.min_efuse_value = 40,
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.max_efuse_value = 100,
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.first_point_trim = 25,
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.second_point_trim = 85,
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.default_temp_offset = 50,
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.freq_tab[0] = {
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.freq_clip_max = 800 * 1000,
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.temp_level = 85,
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},
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.freq_tab[1] = {
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.freq_clip_max = 200 * 1000,
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.temp_level = 100,
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},
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.freq_tab_count = 2,
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.type = SOC_ARCH_EXYNOS4210,
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.registers = &exynos4210_tmu_registers,
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},
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},
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.freq_tab[1] = {
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.freq_clip_max = 200 * 1000,
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.temp_level = 100,
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},
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.freq_tab_count = 2,
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.type = SOC_ARCH_EXYNOS4210,
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.registers = &exynos4210_tmu_registers,
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.tmu_count = 1,
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};
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#endif
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@ -120,41 +126,48 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
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.emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
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.emul_time_mask = EXYNOS_EMUL_TIME_MASK,
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};
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struct exynos_tmu_platform_data const exynos5250_default_tmu_data = {
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.threshold_falling = 10,
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.trigger_levels[0] = 85,
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.trigger_levels[1] = 103,
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.trigger_levels[2] = 110,
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.trigger_levels[3] = 120,
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.trigger_enable[0] = true,
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.trigger_enable[1] = true,
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.trigger_enable[2] = true,
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.trigger_enable[3] = false,
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.trigger_type[0] = THROTTLE_ACTIVE,
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.trigger_type[1] = THROTTLE_ACTIVE,
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.trigger_type[2] = SW_TRIP,
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.trigger_type[3] = HW_TRIP,
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.max_trigger_level = 4,
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.gain = 8,
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.reference_voltage = 16,
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.noise_cancel_mode = 4,
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.cal_type = TYPE_ONE_POINT_TRIMMING,
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.efuse_value = 55,
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.min_efuse_value = 40,
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.max_efuse_value = 100,
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.first_point_trim = 25,
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.second_point_trim = 85,
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.default_temp_offset = 50,
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.freq_tab[0] = {
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.freq_clip_max = 800 * 1000,
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.temp_level = 85,
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},
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.freq_tab[1] = {
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.freq_clip_max = 200 * 1000,
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.temp_level = 103,
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},
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.freq_tab_count = 2,
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.type = SOC_ARCH_EXYNOS,
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#define EXYNOS5250_TMU_DATA \
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.threshold_falling = 10, \
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||||
.trigger_levels[0] = 85, \
|
||||
.trigger_levels[1] = 103, \
|
||||
.trigger_levels[2] = 110, \
|
||||
.trigger_levels[3] = 120, \
|
||||
.trigger_enable[0] = true, \
|
||||
.trigger_enable[1] = true, \
|
||||
.trigger_enable[2] = true, \
|
||||
.trigger_enable[3] = false, \
|
||||
.trigger_type[0] = THROTTLE_ACTIVE, \
|
||||
.trigger_type[1] = THROTTLE_ACTIVE, \
|
||||
.trigger_type[2] = SW_TRIP, \
|
||||
.trigger_type[3] = HW_TRIP, \
|
||||
.max_trigger_level = 4, \
|
||||
.gain = 8, \
|
||||
.reference_voltage = 16, \
|
||||
.noise_cancel_mode = 4, \
|
||||
.cal_type = TYPE_ONE_POINT_TRIMMING, \
|
||||
.efuse_value = 55, \
|
||||
.min_efuse_value = 40, \
|
||||
.max_efuse_value = 100, \
|
||||
.first_point_trim = 25, \
|
||||
.second_point_trim = 85, \
|
||||
.default_temp_offset = 50, \
|
||||
.freq_tab[0] = { \
|
||||
.freq_clip_max = 800 * 1000, \
|
||||
.temp_level = 85, \
|
||||
}, \
|
||||
.freq_tab[1] = { \
|
||||
.freq_clip_max = 200 * 1000, \
|
||||
.temp_level = 103, \
|
||||
}, \
|
||||
.freq_tab_count = 2, \
|
||||
.type = SOC_ARCH_EXYNOS, \
|
||||
.registers = &exynos5250_tmu_registers,
|
||||
|
||||
struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
|
||||
.tmu_data = {
|
||||
{ EXYNOS5250_TMU_DATA },
|
||||
},
|
||||
.tmu_count = 1,
|
||||
};
|
||||
#endif
|
||||
|
|
|
@ -94,14 +94,14 @@
|
|||
#define EXYNOS_MAX_TRIGGER_PER_REG 4
|
||||
|
||||
#if defined(CONFIG_CPU_EXYNOS4210)
|
||||
extern struct exynos_tmu_platform_data const exynos4210_default_tmu_data;
|
||||
extern struct exynos_tmu_init_data const exynos4210_default_tmu_data;
|
||||
#define EXYNOS4210_TMU_DRV_DATA (&exynos4210_default_tmu_data)
|
||||
#else
|
||||
#define EXYNOS4210_TMU_DRV_DATA (NULL)
|
||||
#endif
|
||||
|
||||
#if (defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412))
|
||||
extern struct exynos_tmu_platform_data const exynos5250_default_tmu_data;
|
||||
extern struct exynos_tmu_init_data const exynos5250_default_tmu_data;
|
||||
#define EXYNOS5250_TMU_DRV_DATA (&exynos5250_default_tmu_data)
|
||||
#else
|
||||
#define EXYNOS5250_TMU_DRV_DATA (NULL)
|
||||
|
|
Loading…
Reference in New Issue