mirror of https://gitee.com/openkylin/linux.git
x86/entry: Distangle idtentry
idtentry is a completely unreadable maze. Split it into distinct idtentry variants which only contain the minimal code: - idtentry for regular exceptions - idtentry_mce_debug for #MCE and #DB - idtentry_df for #DF The generated binary code is equivalent. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Acked-by: Andy Lutomirski <luto@kernel.org> Link: https://lkml.kernel.org/r/20200505134903.949227617@linutronix.de
This commit is contained in:
Thomas Gleixner
parent
67f1386616
commit
cfa82a0053
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@ -37,6 +37,7 @@
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#include <asm/pgtable_types.h>
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#include <asm/pgtable_types.h>
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#include <asm/export.h>
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#include <asm/export.h>
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#include <asm/frame.h>
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#include <asm/frame.h>
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#include <asm/trapnr.h>
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#include <asm/nospec-branch.h>
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#include <asm/nospec-branch.h>
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#include <linux/err.h>
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#include <linux/err.h>
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@ -493,6 +494,202 @@ SYM_CODE_END(spurious_entries_start)
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decl PER_CPU_VAR(irq_count)
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decl PER_CPU_VAR(irq_count)
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.endm
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.endm
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/**
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* idtentry_body - Macro to emit code calling the C function
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* @vector: Vector number
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* @cfunc: C function to be called
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* @has_error_code: Hardware pushed error code on stack
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*/
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.macro idtentry_body vector cfunc has_error_code:req
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call error_entry
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UNWIND_HINT_REGS
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.if \vector == X86_TRAP_PF
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/*
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* Store CR2 early so subsequent faults cannot clobber it. Use R12 as
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* intermediate storage as RDX can be clobbered in enter_from_user_mode().
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* GET_CR2_INTO can clobber RAX.
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*/
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GET_CR2_INTO(%r12);
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.endif
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TRACE_IRQS_OFF
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#ifdef CONFIG_CONTEXT_TRACKING
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testb $3, CS(%rsp)
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jz .Lfrom_kernel_no_ctxt_tracking_\@
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CALL_enter_from_user_mode
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.Lfrom_kernel_no_ctxt_tracking_\@:
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#endif
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movq %rsp, %rdi /* pt_regs pointer into 1st argument*/
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.if \has_error_code == 1
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movq ORIG_RAX(%rsp), %rsi /* get error code into 2nd argument*/
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movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
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.else
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xorl %esi, %esi /* Clear the error code */
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.endif
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.if \vector == X86_TRAP_PF
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movq %r12, %rdx /* Move CR2 into 3rd argument */
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.endif
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call \cfunc
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jmp error_exit
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.endm
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/**
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* idtentry - Macro to generate entry stubs for simple IDT entries
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* @vector: Vector number
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* @asmsym: ASM symbol for the entry point
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* @cfunc: C function to be called
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* @has_error_code: Hardware pushed error code on stack
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*
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* The macro emits code to set up the kernel context for straight forward
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* and simple IDT entries. No IST stack, no paranoid entry checks.
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*/
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.macro idtentry vector asmsym cfunc has_error_code:req
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SYM_CODE_START(\asmsym)
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UNWIND_HINT_IRET_REGS offset=\has_error_code*8
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ASM_CLAC
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.if \has_error_code == 0
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pushq $-1 /* ORIG_RAX: no syscall to restart */
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.endif
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.if \vector == X86_TRAP_BP
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/*
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* If coming from kernel space, create a 6-word gap to allow the
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* int3 handler to emulate a call instruction.
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*/
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testb $3, CS-ORIG_RAX(%rsp)
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jnz .Lfrom_usermode_no_gap_\@
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.rept 6
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pushq 5*8(%rsp)
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.endr
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UNWIND_HINT_IRET_REGS offset=8
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.Lfrom_usermode_no_gap_\@:
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.endif
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idtentry_body \vector \cfunc \has_error_code
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_ASM_NOKPROBE(\asmsym)
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SYM_CODE_END(\asmsym)
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.endm
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/*
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* MCE and DB exceptions
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*/
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#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + (x) * 8)
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/**
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* idtentry_mce_db - Macro to generate entry stubs for #MC and #DB
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* @vector: Vector number
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* @asmsym: ASM symbol for the entry point
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* @cfunc: C function to be called
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*
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* The macro emits code to set up the kernel context for #MC and #DB
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*
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* If the entry comes from user space it uses the normal entry path
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* including the return to user space work and preemption checks on
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* exit.
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*
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* If hits in kernel mode then it needs to go through the paranoid
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* entry as the exception can hit any random state. No preemption
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* check on exit to keep the paranoid path simple.
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*
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* If the trap is #DB then the interrupt stack entry in the IST is
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* moved to the second stack, so a potential recursion will have a
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* fresh IST.
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*/
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.macro idtentry_mce_db vector asmsym cfunc
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SYM_CODE_START(\asmsym)
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UNWIND_HINT_IRET_REGS
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ASM_CLAC
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pushq $-1 /* ORIG_RAX: no syscall to restart */
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/*
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* If the entry is from userspace, switch stacks and treat it as
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* a normal entry.
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*/
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testb $3, CS-ORIG_RAX(%rsp)
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jnz .Lfrom_usermode_switch_stack_\@
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/*
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* paranoid_entry returns SWAPGS flag for paranoid_exit in EBX.
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* EBX == 0 -> SWAPGS, EBX == 1 -> no SWAPGS
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*/
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call paranoid_entry
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UNWIND_HINT_REGS
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.if \vector == X86_TRAP_DB
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TRACE_IRQS_OFF_DEBUG
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.else
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TRACE_IRQS_OFF
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.endif
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movq %rsp, %rdi /* pt_regs pointer */
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xorl %esi, %esi /* Clear the error code */
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.if \vector == X86_TRAP_DB
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subq $DB_STACK_OFFSET, CPU_TSS_IST(IST_INDEX_DB)
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.endif
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call \cfunc
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.if \vector == X86_TRAP_DB
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addq $DB_STACK_OFFSET, CPU_TSS_IST(IST_INDEX_DB)
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.endif
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jmp paranoid_exit
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/* Switch to the regular task stack and use the noist entry point */
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.Lfrom_usermode_switch_stack_\@:
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idtentry_body vector \cfunc, has_error_code=0
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_ASM_NOKPROBE(\asmsym)
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SYM_CODE_END(\asmsym)
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.endm
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/*
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* Double fault entry. Straight paranoid. No checks from which context
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* this comes because for the espfix induced #DF this would do the wrong
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* thing.
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*/
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.macro idtentry_df vector asmsym cfunc
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SYM_CODE_START(\asmsym)
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UNWIND_HINT_IRET_REGS offset=8
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ASM_CLAC
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/*
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* paranoid_entry returns SWAPGS flag for paranoid_exit in EBX.
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* EBX == 0 -> SWAPGS, EBX == 1 -> no SWAPGS
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*/
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call paranoid_entry
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UNWIND_HINT_REGS
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/* Read CR2 early */
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GET_CR2_INTO(%r12);
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TRACE_IRQS_OFF
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movq %rsp, %rdi /* pt_regs pointer into first argument */
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movq ORIG_RAX(%rsp), %rsi /* get error code into 2nd argument*/
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movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
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movq %r12, %rdx /* Move CR2 into 3rd argument */
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call \cfunc
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jmp paranoid_exit
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_ASM_NOKPROBE(\asmsym)
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SYM_CODE_END(\asmsym)
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.endm
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/*
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/*
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* Interrupt entry helper function.
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* Interrupt entry helper function.
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*
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*
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@ -860,195 +1057,35 @@ apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
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/*
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/*
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* Exception entry points.
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* Exception entry points.
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*/
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*/
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#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + (x) * 8)
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.macro idtentry_part do_sym, has_error_code:req, read_cr2:req, paranoid:req, shift_ist=-1, ist_offset=0
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idtentry X86_TRAP_DE divide_error do_divide_error has_error_code=0
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idtentry X86_TRAP_OF overflow do_overflow has_error_code=0
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idtentry X86_TRAP_BP int3 do_int3 has_error_code=0
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idtentry X86_TRAP_BR bounds do_bounds has_error_code=0
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idtentry X86_TRAP_UD invalid_op do_invalid_op has_error_code=0
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idtentry X86_TRAP_NM device_not_available do_device_not_available has_error_code=0
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idtentry X86_TRAP_OLD_MF coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
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idtentry X86_TRAP_TS invalid_TSS do_invalid_TSS has_error_code=1
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idtentry X86_TRAP_NP segment_not_present do_segment_not_present has_error_code=1
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idtentry X86_TRAP_SS stack_segment do_stack_segment has_error_code=1
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idtentry X86_TRAP_GP general_protection do_general_protection has_error_code=1
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idtentry X86_TRAP_SPURIOUS spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
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idtentry X86_TRAP_MF coprocessor_error do_coprocessor_error has_error_code=0
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idtentry X86_TRAP_AC alignment_check do_alignment_check has_error_code=1
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idtentry X86_TRAP_XF simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
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.if \paranoid
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idtentry X86_TRAP_PF page_fault do_page_fault has_error_code=1
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call paranoid_entry
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/* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
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.else
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call error_entry
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.endif
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UNWIND_HINT_REGS
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.if \read_cr2
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/*
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* Store CR2 early so subsequent faults cannot clobber it. Use R12 as
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* intermediate storage as RDX can be clobbered in enter_from_user_mode().
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* GET_CR2_INTO can clobber RAX.
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*/
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GET_CR2_INTO(%r12);
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.endif
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.if \shift_ist != -1
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TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
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.else
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TRACE_IRQS_OFF
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.endif
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#ifdef CONFIG_CONTEXT_TRACKING
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.if \paranoid == 0
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testb $3, CS(%rsp)
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jz .Lfrom_kernel_no_context_tracking_\@
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CALL_enter_from_user_mode
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.Lfrom_kernel_no_context_tracking_\@:
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.endif
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#endif
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movq %rsp, %rdi /* pt_regs pointer */
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.if \has_error_code
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movq ORIG_RAX(%rsp), %rsi /* get error code */
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movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
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.else
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xorl %esi, %esi /* no error code */
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.endif
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.if \shift_ist != -1
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subq $\ist_offset, CPU_TSS_IST(\shift_ist)
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.endif
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.if \read_cr2
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movq %r12, %rdx /* Move CR2 into 3rd argument */
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.endif
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call \do_sym
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.if \shift_ist != -1
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addq $\ist_offset, CPU_TSS_IST(\shift_ist)
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.endif
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.if \paranoid
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/* this procedure expect "no swapgs" flag in ebx */
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jmp paranoid_exit
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.else
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jmp error_exit
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.endif
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.endm
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/**
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* idtentry - Generate an IDT entry stub
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* @sym: Name of the generated entry point
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* @do_sym: C function to be called
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* @has_error_code: True if this IDT vector has an error code on the stack
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* @paranoid: non-zero means that this vector may be invoked from
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* kernel mode with user GSBASE and/or user CR3.
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* 2 is special -- see below.
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* @shift_ist: Set to an IST index if entries from kernel mode should
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* decrement the IST stack so that nested entries get a
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* fresh stack. (This is for #DB, which has a nasty habit
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* of recursing.)
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* @create_gap: create a 6-word stack gap when coming from kernel mode.
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* @read_cr2: load CR2 into the 3rd argument; done before calling any C code
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*
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* idtentry generates an IDT stub that sets up a usable kernel context,
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* creates struct pt_regs, and calls @do_sym. The stub has the following
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* special behaviors:
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*
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* On an entry from user mode, the stub switches from the trampoline or
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* IST stack to the normal thread stack. On an exit to user mode, the
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* normal exit-to-usermode path is invoked.
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*
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* On an exit to kernel mode, if @paranoid == 0, we check for preemption,
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* whereas we omit the preemption check if @paranoid != 0. This is purely
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* because the implementation is simpler this way. The kernel only needs
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* to check for asynchronous kernel preemption when IRQ handlers return.
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*
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* If @paranoid == 0, then the stub will handle IRET faults by pretending
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* that the fault came from user mode. It will handle gs_change faults by
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* pretending that the fault happened with kernel GSBASE. Since this handling
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* is omitted for @paranoid != 0, the #GP, #SS, and #NP stubs must have
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* @paranoid == 0. This special handling will do the wrong thing for
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* espfix-induced #DF on IRET, so #DF must not use @paranoid == 0.
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*
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* @paranoid == 2 is special: the stub will never switch stacks. This is for
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* #DF: if the thread stack is somehow unusable, we'll still get a useful OOPS.
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*/
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.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 ist_offset=0 create_gap=0 read_cr2=0
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SYM_CODE_START(\sym)
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UNWIND_HINT_IRET_REGS offset=\has_error_code*8
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/* Sanity check */
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.if \shift_ist != -1 && \paranoid != 1
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.error "using shift_ist requires paranoid=1"
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.endif
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.if \create_gap && \paranoid
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.error "using create_gap requires paranoid=0"
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.endif
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ASM_CLAC
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.if \has_error_code == 0
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pushq $-1 /* ORIG_RAX: no syscall to restart */
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.endif
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||||||
.if \paranoid == 1
|
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||||||
testb $3, CS-ORIG_RAX(%rsp) /* If coming from userspace, switch stacks */
|
|
||||||
jnz .Lfrom_usermode_switch_stack_\@
|
|
||||||
.endif
|
|
||||||
|
|
||||||
.if \create_gap == 1
|
|
||||||
/*
|
|
||||||
* If coming from kernel space, create a 6-word gap to allow the
|
|
||||||
* int3 handler to emulate a call instruction.
|
|
||||||
*/
|
|
||||||
testb $3, CS-ORIG_RAX(%rsp)
|
|
||||||
jnz .Lfrom_usermode_no_gap_\@
|
|
||||||
.rept 6
|
|
||||||
pushq 5*8(%rsp)
|
|
||||||
.endr
|
|
||||||
UNWIND_HINT_IRET_REGS offset=8
|
|
||||||
.Lfrom_usermode_no_gap_\@:
|
|
||||||
.endif
|
|
||||||
|
|
||||||
idtentry_part \do_sym, \has_error_code, \read_cr2, \paranoid, \shift_ist, \ist_offset
|
|
||||||
|
|
||||||
.if \paranoid == 1
|
|
||||||
/*
|
|
||||||
* Entry from userspace. Switch stacks and treat it
|
|
||||||
* as a normal entry. This means that paranoid handlers
|
|
||||||
* run in real process context if user_mode(regs).
|
|
||||||
*/
|
|
||||||
.Lfrom_usermode_switch_stack_\@:
|
|
||||||
idtentry_part \do_sym, \has_error_code, \read_cr2, paranoid=0
|
|
||||||
.endif
|
|
||||||
|
|
||||||
_ASM_NOKPROBE(\sym)
|
|
||||||
SYM_CODE_END(\sym)
|
|
||||||
.endm
|
|
||||||
|
|
||||||
|
|
||||||
idtentry divide_error do_divide_error has_error_code=0
|
|
||||||
idtentry overflow do_overflow has_error_code=0
|
|
||||||
idtentry int3 do_int3 has_error_code=0 create_gap=1
|
|
||||||
idtentry bounds do_bounds has_error_code=0
|
|
||||||
idtentry invalid_op do_invalid_op has_error_code=0
|
|
||||||
idtentry device_not_available do_device_not_available has_error_code=0
|
|
||||||
idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
|
|
||||||
idtentry invalid_TSS do_invalid_TSS has_error_code=1
|
|
||||||
idtentry segment_not_present do_segment_not_present has_error_code=1
|
|
||||||
idtentry stack_segment do_stack_segment has_error_code=1
|
|
||||||
idtentry general_protection do_general_protection has_error_code=1
|
|
||||||
idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
|
|
||||||
idtentry coprocessor_error do_coprocessor_error has_error_code=0
|
|
||||||
idtentry alignment_check do_alignment_check has_error_code=1
|
|
||||||
idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
|
|
||||||
|
|
||||||
idtentry page_fault do_page_fault has_error_code=1 read_cr2=1
|
|
||||||
|
|
||||||
#ifdef CONFIG_X86_MCE
|
#ifdef CONFIG_X86_MCE
|
||||||
idtentry machine_check do_mce has_error_code=0 paranoid=1
|
idtentry_mce_db X86_TRAP_MCE machine_check do_mce
|
||||||
#endif
|
#endif
|
||||||
idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=IST_INDEX_DB ist_offset=DB_STACK_OFFSET
|
idtentry_mce_db X86_TRAP_DB debug do_debug
|
||||||
idtentry double_fault do_double_fault has_error_code=1 paranoid=2 read_cr2=1
|
idtentry_df X86_TRAP_DF double_fault do_double_fault
|
||||||
|
|
||||||
#ifdef CONFIG_XEN_PV
|
#ifdef CONFIG_XEN_PV
|
||||||
idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0
|
idtentry 512 /* dummy */ hypervisor_callback xen_do_hypervisor_callback has_error_code=0
|
||||||
idtentry xennmi do_nmi has_error_code=0
|
idtentry X86_TRAP_NMI xennmi do_nmi has_error_code=0
|
||||||
idtentry xendebug do_debug has_error_code=0
|
idtentry X86_TRAP_DB xendebug do_debug has_error_code=0
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue