KVM: nVMX: Clear reserved bits of #DB exit qualification

According to volume 3 of the SDM, bits 63:15 and 12:4 of the exit
qualification field for debug exceptions are reserved (cleared to
0). However, the SDM is incorrect about bit 16 (corresponding to
DR6.RTM). This bit should be set if a debug exception (#DB) or a
breakpoint exception (#BP) occurred inside an RTM region while
advanced debugging of RTM transactional regions was enabled. Note that
this is the opposite of DR6.RTM, which "indicates (when clear) that a
debug exception (#DB) or breakpoint exception (#BP) occurred inside an
RTM region while advanced debugging of RTM transactional regions was
enabled."

There is still an issue with stale DR6 bits potentially being
misreported for the current debug exception.  DR6 should not have been
modified before vectoring the #DB exception, and the "new DR6 bits"
should be available somewhere, but it was and they aren't.

Fixes: b96fb43977 ("KVM: nVMX: fixes to nested virt interrupt injection")
Signed-off-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Jim Mattson 2018-09-21 10:36:17 -07:00 committed by Paolo Bonzini
parent 5b8ee8792f
commit cfb634fe30
2 changed files with 6 additions and 2 deletions

View File

@ -177,6 +177,7 @@ enum {
#define DR6_BD (1 << 13) #define DR6_BD (1 << 13)
#define DR6_BS (1 << 14) #define DR6_BS (1 << 14)
#define DR6_BT (1 << 15)
#define DR6_RTM (1 << 16) #define DR6_RTM (1 << 16)
#define DR6_FIXED_1 0xfffe0ff0 #define DR6_FIXED_1 0xfffe0ff0
#define DR6_INIT 0xffff0ff0 #define DR6_INIT 0xffff0ff0

View File

@ -3290,10 +3290,13 @@ static int nested_vmx_check_exception(struct kvm_vcpu *vcpu, unsigned long *exit
} }
} else { } else {
if (vmcs12->exception_bitmap & (1u << nr)) { if (vmcs12->exception_bitmap & (1u << nr)) {
if (nr == DB_VECTOR) if (nr == DB_VECTOR) {
*exit_qual = vcpu->arch.dr6; *exit_qual = vcpu->arch.dr6;
else *exit_qual &= ~(DR6_FIXED_1 | DR6_BT);
*exit_qual ^= DR6_RTM;
} else {
*exit_qual = 0; *exit_qual = 0;
}
return 1; return 1;
} }
} }