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arm64: dts: qcom: Switch sc7180-trogdor to control SPI CS via GPIO 

As talked about in the patch ("arm64: dts: qcom: sc7180: Provide
pinconf for SPI to use GPIO for CS"), on some boards it makes much
more sense (and is much more efficient) to think of the SPI Chip
Select as a GPIO.  Trogdor is one such board where the SPI parts don't
run in GSI mode and we do a lot of SPI traffic.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Akash Asthana <akashast@codeaurora.org>
Link: https://lore.kernel.org/r/20200921142655.v3.2.I3c57d8b6d83d5bdad73a413eea1e249a98d11973@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Douglas Anderson 2020-09-21 14:27:17 -07:00 committed by Bjorn Andersson
parent 37dd4b7779
commit cfbb97fde6
1 changed files with 16 additions and 3 deletions
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19
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
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@ -776,7 +776,20 @@ &sdhc_2 {
cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>;
};
&spi0 {
pinctrl-0 = <&qup_spi0_cs_gpio>;
cs-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
};
&spi6 {
pinctrl-0 = <&qup_spi6_cs_gpio>;
cs-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
};
ap_spi_fp: &spi10 {
pinctrl-0 = <&qup_spi10_cs_gpio>;
cs-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
cros_ec_fp: ec@0 {
compatible = "google,cros-ec-spi";
reg = <0>;
@ -937,7 +950,7 @@ pinconf {
};
};
&qup_spi0_default {
&qup_spi0_cs_gpio {
pinconf {
pins = "gpio34", "gpio35", "gpio36", "gpio37";
drive-strength = <2>;
@ -945,7 +958,7 @@ pinconf {
};
};
&qup_spi6_default {
&qup_spi6_cs_gpio {
pinconf {
pins = "gpio59", "gpio60", "gpio61", "gpio62";
drive-strength = <2>;
@ -953,7 +966,7 @@ pinconf {
};
};
&qup_spi10_default {
&qup_spi10_cs_gpio {
pinconf {
pins = "gpio86", "gpio87", "gpio88", "gpio89";
drive-strength = <2>;