mirror of https://gitee.com/openkylin/linux.git
ath9k: remove (u16) casts from rtc register access
The RTC register offsets don't fit into 'u16' on the AR913x, so we have to remove the existing casts. Changes-licensed-under: ISC Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Tested-by: Pavel Roskin <proski@gnu.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1011,7 +1011,7 @@ static void ath9k_hw_init_pll(struct ath_hal *ah,
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pll |= SM(0xb, AR_RTC_PLL_DIV);
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pll |= SM(0xb, AR_RTC_PLL_DIV);
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}
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}
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}
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}
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REG_WRITE(ah, (u16) (AR_RTC_PLL_CONTROL), pll);
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REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
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udelay(RTC_PLL_SETTLE_DELAY);
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udelay(RTC_PLL_SETTLE_DELAY);
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@ -1550,11 +1550,11 @@ static bool ath9k_hw_set_reset(struct ath_hal *ah, int type)
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rst_flags |= AR_RTC_RC_MAC_COLD;
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rst_flags |= AR_RTC_RC_MAC_COLD;
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}
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}
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REG_WRITE(ah, (u16) (AR_RTC_RC), rst_flags);
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REG_WRITE(ah, AR_RTC_RC, rst_flags);
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udelay(50);
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udelay(50);
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REG_WRITE(ah, (u16) (AR_RTC_RC), 0);
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REG_WRITE(ah, AR_RTC_RC, 0);
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if (!ath9k_hw_wait(ah, (u16) (AR_RTC_RC), AR_RTC_RC_M, 0)) {
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if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0)) {
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DPRINTF(ah->ah_sc, ATH_DBG_RESET,
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DPRINTF(ah->ah_sc, ATH_DBG_RESET,
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"RTC stuck in MAC reset\n");
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"RTC stuck in MAC reset\n");
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return false;
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return false;
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@ -1576,8 +1576,8 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hal *ah)
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REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
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REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
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AR_RTC_FORCE_WAKE_ON_INT);
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AR_RTC_FORCE_WAKE_ON_INT);
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REG_WRITE(ah, (u16) (AR_RTC_RESET), 0);
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REG_WRITE(ah, AR_RTC_RESET, 0);
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REG_WRITE(ah, (u16) (AR_RTC_RESET), 1);
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REG_WRITE(ah, AR_RTC_RESET, 1);
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if (!ath9k_hw_wait(ah,
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if (!ath9k_hw_wait(ah,
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AR_RTC_STATUS,
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AR_RTC_STATUS,
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@ -2619,7 +2619,7 @@ static void ath9k_set_power_sleep(struct ath_hal *ah, int setChip)
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if (!AR_SREV_9100(ah))
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if (!AR_SREV_9100(ah))
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REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
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REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
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REG_CLR_BIT(ah, (u16) (AR_RTC_RESET),
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REG_CLR_BIT(ah, (AR_RTC_RESET),
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AR_RTC_RESET_EN);
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AR_RTC_RESET_EN);
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}
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}
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}
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}
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@ -953,7 +953,7 @@ enum {
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#define AR_RTC_BASE 0x00020000
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#define AR_RTC_BASE 0x00020000
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#define AR_RTC_RC \
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#define AR_RTC_RC \
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(AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0000) : 0x7000
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((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0000) : 0x7000)
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#define AR_RTC_RC_M 0x00000003
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#define AR_RTC_RC_M 0x00000003
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#define AR_RTC_RC_MAC_WARM 0x00000001
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#define AR_RTC_RC_MAC_WARM 0x00000001
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#define AR_RTC_RC_MAC_COLD 0x00000002
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#define AR_RTC_RC_MAC_COLD 0x00000002
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@ -961,7 +961,7 @@ enum {
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#define AR_RTC_RC_WARM_RESET 0x00000008
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#define AR_RTC_RC_WARM_RESET 0x00000008
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#define AR_RTC_PLL_CONTROL \
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#define AR_RTC_PLL_CONTROL \
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(AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0014) : 0x7014
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((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0014) : 0x7014)
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#define AR_RTC_PLL_DIV 0x0000001f
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#define AR_RTC_PLL_DIV 0x0000001f
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#define AR_RTC_PLL_DIV_S 0
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#define AR_RTC_PLL_DIV_S 0
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