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arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes 

Fill-in the missing SATA phys/phy-names DT properties of Armada 7k/8k
based boards.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Miquel Raynal 2019-07-31 14:21:23 +02:00 committed by Gregory CLEMENT
parent 93ab25e6f5
commit d04abe999e
5 changed files with 56 additions and 3 deletions
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5
arch/arm64/boot/dts/marvell/armada-7040-db.dts
View File

@ -219,6 +219,11 @@ partition@400000 {
&cp0_sata0 {
status = "okay";
sata-port@1 {
phys = <&cp0_comphy3 1>;
phy-names = "cp0-sata0-1-phy";
};
};
&cp0_usb3_0 {

5
arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
View File

@ -348,6 +348,11 @@ cp1_wps_button_pins: wps-button-pins {
&cp1_sata0 {
pinctrl-0 = <&cp0_pci1_reset_pins>;
status = "okay";
sata-port@1 {
phys = <&cp1_comphy0 1>;
phy-names = "cp1-sata0-1-phy";
};
};
&cp1_mdio {

18
arch/arm64/boot/dts/marvell/armada-8040-db.dts
View File

@ -143,6 +143,15 @@ expander1: pca9555@25 {
/* CON4 on CP0 expansion */
&cp0_sata0 {
status = "okay";
sata-port@0 {
phys = <&cp0_comphy1 0>;
phy-names = "cp0-sata0-0-phy";
};
sata-port@1 {
phys = <&cp0_comphy3 1>;
phy-names = "cp0-sata0-1-phy";
};
};
/* CON9 on CP0 expansion */
@ -273,6 +282,15 @@ partition@1000000 {
/* CON4 on CP1 expansion */
&cp1_sata0 {
status = "okay";
sata-port@0 {
phys = <&cp1_comphy1 0>;
phy-names = "cp1-sata0-0-phy";
};
sata-port@1 {
phys = <&cp1_comphy3 1>;
phy-names = "cp1-sata0-1-phy";
};
};
/* CON9 on CP1 expansion */

21
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
View File

@ -239,8 +239,13 @@ &cp0_eth0 {
};
&cp0_sata0 {
/* CPM Lane 0 - U29 */
status = "okay";
/* CPM Lane 5 - U29 */
sata-port@1 {
phys = <&cp0_comphy5 1>;
phy-names = "cp0-sata0-1-phy";
};
};
&cp0_sdhci0 {
@ -324,9 +329,19 @@ &cp1_uart0 {
};
&cp1_sata0 {
/* CPS Lane 1 - U32 */
/* CPS Lane 3 - U31 */
status = "okay";
/* CPS Lane 1 - U32 */
sata-port@0 {
phys = <&cp1_comphy1 0>;
phy-names = "cp1-sata0-0-phy";
};
/* CPS Lane 3 - U31 */
sata-port@1 {
phys = <&cp1_comphy3 1>;
phy-names = "cp1-sata0-1-phy";
};
};
&cp1_spi1 {

10
arch/arm64/boot/dts/marvell/armada-cp110.dtsi
View File

@ -309,7 +309,17 @@ CP110_LABEL(sata0): sata@540000 {
interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CP110_LABEL(clk) 1 15>,
<&CP110_LABEL(clk) 1 16>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
sata-port@0 {
reg = <0>;
};
sata-port@1 {
reg = <1>;
};
};
CP110_LABEL(xor0): xor@6a0000 {