drm/amd/powerplay: fix populate dpm level failed when s3 on vega10.

As the min clk may be  large than boot level can support.
in this case, just ignore the min clk.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2017-06-02 20:04:40 +08:00 committed by Alex Deucher
parent b9509c80df
commit d0856f3ad5
1 changed files with 6 additions and 7 deletions

View File

@ -3119,11 +3119,10 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
vega10_ps->performance_levels[0].gfx_clock = sclk;
vega10_ps->performance_levels[0].mem_clock = mclk;
vega10_ps->performance_levels[1].gfx_clock =
(vega10_ps->performance_levels[1].gfx_clock >=
vega10_ps->performance_levels[0].gfx_clock) ?
vega10_ps->performance_levels[1].gfx_clock :
vega10_ps->performance_levels[0].gfx_clock;
if (vega10_ps->performance_levels[1].gfx_clock <
vega10_ps->performance_levels[0].gfx_clock)
vega10_ps->performance_levels[0].gfx_clock =
vega10_ps->performance_levels[1].gfx_clock;
if (disable_mclk_switching) {
/* Set Mclk the max of level 0 and level 1 */
@ -3146,8 +3145,8 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
} else {
if (vega10_ps->performance_levels[1].mem_clock <
vega10_ps->performance_levels[0].mem_clock)
vega10_ps->performance_levels[1].mem_clock =
vega10_ps->performance_levels[0].mem_clock;
vega10_ps->performance_levels[0].mem_clock =
vega10_ps->performance_levels[1].mem_clock;
}
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,