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drm/radeon/rv6xx: implement get_current_sclk/mclk 

Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2014-09-30 10:27:42 -04:00
parent 3c94566ce1
commit d0a04d3b2e
3 changed files with 50 additions and 0 deletions
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2
drivers/gpu/drm/radeon/radeon_asic.c
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@ -1080,6 +1080,8 @@ static struct radeon_asic rv6xx_asic = {
.print_power_state = &rv6xx_dpm_print_power_state, .print_power_state = &rv6xx_dpm_print_power_state,
.debugfs_print_current_performance_level = &rv6xx_dpm_debugfs_print_current_performance_level, .debugfs_print_current_performance_level = &rv6xx_dpm_debugfs_print_current_performance_level,
.force_performance_level = &rv6xx_dpm_force_performance_level, .force_performance_level = &rv6xx_dpm_force_performance_level,
.get_current_sclk = &rv6xx_dpm_get_current_sclk,
.get_current_mclk = &rv6xx_dpm_get_current_mclk,
}, },
.pflip = { .pflip = {
.page_flip = &rs600_page_flip, .page_flip = &rs600_page_flip,

2
drivers/gpu/drm/radeon/radeon_asic.h
View File

@ -433,6 +433,8 @@ void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
struct seq_file *m); struct seq_file *m);
int rv6xx_dpm_force_performance_level(struct radeon_device *rdev, int rv6xx_dpm_force_performance_level(struct radeon_device *rdev,
enum radeon_dpm_forced_level level); enum radeon_dpm_forced_level level);
u32 rv6xx_dpm_get_current_sclk(struct radeon_device *rdev);
u32 rv6xx_dpm_get_current_mclk(struct radeon_device *rdev);
/* rs780 dpm */ /* rs780 dpm */
int rs780_dpm_init(struct radeon_device *rdev); int rs780_dpm_init(struct radeon_device *rdev);
int rs780_dpm_enable(struct radeon_device *rdev); int rs780_dpm_enable(struct radeon_device *rdev);

46
drivers/gpu/drm/radeon/rv6xx_dpm.c
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@ -2050,6 +2050,52 @@ void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
} }
} }
/* get the current sclk in 10 khz units */
u32 rv6xx_dpm_get_current_sclk(struct radeon_device *rdev)
{
struct radeon_ps *rps = rdev->pm.dpm.current_ps;
struct rv6xx_ps *ps = rv6xx_get_ps(rps);
struct rv6xx_pl *pl;
u32 current_index =
(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >>
CURRENT_PROFILE_INDEX_SHIFT;
if (current_index > 2) {
return 0;
} else {
if (current_index == 0)
pl = &ps->low;
else if (current_index == 1)
pl = &ps->medium;
else /* current_index == 2 */
pl = &ps->high;
return pl->sclk;
}
}
/* get the current mclk in 10 khz units */
u32 rv6xx_dpm_get_current_mclk(struct radeon_device *rdev)
{
struct radeon_ps *rps = rdev->pm.dpm.current_ps;
struct rv6xx_ps *ps = rv6xx_get_ps(rps);
struct rv6xx_pl *pl;
u32 current_index =
(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >>
CURRENT_PROFILE_INDEX_SHIFT;
if (current_index > 2) {
return 0;
} else {
if (current_index == 0)
pl = &ps->low;
else if (current_index == 1)
pl = &ps->medium;
else /* current_index == 2 */
pl = &ps->high;
return pl->mclk;
}
}
void rv6xx_dpm_fini(struct radeon_device *rdev) void rv6xx_dpm_fini(struct radeon_device *rdev)
{ {
int i; int i;