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Allwinner DT additions for 4.10, bis 

The usual bunch of DT additions, but most notably:
   - A31 DRM driver
   - A31 audio codec
   - WiFi for the A80-Based boards and the CHIP
   - Support for the NextThing Co CHIP Pro (the first board with NAND
     enabled)
   - New board: NanoPi M1
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Merge tag 'sunxi-dt-for-4.10-bis' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt

Pull "Allwinner DT additions for 4.10, bis" from Maxime Ripard:

The usual bunch of DT additions, but most notably:
  - A31 DRM driver
  - A31 audio codec
  - WiFi for the A80-Based boards and the CHIP
  - Support for the NextThing Co CHIP Pro (the first board with NAND
    enabled)
  - New board: NanoPi M1

* tag 'sunxi-dt-for-4.10-bis' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (41 commits)
  ARM: dts: sun6i: hummingbird-a31: Enable display output through VGA bridge
  ARM: dts: sun5i: Add touchscreen node to reference-design-tablet.dtsi
  ARM: sunxi: Add the missing clocks to the pinctrl nodes
  ARM: dts: sun7i: bananapi-m1-plus: Enable USB OTG
  ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators
  ARM: dts: sun7i: bananapi-m1-plus: Enable USB PHY for USB host support
  ARM: sun8i: sina33: Enable USB gadget
  ARM: dts: sun8i: reference-design-tablet: ldo_io1 is vcc-touchscreen
  ARM: dts: sun8i: replace enable-sdio-wakeup with wakeup-source for BananaPi M1+
  ARM: gr8: evb: Add i2s codec
  ARM: dts: sun6i: sina31s: Enable internal audio codec
  ARM: dts: sun6i: hummingbird: Enable internal audio codec
  ARM: dts: sun6i: Add audio codec device node
  ARM: gr8: evb: Enable SPDIF
  ARM: dts: sun8i: Add SPI controller node in H3
  ARM: dts: sun8i: Add SPI pinctrl node in H3
  ARM: dts: sun8i: Add dts file for NanoPi M1 SBC
  ARM: dts: sun8i: Use the common file in NanoPi NEO SBC
  ARM: dts: sun8i: Add common dtsi file for NanoPi SBCs
  ARM: dts: sun9i: cubieboard4: Enable AP6330 WiFi
  ...
This commit is contained in:
Arnd Bergmann 2016-11-26 00:52:10 +01:00
parent 6c3026980e 0fa1c17c16
commit d0bf34f39b
30 changed files with 1277 additions and 173 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/Makefile
View File

@ -760,7 +760,6 @@ dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-pcduino2.dtb \
sun4i-a10-pov-protab2-ips9.dtb
dtb-$(CONFIG_MACH_SUN5I) += \
ntc-gr8-evb.dtb \
sun5i-a10s-auxtek-t003.dtb \
sun5i-a10s-auxtek-t004.dtb \
sun5i-a10s-mk802.dtb \
@ -776,6 +775,8 @@ dtb-$(CONFIG_MACH_SUN5I) += \
sun5i-a13-olinuxino-micro.dtb \
sun5i-a13-q8-tablet.dtb \
sun5i-a13-utoo-p66.dtb \
sun5i-gr8-chip-pro.dtb \
sun5i-gr8-evb.dtb \
sun5i-r8-chip.dtb
dtb-$(CONFIG_MACH_SUN6I) += \
sun6i-a31-app4-evb1.dtb \

3
arch/arm/boot/dts/sun4i-a10.dtsi
View File

@ -967,7 +967,8 @@ pio: pinctrl@01c20800 {
compatible = "allwinner,sun4i-a10-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <28>;
clocks = <&apb0_gates 5>;
clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;

4
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
View File

@ -250,8 +250,8 @@ &reg_usb1_vbus {
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_a>,
<&spi2_cs0_pins_a>;
pinctrl-0 = <&spi2_pins_b>,
<&spi2_cs0_pins_b>;
status = "okay";
};

4
arch/arm/boot/dts/sun5i-a10s.dtsi
View File

@ -243,14 +243,14 @@ mmc1_pins_a: mmc1@0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_a: spi2@0 {
spi2_pins_b: spi2@1 {
allwinner,pins = "PB12", "PB13", "PB14";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_a: spi2_cs0@0 {
spi2_cs0_pins_b: spi2_cs0@1 {
allwinner,pins = "PB11";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;

54
arch/arm/boot/dts/sun5i-a13-olinuxino.dts
View File

@ -72,6 +72,47 @@ power {
default-state = "on";
};
};
bridge {
compatible = "dumb-vga-dac";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&tcon0_out_vga>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
vga {
compatible = "vga-connector";
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_bridge_out>;
};
};
};
};
&be0 {
status = "okay";
};
&ehci0 {
@ -211,6 +252,19 @@ &reg_usb1_vbus {
status = "okay";
};
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd_rgb666_pins>;
status = "okay";
};
&tcon0_out {
tcon0_out_vga: endpoint@0 {
reg = <0>;
remote-endpoint = <&vga_bridge_in>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_b>;

38
arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
View File

@ -83,22 +83,6 @@ &codec_pa_pin {
allwinner,pins = "PG3";
};
&i2c1 {
icn8318: touchscreen@40 {
compatible = "chipone,icn8318";
reg = <0x40>;
interrupt-parent = <&pio>;
interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
pinctrl-names = "default";
pinctrl-0 = <&ts_wake_pin_p66>;
wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
touchscreen-size-x = <800>;
touchscreen-size-y = <480>;
touchscreen-inverted-x;
touchscreen-swapped-x-y;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins_a>;
@ -121,20 +105,26 @@ i2c_lcd_pins: i2c_lcd_pin@0 {
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
ts_wake_pin_p66: ts_wake_pin@0 {
allwinner,pins = "PB3";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&reg_usb0_vbus {
gpio = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
};
&touchscreen {
compatible = "chipone,icn8318";
reg = <0x40>;
/* The P66 uses a different EINT then the reference design */
interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
/* The icn8318 binding expects wake-gpios instead of power-gpios */
wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
touchscreen-size-x = <800>;
touchscreen-size-y = <480>;
touchscreen-inverted-x;
touchscreen-swapped-x-y;
status = "okay";
};
&uart1 {
/* The P66 uses the uart pins as gpios */
status = "disabled";

266
arch/arm/boot/dts/sun5i-gr8-chip-pro.dts Normal file
View File

@ -0,0 +1,266 @@
/*
* Copyright 2016 Free Electrons
* Copyright 2016 NextThing Co
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "sun5i-gr8.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "NextThing C.H.I.P. Pro";
compatible = "nextthing,chip-pro", "nextthing,gr8";
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
status {
label = "chip-pro:white:status";
gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
mmc0_pwrseq: mmc0_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&wifi_reg_on_pin_chip_pro>;
reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
};
};
&codec {
status = "okay";
};
&ehci0 {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic@34 {
reg = <0x34>;
/*
* The interrupt is routed through the "External Fast
* Interrupt Request" pin (ball G13 of the module)
* directly to the main interrupt controller, without
* any other controller interfering.
*/
interrupts = <0>;
};
};
#include "axp209.dtsi"
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
status = "disabled";
};
&i2s0 {
pinctrl-names = "default";
pinctrl-0 = <&i2s0_mclk_pins_a>, <&i2s0_data_pins_a>;
status = "disabled";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&mmc0_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
};
&nfc {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
status = "okay";
nand@0 {
#address-cells = <2>;
#size-cells = <2>;
reg = <0>;
allwinner,rb = <0>;
nand-ecc-mode = "hw";
};
};
&ohci0 {
status = "okay";
};
&otg_sram {
status = "okay";
};
&pio {
usb0_id_pin_chip_pro: usb0-id-pin@0 {
allwinner,pins = "PG2";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
wifi_reg_on_pin_chip_pro: wifi-reg-on-pin@0 {
allwinner,pins = "PB10";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins_a>, <&pwm1_pins>;
status = "disabled";
};
&reg_dcdc2 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
regulator-always-on;
};
&reg_dcdc3 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-sys";
regulator-always-on;
};
&reg_ldo1 {
regulator-name = "vdd-rtc";
};
&reg_ldo2 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3300000>;
regulator-name = "avcc";
regulator-always-on;
};
/*
* Both LDO3 and LDO4 are used in parallel to power up the
* WiFi/BT chip.
*/
&reg_ldo3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-1";
regulator-always-on;
};
&reg_ldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-2";
regulator-always-on;
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_a>, <&uart1_cts_rts_pins_a>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins_a>, <&uart2_cts_rts_pins_a>;
status = "disabled";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins_a>, <&uart3_cts_rts_pins_a>;
status = "okay";
};
&usb_otg {
/*
* The CHIP Pro doesn't have a controllable VBUS, nor does it
* have any 5v rail on the board itself.
*
* If one wants to use it as a true OTG port, it should be
* done in the baseboard, and its DT / overlay will add it.
*/
dr_mode = "otg";
status = "okay";
};
&usb_power_supply {
status = "okay";
};
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_pin_chip_pro>;
usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
usb0_vbus_power-supply = <&usb_power_supply>;
usb1_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};

35
arch/arm/boot/dts/ntc-gr8-evb.dts → arch/arm/boot/dts/sun5i-gr8-evb.dts
View File

@ -44,7 +44,7 @@
*/
/dts-v1/;
#include "ntc-gr8.dtsi"
#include "sun5i-gr8.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
@ -75,6 +75,39 @@ backlight: backlight {
brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
default-brightness-level = <8>;
};
sound-analog {
compatible = "simple-audio-card";
simple-audio-card,name = "gr8-evb-wm8978";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <512>;
simple-audio-card,cpu {
sound-dai = <&i2s0>;
};
simple-audio-card,codec {
sound-dai = <&wm8978>;
};
};
sound-spdif {
compatible = "simple-audio-card";
simple-audio-card,name = "On-board SPDIF";
simple-audio-card,cpu {
sound-dai = <&spdif>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
};
&be0 {

47
arch/arm/boot/dts/ntc-gr8.dtsi → arch/arm/boot/dts/sun5i-gr8.dtsi
View File

@ -792,7 +792,7 @@ i2s0_data_pins_a: i2s0-data@0 {
};
i2s0_mclk_pins_a: i2s0-mclk@0 {
allwinner,pins = "PB6", "PB7", "PB8", "PB9";
allwinner,pins = "PB5";
allwinner,function = "i2s0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
@ -854,6 +854,13 @@ pwm0_pins_a: pwm0@0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm1_pins: pwm1 {
allwinner,pins = "PG13";
allwinner,function = "pwm1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spdif_tx_pins_a: spdif@0 {
allwinner,pins = "PB10";
allwinner,function = "spdif";
@ -874,6 +881,34 @@ uart1_cts_rts_pins_a: uart1-cts-rts@0 {
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart2_pins_a: uart2@1 {
allwinner,pins = "PD2", "PD3";
allwinner,function = "uart2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart2_cts_rts_pins_a: uart2-cts-rts@0 {
allwinner,pins = "PD4", "PD5";
allwinner,function = "uart2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins_a: uart3@1 {
allwinner,pins = "PG9", "PG10";
allwinner,function = "uart3";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_cts_rts_pins_a: uart3-cts-rts@0 {
allwinner,pins = "PG11", "PG12";
allwinner,function = "uart3";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
pwm: pwm@01c20e00 {
@ -978,6 +1013,16 @@ uart2: serial@01c28800 {
status = "disabled";
};
uart3: serial@01c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <4>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&apb1_gates 19>;
status = "disabled";
};
i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;

69
arch/arm/boot/dts/sun5i-r8-chip.dts
View File

@ -56,9 +56,11 @@ / {
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
serial0 = &uart1;
serial1 = &uart3;
spi0 = &spi2;
};
chosen {
@ -74,6 +76,20 @@ status {
default-state = "on";
};
};
mmc0_pwrseq: mmc0_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&chip_wifi_reg_on_pin>;
reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
};
onewire {
compatible = "w1-gpio";
gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
pinctrl-names = "default";
pinctrl-0 = <&chip_w1_pin>;
};
};
&be0 {
@ -112,6 +128,12 @@ axp209: pmic@34 {
#include "axp209.dtsi"
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
status = "disabled";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
@ -131,10 +153,15 @@ xio: gpio@38 {
};
};
&mmc0_pins_a {
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&mmc0_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
@ -156,12 +183,26 @@ chip_vbus_pin: chip_vbus_pin@0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 {
allwinner,pins = "PC19";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
chip_id_det_pin: chip_id_det_pin@0 {
allwinner,pins = "PG2";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
chip_w1_pin: chip_w1_pin@0 {
allwinner,pins = "PD2";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
};
&reg_dcdc2 {
@ -189,6 +230,28 @@ &reg_ldo2 {
regulator-always-on;
};
/*
* Both LDO3 and LDO4 are used in parallel to power up the WiFi/BT
* Chip.
*
* If those are not enabled, the SDIO part will not enumerate, and
* since there's no way currently to pass DT infos to an SDIO device,
* we cannot really do better than this ugly hack for now.
*/
&reg_ldo3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-1";
regulator-always-on;
};
&reg_ldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-2";
regulator-always-on;
};
&reg_ldo5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@ -202,6 +265,12 @@ &reg_usb0_vbus {
status = "okay";
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_a>;
status = "disabled";
};
&tcon0 {
status = "okay";
};

25
arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
View File

@ -41,6 +41,7 @@
*/
#include "sunxi-reference-design-tablet.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pwm/pwm.h>
/ {
@ -84,6 +85,23 @@ axp209: pmic@34 {
};
&i2c1 {
/*
* The gsl1680 is rated at 400KHz and it will not work reliable at
* 100KHz, this has been confirmed on multiple different q8 tablets.
* All other devices on this bus are also rated for 400KHz.
*/
clock-frequency = <400000>;
touchscreen: touchscreen {
interrupt-parent = <&pio>;
interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* EINT11 (PG11) */
pinctrl-names = "default";
pinctrl-0 = <&ts_power_pin>;
power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
/* Tablet dts must provide reg and compatible */
status = "disabled";
};
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
@ -125,6 +143,13 @@ mmc0_cd_pin: mmc0_cd_pin@0 {
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
ts_power_pin: ts_power_pin {
pins = "PB3";
function = "gpio_out";
drive-strength = <10>;
bias-disable;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
allwinner,pins = "PG1";
allwinner,function = "gpio_in";

27
arch/arm/boot/dts/sun5i.dtsi
View File

@ -547,7 +547,8 @@ intc: interrupt-controller@01c20400 {
pio: pinctrl@01c20800 {
reg = <0x01c20800 0x400>;
interrupts = <28>;
clocks = <&apb0_gates 5>;
clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
@ -574,6 +575,16 @@ i2c2_pins_a: i2c2@0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
lcd_rgb565_pins: lcd_rgb565@0 {
allwinner,pins = "PD3", "PD4", "PD5", "PD6", "PD7",
"PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
"PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
allwinner,function = "lcd0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@ -591,6 +602,20 @@ mmc2_pins_a: mmc2@0 {
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
spi2_pins_a: spi2@0 {
allwinner,pins = "PE1", "PE2", "PE3";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_a: spi2-cs0@0 {
allwinner,pins = "PE0";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins_a: uart3@0 {
allwinner,pins = "PG9", "PG10";
allwinner,function = "uart3";

80
arch/arm/boot/dts/sun6i-a31-hummingbird.dts
View File

@ -63,12 +63,79 @@ chosen {
stdout-path = "serial0:115200n8";
};
vga-connector {
compatible = "vga-connector";
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_dac_out>;
};
};
};
vga-dac {
compatible = "dumb-vga-dac";
vdd-supply = <&reg_vga_3v3>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
vga_dac_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_out_vga>;
};
};
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
vga_dac_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&vga_con_in>;
};
};
};
};
reg_vga_3v3: vga_3v3_regulator {
compatible = "regulator-fixed";
regulator-name = "vga-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
gpio = <&pio 7 25 GPIO_ACTIVE_HIGH>; /* PH25 */
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 */
};
};
&codec {
allwinner,audio-routing =
"Headphone", "HP",
"Speaker", "LINEOUT",
"LINEIN", "Line In",
"MIC1", "Mic",
"MIC2", "Headset Mic",
"Mic", "MBIAS",
"Headset Mic", "HBIAS";
allwinner,pa-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc3>;
};
@ -245,6 +312,19 @@ &reg_usb1_vbus {
status = "okay";
};
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd0_rgb888_pins>;
status = "okay";
};
&tcon0_out {
tcon0_out_vga: endpoint@0 {
reg = <0>;
remote-endpoint = <&vga_dac_in>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;

266
arch/arm/boot/dts/sun6i-a31.dtsi
View File

@ -231,6 +231,11 @@ gmac_tx_clk: clk@01c200d0 {
};
};
de: display-engine {
compatible = "allwinner,sun6i-a31-display-engine";
allwinner,pipelines = <&fe0>;
};
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
@ -246,6 +251,44 @@ dma: dma-controller@01c02000 {
#dma-cells = <1>;
};
tcon0: lcd-controller@01c0c000 {
compatible = "allwinner,sun6i-a31-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_AHB1_LCD0>;
reset-names = "lcd";
clocks = <&ccu CLK_AHB1_LCD0>,
<&ccu CLK_LCD0_CH0>,
<&ccu CLK_LCD0_CH1>;
clock-names = "ahb",
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon0-pixel-clock";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon0_in_drc0: endpoint@0 {
reg = <0>;
remote-endpoint = <&drc0_out_tcon0>;
};
};
tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
};
mmc0: mmc@01c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
@ -428,19 +471,55 @@ pio: pinctrl@01c20800 {
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_PIO>;
clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
#gpio-cells = <3>;
uart0_pins_a: uart0@0 {
allwinner,pins = "PH20", "PH21";
allwinner,function = "uart0";
gmac_pins_gmii_a: gmac_gmii@0 {
allwinner,pins = "PA0", "PA1", "PA2", "PA3",
"PA4", "PA5", "PA6", "PA7",
"PA8", "PA9", "PA10", "PA11",
"PA12", "PA13", "PA14", "PA15",
"PA16", "PA17", "PA18", "PA19",
"PA20", "PA21", "PA22", "PA23",
"PA24", "PA25", "PA26", "PA27";
allwinner,function = "gmac";
/*
* data lines in GMII mode run at 125MHz and
* might need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_mii_a: gmac_mii@0 {
allwinner,pins = "PA0", "PA1", "PA2", "PA3",
"PA8", "PA9", "PA11",
"PA12", "PA13", "PA14", "PA19",
"PA20", "PA21", "PA22", "PA23",
"PA24", "PA26", "PA27";
allwinner,function = "gmac";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_rgmii_a: gmac_rgmii@0 {
allwinner,pins = "PA0", "PA1", "PA2", "PA3",
"PA9", "PA10", "PA11",
"PA12", "PA13", "PA14", "PA19",
"PA20", "PA25", "PA26", "PA27";
allwinner,function = "gmac";
/*
* data lines in RGMII mode use DDR mode
* and need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c0_pins_a: i2c0@0 {
allwinner,pins = "PH14", "PH15";
allwinner,function = "i2c0";
@ -462,6 +541,19 @@ i2c2_pins_a: i2c2@0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
lcd0_rgb888_pins: lcd0_rgb888 {
allwinner,pins = "PD0", "PD1", "PD2", "PD3",
"PD4", "PD5", "PD6", "PD7",
"PD8", "PD9", "PD10", "PD11",
"PD12", "PD13", "PD14", "PD15",
"PD16", "PD17", "PD18", "PD19",
"PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
allwinner,function = "lcd0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
@ -506,47 +598,12 @@ mmc3_8bit_emmc_pins: mmc3@1 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_mii_a: gmac_mii@0 {
allwinner,pins = "PA0", "PA1", "PA2", "PA3",
"PA8", "PA9", "PA11",
"PA12", "PA13", "PA14", "PA19",
"PA20", "PA21", "PA22", "PA23",
"PA24", "PA26", "PA27";
allwinner,function = "gmac";
uart0_pins_a: uart0@0 {
allwinner,pins = "PH20", "PH21";
allwinner,function = "uart0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_gmii_a: gmac_gmii@0 {
allwinner,pins = "PA0", "PA1", "PA2", "PA3",
"PA4", "PA5", "PA6", "PA7",
"PA8", "PA9", "PA10", "PA11",
"PA12", "PA13", "PA14", "PA15",
"PA16", "PA17", "PA18", "PA19",
"PA20", "PA21", "PA22", "PA23",
"PA24", "PA25", "PA26", "PA27";
allwinner,function = "gmac";
/*
* data lines in GMII mode run at 125MHz and
* might need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_rgmii_a: gmac_rgmii@0 {
allwinner,pins = "PA0", "PA1", "PA2", "PA3",
"PA9", "PA10", "PA11",
"PA12", "PA13", "PA14", "PA19",
"PA20", "PA25", "PA26", "PA27";
allwinner,function = "gmac";
/*
* data lines in RGMII mode use DDR mode
* and need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
timer@01c20c00 {
@ -728,6 +785,19 @@ crypto: crypto-engine@01c15000 {
reset-names = "ahb";
};
codec: codec@01c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun6i-a31-codec";
reg = <0x01c22c00 0x400>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_CODEC>, <&ccu CLK_CODEC>;
clock-names = "apb", "codec";
resets = <&ccu RST_APB1_CODEC>;
dmas = <&dma 15>, <&dma 15>;
dma-names = "rx", "tx";
status = "disabled";
};
timer@01c60000 {
compatible = "allwinner,sun6i-a31-hstimer",
"allwinner,sun7i-a20-hstimer";
@ -799,6 +869,115 @@ gic: interrupt-controller@01c81000 {
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
fe0: display-frontend@01e00000 {
compatible = "allwinner,sun6i-a31-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
<&ccu CLK_DRAM_FE0>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_AHB1_FE0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
};
};
};
be0: display-backend@01e60000 {
compatible = "allwinner,sun6i-a31-display-backend";
reg = <0x01e60000 0x10000>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_BE0>,
<&ccu CLK_DRAM_BE0>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_AHB1_BE0>;
assigned-clocks = <&ccu CLK_BE0>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint = <&fe0_out_be0>;
};
};
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_drc0: endpoint@0 {
reg = <0>;
remote-endpoint = <&drc0_in_be0>;
};
};
};
};
drc0: drc@01e70000 {
compatible = "allwinner,sun6i-a31-drc";
reg = <0x01e70000 0x10000>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB1_DRC0>, <&ccu CLK_IEP_DRC0>,
<&ccu CLK_DRAM_DRC0>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_AHB1_DRC0>;
assigned-clocks = <&ccu CLK_IEP_DRC0>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
drc0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
drc0_in_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_out_drc0>;
};
};
drc0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
drc0_out_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_in_drc0>;
};
};
};
};
rtc: rtc@01f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
@ -886,7 +1065,8 @@ r_pio: pinctrl@01f02c00 {
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb0_gates 0>;
clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
resets = <&apb0_rst 0>;
gpio-controller;
interrupt-controller;

8
arch/arm/boot/dts/sun6i-a31s-sina31s.dts
View File

@ -65,6 +65,14 @@ status {
};
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"MIC1", "Mic",
"Mic", "MBIAS";
status = "okay";
};
&ehci0 {
/* USB 2.0 4 port hub IC */
status = "okay";

8
arch/arm/boot/dts/sun6i-a31s.dtsi
View File

@ -48,6 +48,14 @@
#include "sun6i-a31.dtsi"
&de {
compatible = "allwinner,sun6i-a31s-display-engine";
};
&pio {
compatible = "allwinner,sun6i-a31s-pinctrl";
};
&tcon0 {
compatible = "allwinner,sun6i-a31s-tcon";
};

62
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
View File

@ -105,6 +105,10 @@ &codec {
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&ehci0 {
status = "okay";
};
@ -132,16 +136,14 @@ &i2c0 {
status = "okay";
axp209: pmic@34 {
compatible = "x-powers,axp209";
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
};
};
#include "axp209.dtsi"
&ir0 {
pinctrl-names = "default";
pinctrl-0 = <&ir0_rx_pins_a>;
@ -167,7 +169,7 @@ &mmc3 {
mmc-pwrseq = <&mmc3_pwrseq>;
bus-width = <4>;
non-removable;
enable-sdio-wakeup;
wakeup-source;
status = "okay";
brcmf: bcrmf@1 {
@ -192,6 +194,10 @@ &ohci1 {
status = "okay";
};
&otg_sram {
status = "okay";
};
&pio {
gmac_power_pin_bpi_m1p: gmac_power_pin@0 {
allwinner,pins = "PH23";
@ -222,8 +228,54 @@ mmc3_pwrseq_pin_bpi_m1p: mmc3_pwrseq_pin@0 {
};
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-int-dll";
};
&reg_ldo1 {
regulator-name = "vdd-rtc";
};
&reg_ldo2 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
&reg_usb0_vbus {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usb_power_supply {
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
usb0_vbus_power-supply = <&usb_power_supply>;
usb0_vbus-supply = <&reg_usb0_vbus>;
/* VBUS on usb host ports are tied to DC5V and therefore always on */
status = "okay";
};

4
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
View File

@ -88,6 +88,10 @@ &ehci1 {
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&codec {
status = "okay";
};

3
arch/arm/boot/dts/sun7i-a20.dtsi
View File

@ -1085,7 +1085,8 @@ pio: pinctrl@01c20800 {
compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb0_gates 5>;
clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;

10
arch/arm/boot/dts/sun8i-a23-a33.dtsi
View File

@ -266,7 +266,8 @@ pio: pinctrl@01c20800 {
/* compatible gets set in SoC specific dtsi file */
reg = <0x01c20800 0x400>;
/* interrupts get set in SoC specific dtsi file */
clocks = <&ccu CLK_BUS_PIO>;
clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
@ -282,11 +283,15 @@ uart0_pins_a: uart0@0 {
uart1_pins_a: uart1@0 {
allwinner,pins = "PG6", "PG7";
allwinner,function = "uart1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins_cts_rts_a: uart1-cts-rts@0 {
allwinner,pins = "PG8", "PG9";
allwinner,function = "uart1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0@0 {
@ -571,7 +576,8 @@ r_pio: pinctrl@01f02c00 {
compatible = "allwinner,sun8i-a23-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb0_gates 0>;
clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
resets = <&apb0_rst 0>;
gpio-controller;
interrupt-controller;

7
arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
View File

@ -98,13 +98,6 @@ wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 {
};
};
&reg_ldo_io1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-touchscreen";
status = "okay";
};
&touchscreen {
reg = <0x40>;
compatible = "silead,gsl1680";

5
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
View File

@ -213,6 +213,11 @@ &uart0 {
status = "okay";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
status = "okay";
usb1_vbus-supply = <&reg_vcc5v0>; /* USB1 VBUS is always on */

64
arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts Normal file
View File

@ -0,0 +1,64 @@
/*
* Copyright (C) 2016 Milo Kim <woogyom.kim@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "sun8i-h3-nanopi.dtsi"
/ {
model = "FriendlyArm NanoPi M1";
compatible = "friendlyarm,nanopi-m1", "allwinner,sun8i-h3";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};

79
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
View File

@ -40,86 +40,9 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include "sun8i-h3-nanopi.dtsi"
/ {
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
pwr {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
default-state = "on";
};
status {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
};
};
};
&ehci3 {
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
cd-inverted;
status = "okay";
};
&ohci3 {
status = "okay";
};
&pio {
leds_opc: led-pins {
allwinner,pins = "PA10";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&r_pio {
leds_r_opc: led-pins {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usbphy {
/* USB VBUS is always on */
status = "okay";
};

144
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi Normal file
View File

@ -0,0 +1,144 @@
/*
* Copyright (C) 2016 James Pettigrew <james@innovum.com.au>
* Copyright (C) 2016 Milo Kim <woogyom.kim@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_npi>, <&leds_r_npi>;
status {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
pwr {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
r_gpio_keys {
compatible = "gpio-keys";
input-name = "k1";
pinctrl-names = "default";
pinctrl-0 = <&sw_r_npi>;
k1@0 {
label = "k1";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
};
};
};
&ehci3 {
status = "okay";
};
&mmc0 {
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
cd-inverted;
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
status = "okay";
vmmc-supply = <&reg_vcc3v3>;
};
&ohci3 {
status = "okay";
};
&pio {
leds_npi: led_pins@0 {
allwinner,pins = "PA10";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&r_pio {
leds_r_npi: led_pins@0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_npi: key_pins@0 {
allwinner,pins = "PL3";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usbphy {
status = "okay";
};

52
arch/arm/boot/dts/sun8i-h3.dtsi
View File

@ -321,7 +321,8 @@ pio: pinctrl@01c20800 {
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_PIO>;
clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
interrupt-controller;
@ -381,6 +382,20 @@ mmc2_8bit_pins: mmc2_8bit {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi0_pins: spi0 {
allwinner,pins = "PC0", "PC1", "PC2", "PC3";
allwinner,function = "spi0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_pins: spi1 {
allwinner,pins = "PA15", "PA16", "PA14", "PA13";
allwinner,function = "spi1";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0@0 {
allwinner,pins = "PA4", "PA5";
allwinner,function = "uart0";
@ -425,6 +440,38 @@ timer@01c20c00 {
clocks = <&osc24M>;
};
spi0: spi@01c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
dmas = <&dma 23>, <&dma 23>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
resets = <&ccu RST_BUS_SPI0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi1: spi@01c69000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c69000 0x1000>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
dmas = <&dma 24>, <&dma 24>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
resets = <&ccu RST_BUS_SPI1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
wdt0: watchdog@01c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
@ -568,7 +615,8 @@ r_pio: pinctrl@01f02c00 {
compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb0_gates 0>;
clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
resets = <&apb0_reset 0>;
gpio-controller;
#gpio-cells = <3>;

7
arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
View File

@ -209,6 +209,13 @@ &reg_drivevbus {
status = "okay";
};
&reg_ldo_io1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-touchscreen";
status = "okay";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};

32
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
View File

@ -76,6 +76,14 @@ red {
gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
};
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
clock-names = "ext_clock";
/* enables internal regulator and de-asserts reset */
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
};
};
&mmc0 {
@ -88,6 +96,21 @@ &mmc0 {
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>, <&wifi_en_pin_cubieboard4>;
vmmc-supply = <&reg_dldo1>;
vqmmc-supply = <&reg_cldo3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
};
&mmc1_pins {
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
@ -128,6 +151,15 @@ &r_ir {
status = "okay";
};
&r_pio {
wifi_en_pin_cubieboard4: wifi_en_pin@0 {
allwinner,pins = "PL2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&r_rsb {
status = "okay";

30
arch/arm/boot/dts/sun9i-a80-optimus.dts
View File

@ -105,6 +105,14 @@ reg_usb3_vbus: usb3-vbus {
enable-active-high;
gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
clock-names = "ext_clock";
/* enables internal regulator and de-asserts reset */
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
};
};
&ehci0 {
@ -130,6 +138,21 @@ &mmc0 {
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>, <&wifi_en_pin_optimus>;
vmmc-supply = <&reg_dldo1>;
vqmmc-supply = <&reg_cldo3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
};
&mmc1_pins {
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
@ -199,6 +222,13 @@ led_r_pins_optimus: led-pins@1 {
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
wifi_en_pin_optimus: wifi_en_pin@0 {
allwinner,pins = "PL2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&r_rsb {

14
arch/arm/boot/dts/sun9i-a80.dtsi
View File

@ -678,7 +678,8 @@ pio: pinctrl@06000800 {
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb0_gates 5>;
clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
@ -700,6 +701,14 @@ mmc0_pins: mmc0 {
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc1_pins: mmc1 {
allwinner,pins = "PG0", "PG1" ,"PG2", "PG3",
"PG4", "PG5";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_8bit_pins: mmc2_8bit {
allwinner,pins = "PC6", "PC7", "PC8", "PC9",
"PC10", "PC11", "PC12",
@ -894,7 +903,8 @@ r_pio: pinctrl@08002c00 {
reg = <0x08002c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apbs_gates 0>;
clocks = <&apbs_gates 0>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
resets = <&apbs_rst 0>;
gpio-controller;
interrupt-controller;