openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

dt-bindings: pinctrl: Add JZ4760 and JZ4760B bindings. 

Add the pinctrl bindings for the JZ4760 Soc and
the JZ4760B Soc from Ingenic.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
Link: https://lore.kernel.org/r/1563076436-5338-2-git-send-email-zhouyanjie@zoho.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Zhou Yanjie 2019-07-14 11:53:51 +08:00 committed by Linus Walleij
parent a0b447c18c
commit d0d6d8364e
1 changed files with 5 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
View File

@ -11,8 +11,8 @@ naming scheme "PxN" where x is a character identifying the GPIO port with
which the pin is associated and N is an integer from 0 to 31 identifying the
pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to
PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a
total of 192 pins.
PD, for a total of 128 pins. The jz4760, the jz4770 and the jz4780 contains 6
GPIO ports, PA to PF, for a total of 192 pins.
Required properties:
@ -21,6 +21,8 @@ Required properties:
- compatible: One of:
- "ingenic,jz4740-pinctrl"
- "ingenic,jz4725b-pinctrl"
- "ingenic,jz4760-pinctrl"
- "ingenic,jz4760b-pinctrl"
- "ingenic,jz4770-pinctrl"
- "ingenic,jz4780-pinctrl"
- reg: Address range of the pinctrl registers.
@ -31,6 +33,7 @@ Required properties for sub-nodes (GPIO chips):
- compatible: Must contain one of:
- "ingenic,jz4740-gpio"
- "ingenic,jz4760-gpio"
- "ingenic,jz4770-gpio"
- "ingenic,jz4780-gpio"
- reg: The GPIO bank number.