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pinctrl: aspeed: Clarify comment about strapping W1C
Writes of 1 to SCU7C clear set bits in SCU70, the hardware strapping register. The information was correct if you squinted while reading, but hopefully switching the order of the registers as listed conveys it better. Cc: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20190628023838.15426-7-andrew@aj.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -213,7 +213,7 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
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if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2)
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continue;
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/* On AST2500, Set bits in SCU7C are cleared from SCU70 */
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/* On AST2500, Set bits in SCU70 are cleared from SCU7C */
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if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1) {
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unsigned int rev_id;
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