mirror of https://gitee.com/openkylin/linux.git
atl1c: fix WoL(magic) issue for l2cb 1.1
l2cb 1.1 hardware has a bug for magic wakeup, the workaround is to add pattern enable. WoL related registers are refined as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -404,34 +404,53 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
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/* Wake-On-Lan control register */
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#define REG_WOL_CTRL 0x14a0
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#define WOL_PATTERN_EN 0x00000001
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#define WOL_PATTERN_PME_EN 0x00000002
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#define WOL_MAGIC_EN 0x00000004
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#define WOL_MAGIC_PME_EN 0x00000008
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#define WOL_LINK_CHG_EN 0x00000010
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#define WOL_LINK_CHG_PME_EN 0x00000020
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#define WOL_PATTERN_ST 0x00000100
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#define WOL_MAGIC_ST 0x00000200
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#define WOL_LINKCHG_ST 0x00000400
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#define WOL_CLK_SWITCH_EN 0x00008000
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#define WOL_PT0_EN 0x00010000
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#define WOL_PT1_EN 0x00020000
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#define WOL_PT2_EN 0x00040000
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#define WOL_PT3_EN 0x00080000
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#define WOL_PT4_EN 0x00100000
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#define WOL_PT5_EN 0x00200000
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#define WOL_PT6_EN 0x00400000
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#define WOL_PT7_MATCH BIT(31)
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#define WOL_PT6_MATCH BIT(30)
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#define WOL_PT5_MATCH BIT(29)
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#define WOL_PT4_MATCH BIT(28)
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#define WOL_PT3_MATCH BIT(27)
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#define WOL_PT2_MATCH BIT(26)
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#define WOL_PT1_MATCH BIT(25)
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#define WOL_PT0_MATCH BIT(24)
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#define WOL_PT7_EN BIT(23)
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#define WOL_PT6_EN BIT(22)
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#define WOL_PT5_EN BIT(21)
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#define WOL_PT4_EN BIT(20)
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#define WOL_PT3_EN BIT(19)
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#define WOL_PT2_EN BIT(18)
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#define WOL_PT1_EN BIT(17)
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#define WOL_PT0_EN BIT(16)
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#define WOL_LNKCHG_ST BIT(10)
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#define WOL_MAGIC_ST BIT(9)
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#define WOL_PATTERN_ST BIT(8)
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#define WOL_OOB_EN BIT(6)
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#define WOL_LINK_CHG_PME_EN BIT(5)
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#define WOL_LINK_CHG_EN BIT(4)
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#define WOL_MAGIC_PME_EN BIT(3)
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#define WOL_MAGIC_EN BIT(2)
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#define WOL_PATTERN_PME_EN BIT(1)
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#define WOL_PATTERN_EN BIT(0)
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/* WOL Length ( 2 DWORD ) */
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#define REG_WOL_PATTERN_LEN 0x14a4
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#define WOL_PT_LEN_MASK 0x7f
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#define WOL_PT0_LEN_SHIFT 0
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#define WOL_PT1_LEN_SHIFT 8
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#define WOL_PT2_LEN_SHIFT 16
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#define WOL_PT3_LEN_SHIFT 24
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#define WOL_PT4_LEN_SHIFT 0
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#define WOL_PT5_LEN_SHIFT 8
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#define WOL_PT6_LEN_SHIFT 16
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#define REG_WOL_PTLEN1 0x14A4
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#define WOL_PTLEN1_3_MASK 0xFFUL
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#define WOL_PTLEN1_3_SHIFT 24
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#define WOL_PTLEN1_2_MASK 0xFFUL
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#define WOL_PTLEN1_2_SHIFT 16
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#define WOL_PTLEN1_1_MASK 0xFFUL
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#define WOL_PTLEN1_1_SHIFT 8
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#define WOL_PTLEN1_0_MASK 0xFFUL
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#define WOL_PTLEN1_0_SHIFT 0
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#define REG_WOL_PTLEN2 0x14A8
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#define WOL_PTLEN2_7_MASK 0xFFUL
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#define WOL_PTLEN2_7_SHIFT 24
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#define WOL_PTLEN2_6_MASK 0xFFUL
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#define WOL_PTLEN2_6_SHIFT 16
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#define WOL_PTLEN2_5_MASK 0xFFUL
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#define WOL_PTLEN2_5_SHIFT 8
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#define WOL_PTLEN2_4_MASK 0xFFUL
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#define WOL_PTLEN2_4_SHIFT 0
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/* Internal SRAM Partition Register */
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#define RFDX_HEAD_ADDR_MASK 0x03FF
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@ -2354,9 +2354,14 @@ static int atl1c_suspend(struct device *dev)
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mac_ctrl_data |= MAC_CTRL_DUPLX;
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/* turn on magic packet wol */
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if (wufc & AT_WUFC_MAG)
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if (wufc & AT_WUFC_MAG) {
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wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
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if (hw->nic_type == athr_l2c_b &&
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hw->revision_id == L2CB_V11) {
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wol_ctrl_data |=
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WOL_PATTERN_EN | WOL_PATTERN_PME_EN;
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}
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}
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if (wufc & AT_WUFC_LNKC) {
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wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
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/* only link up can wake up */
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