mirror of https://gitee.com/openkylin/linux.git
powerpc/include: Add data structures and macros for IMC trace mode
Add the macros needed for IMC (In-Memory Collection Counters) trace-mode and data structure to hold the trace-imc record data. Also, add the new type "OPAL_IMC_COUNTERS_TRACE" in 'opal-api.h', since there is a new switch case added in the opal-calls for IMC. Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com> Reviewed-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -33,6 +33,7 @@
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*/
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#define THREAD_IMC_LDBAR_MASK 0x0003ffffffffe000ULL
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#define THREAD_IMC_ENABLE 0x8000000000000000ULL
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#define TRACE_IMC_ENABLE 0x4000000000000000ULL
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/*
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* For debugfs interface for imc-mode and imc-command
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@ -59,6 +60,34 @@ struct imc_events {
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char *scale;
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};
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/*
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* Trace IMC hardware updates a 64bytes record on
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* Core Performance Monitoring Counter (CPMC)
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* overflow. Here is the layout for the trace imc record
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*
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* DW 0 : Timebase
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* DW 1 : Program Counter
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* DW 2 : PIDR information
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* DW 3 : CPMC1
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* DW 4 : CPMC2
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* DW 5 : CPMC3
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* Dw 6 : CPMC4
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* DW 7 : Timebase
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* .....
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*
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* The following is the data structure to hold trace imc data.
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*/
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struct trace_imc_data {
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u64 tb1;
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u64 ip;
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u64 val;
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u64 cpmc1;
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u64 cpmc2;
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u64 cpmc3;
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u64 cpmc4;
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u64 tb2;
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};
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/* Event attribute array index */
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#define IMC_FORMAT_ATTR 0
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#define IMC_EVENT_ATTR 1
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@ -68,6 +97,13 @@ struct imc_events {
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/* PMU Format attribute macros */
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#define IMC_EVENT_OFFSET_MASK 0xffffffffULL
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/*
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* Macro to mask bits 0:21 of first double word(which is the timebase) to
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* compare with 8th double word (timebase) of trace imc record data.
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*/
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#define IMC_TRACE_RECORD_TB1_MASK 0x3ffffffffffULL
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/*
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* Device tree parser code detects IMC pmu support and
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* registers new IMC pmus. This structure will hold the
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@ -113,6 +149,7 @@ struct imc_pmu_ref {
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enum {
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IMC_TYPE_THREAD = 0x1,
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IMC_TYPE_TRACE = 0x2,
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IMC_TYPE_CORE = 0x4,
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IMC_TYPE_CHIP = 0x10,
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};
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@ -123,6 +160,8 @@ enum {
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#define IMC_DOMAIN_NEST 1
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#define IMC_DOMAIN_CORE 2
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#define IMC_DOMAIN_THREAD 3
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/* For trace-imc the domain is still thread but it operates in trace-mode */
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#define IMC_DOMAIN_TRACE 4
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extern int init_imc_pmu(struct device_node *parent,
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struct imc_pmu *pmu_ptr, int pmu_id);
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@ -1129,6 +1129,7 @@ enum {
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enum {
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OPAL_IMC_COUNTERS_NEST = 1,
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OPAL_IMC_COUNTERS_CORE = 2,
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OPAL_IMC_COUNTERS_TRACE = 3,
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};
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