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ARM: mvebu: add Device Tree description of AHCI interfaces on Armada 38x 

The Marvell Armada 38x processors contain two AHCI compatible
interfaces. This commit adds the Device Tree description of those
interfaces at the SoC level, and also enables them on the Armada 385
DB platform, which allows access to both interfaces through SATA
ports.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397574006-5868-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Thomas Petazzoni 2014-04-15 17:00:04 +02:00 committed by Jason Cooper
parent 6eccc52b44
commit d175b6e494
2 changed files with 24 additions and 0 deletions
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8
arch/arm/boot/dts/armada-385-db.dts
View File

@ -81,6 +81,14 @@ phy1: ethernet-phy@1 {
};
};
sata@a8000 {
status = "okay";
};
sata@e0000 {
status = "okay";
};
flash@d0000 {
status = "okay";
num-cs = <1>;

16
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -365,6 +365,22 @@ mdio {
reg = <0x72004 0x4>;
};
sata@a8000 {
compatible = "marvell,armada-380-ahci";
reg = <0xa8000 0x2000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gateclk 15>;
status = "disabled";
};
sata@e0000 {
compatible = "marvell,armada-380-ahci";
reg = <0xe0000 0x2000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gateclk 30>;
status = "disabled";
};
coredivclk: clock@e4250 {
compatible = "marvell,armada-380-corediv-clock";
reg = <0xe4250 0xc>;