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e1000e: Increase timeout of polling bit RSPCIPHY 

Due to timing changes to the ME firmware in Skylake, this timer
needs to be increased to 300ms.

Signed-off-by: Raanan Avargil <raanan.avargil@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Raanan Avargil 2015-10-15 15:59:49 +03:00 committed by Jeff Kirsher
parent b77ac46bba
commit d17c7868b2
1 changed files with 1 additions and 1 deletions
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2
drivers/net/ethernet/intel/e1000e/ich8lan.c
View File

@ -1984,7 +1984,7 @@ static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw)
int i = 0; int i = 0;
while ((blocked = !(er32(FWSM) & E1000_ICH_FWSM_RSPCIPHY)) && while ((blocked = !(er32(FWSM) & E1000_ICH_FWSM_RSPCIPHY)) &&
(i++ < 10)) (i++ < 30))
usleep_range(10000, 20000); usleep_range(10000, 20000);
return blocked ? E1000_BLK_PHY_RESET : 0; return blocked ? E1000_BLK_PHY_RESET : 0;
} }