openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

Fix wrong dwmmc tuning clocks that may make probing HS cards fail to 

probe and removal of special opps from the phycore boards that may
 run the cpu outside the soc-vendor specs.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlqHdYgQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgWwyCACeLElOaIYbFWectAjRvpYhOBMwk4mk/qA+
 R5MLVhYRBshyb7KcTG4aBuP/FjrY68BllkxR5ANSF0GZCvvxTGgW3/XCouTRtRjd
 YLIMlVKZZPokXEYxN1lqwgJjPx0pHBmDjwWcmU1cJ0gr6z5+/lPwYQW1x43S/yqd
 T01vP7TsltG7U5Ai+prQfnWkjcKbPZUEqxDtWIRHqNeudJbcIoiWCOC4H+kYbygN
 /w9UvaqGdD97Zs//v3jSxxB9CDdX3EScbPPSLhwFjj5Zckm6GJBRSbO2TWnsPv/H
 Ed83duV1eSfIePbRIu2Qk6XrUdFU37GKlNA9SNDE58nphYTW7y2R
 =Rdqg
 -----END PGP SIGNATURE-----

Merge tag 'v4.16-rockchip-dts32fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes

Pull "Rockchip dts32 fixes for 4.16" from Heiko Stübner:

Fix wrong dwmmc tuning clocks that may make probing HS cards fail to
probe and removal of special opps from the phycore boards that may
run the cpu outside the soc-vendor specs.

* tag 'v4.16-rockchip-dts32fixes-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Fix DWMMC clocks
  ARM: dts: rockchip: Remove 1.8 GHz operation point from phycore som
This commit is contained in:
Arnd Bergmann 2018-02-22 17:46:40 +01:00
parent c209d25e46 e78c637127
commit d1b8b9657a
3 changed files with 5 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/rk3036.dtsi
View File

@ -280,7 +280,7 @@ sdio: dwmmc@10218000 {
max-frequency = <37500000>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
resets = <&cru SRST_SDIO>;
@ -298,7 +298,7 @@ emmc: dwmmc@1021c000 {
max-frequency = <37500000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
default-sample-phase = <158>;
disable-wp;
dmas = <&pdma 12>;

6
arch/arm/boot/dts/rk322x.dtsi
View File

@ -621,7 +621,7 @@ sdmmc: dwmmc@30000000 {
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
@ -634,7 +634,7 @@ sdio: dwmmc@30010000 {
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
pinctrl-names = "default";
pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
@ -649,7 +649,7 @@ emmc: dwmmc@30020000 {
max-frequency = <37500000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
bus-width = <8>;
default-sample-phase = <158>;
fifo-depth = <0x100>;

20
arch/arm/boot/dts/rk3288-phycore-som.dtsi
View File

@ -110,26 +110,6 @@ vdd_misc_1v8: vdd-misc-1v8 {
};
};
&cpu0 {
cpu0-supply = <&vdd_cpu>;
operating-points = <
/* KHz uV */
1800000 1400000
1608000 1350000
1512000 1300000
1416000 1200000
1200000 1100000
1008000 1050000
816000 1000000
696000 950000
600000 900000
408000 900000
312000 900000
216000 900000
126000 900000
>;
};
&emmc {
status = "okay";
bus-width = <8>;