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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 

Conflicts:

	drivers/mtd/Kconfig

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This commit is contained in:
David Woodhouse 2007-04-27 19:16:19 +01:00
parent 78ab67da10 a205752d1a
commit d1da4e50e5
1427 changed files with 67406 additions and 63089 deletions
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14
CREDITS
View File

@ -317,6 +317,12 @@ S: 2322 37th Ave SW
S: Seattle, Washington 98126-2010
S: USA
N: Johannes Berg
E: johannes@sipsolutions.net
W: http://johannes.sipsolutions.net/
P: 1024D/9AB78CA5 AD02 0176 4E29 C137 1DF6 08D2 FC44 CF86 9AB7 8CA5
D: powerpc & 802.11 hacker
N: Stephen R. van den Berg (AKA BuGless)
E: berg@pool.informatik.rwth-aachen.de
D: General kernel, gcc, and libc hacker
@ -2286,14 +2292,14 @@ S: D-90453 Nuernberg
S: Germany
N: Arnaldo Carvalho de Melo
E: acme@mandriva.com
E: acme@ghostprotocols.net
E: arnaldo.melo@gmail.com
E: acme@redhat.com
W: http://oops.ghostprotocols.net:81/blog/
P: 1024D/9224DF01 D5DF E3BB E3C8 BCBB F8AD 841A B6AB 4681 9224 DF01
D: IPX, LLC, DCCP, cyc2x, wl3501_cs, net/ hacks
S: Mandriva
S: R. Tocantins, 89 - Cristo Rei
S: 80050-430 - Curitiba - Paraná
S: R. Brasílio Itiberê, 4270/1010 - Água Verde
S: 80240-060 - Curitiba - Paraná
S: Brazil
N: Karsten Merker

40
Documentation/feature-removal-schedule.txt
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@ -211,15 +211,6 @@ Who: Adrian Bunk <bunk@stusta.de>
---------------------------
What: IPv4 only connection tracking/NAT/helpers
When: 2.6.22
Why: The new layer 3 independant connection tracking replaces the old
IPv4 only version. After some stabilization of the new code the
old one will be removed.
Who: Patrick McHardy <kaber@trash.net>
---------------------------
What: ACPI hooks (X86_SPEEDSTEP_CENTRINO_ACPI) in speedstep-centrino driver
When: December 2006
Why: Speedstep-centrino driver with ACPI hooks and acpi-cpufreq driver are
@ -294,18 +285,6 @@ Who: Richard Purdie <rpurdie@rpsys.net>
---------------------------
What: Wireless extensions over netlink (CONFIG_NET_WIRELESS_RTNETLINK)
When: with the merge of wireless-dev, 2.6.22 or later
Why: The option/code is
* not enabled on most kernels
* not required by any userspace tools (except an experimental one,
and even there only for some parts, others use ioctl)
* pointless since wext is no longer evolving and the ioctl
interface needs to be kept
Who: Johannes Berg <johannes@sipsolutions.net>
---------------------------
What: i8xx_tco watchdog driver
When: in 2.6.22
Why: the i8xx_tco watchdog driver has been replaced by the iTCO_wdt
@ -313,3 +292,22 @@ Why: the i8xx_tco watchdog driver has been replaced by the iTCO_wdt
Who: Wim Van Sebroeck <wim@iguana.be>
---------------------------
What: Multipath cached routing support in ipv4
When: in 2.6.23
Why: Code was merged, then submitter immediately disappeared leaving
us with no maintainer and lots of bugs. The code should not have
been merged in the first place, and many aspects of it's
implementation are blocking more critical core networking
development. It's marked EXPERIMENTAL and no distribution
enables it because it cause obscure crashes due to unfixable bugs
(interfaces don't return errors so memory allocation can't be
handled, calling contexts of these interfaces make handling
errors impossible too because they get called after we've
totally commited to creating a route object, for example).
This problem has existed for years and no forward progress
has ever been made, and nobody steps up to try and salvage
this code, so we're going to finally just get rid of it.
Who: David S. Miller <davem@davemloft.net>
---------------------------

220
Documentation/filesystems/afs.txt
View File

@ -1,31 +1,82 @@
====================
kAFS: AFS FILESYSTEM
====================
ABOUT
Contents:
- Overview.
- Usage.
- Mountpoints.
- Proc filesystem.
- The cell database.
- Security.
- Examples.
========
OVERVIEW
========
This filesystem provides a fairly simple secure AFS filesystem driver. It is
under development and does not yet provide the full feature set. The features
it does support include:
(*) Security (currently only AFS kaserver and KerberosIV tickets).
(*) File reading.
(*) Automounting.
It does not yet support the following AFS features:
(*) Write support.
(*) Local caching.
(*) pioctl() system call.
===========
COMPILATION
===========
The filesystem should be enabled by turning on the kernel configuration
options:
CONFIG_AF_RXRPC - The RxRPC protocol transport
CONFIG_RXKAD - The RxRPC Kerberos security handler
CONFIG_AFS - The AFS filesystem
Additionally, the following can be turned on to aid debugging:
CONFIG_AF_RXRPC_DEBUG - Permit AF_RXRPC debugging to be enabled
CONFIG_AFS_DEBUG - Permit AFS debugging to be enabled
They permit the debugging messages to be turned on dynamically by manipulating
the masks in the following files:
/sys/module/af_rxrpc/parameters/debug
/sys/module/afs/parameters/debug
=====
This filesystem provides a fairly simple AFS filesystem driver. It is under
development and only provides very basic facilities. It does not yet support
the following AFS features:
(*) Write support.
(*) Communications security.
(*) Local caching.
(*) pioctl() system call.
(*) Automatic mounting of embedded mountpoints.
USAGE
=====
When inserting the driver modules the root cell must be specified along with a
list of volume location server IP addresses:
insmod rxrpc.o
insmod af_rxrpc.o
insmod rxkad.o
insmod kafs.o rootcell=cambridge.redhat.com:172.16.18.73:172.16.18.91
The first module is a driver for the RxRPC remote operation protocol, and the
second is the actual filesystem driver for the AFS filesystem.
The first module is the AF_RXRPC network protocol driver. This provides the
RxRPC remote operation protocol and may also be accessed from userspace. See:
Documentation/networking/rxrpc.txt
The second module is the kerberos RxRPC security driver, and the third module
is the actual filesystem driver for the AFS filesystem.
Once the module has been loaded, more modules can be added by the following
procedure:
@ -33,7 +84,7 @@ procedure:
echo add grand.central.org 18.7.14.88:128.2.191.224 >/proc/fs/afs/cells
Where the parameters to the "add" command are the name of a cell and a list of
volume location servers within that cell.
volume location servers within that cell, with the latter separated by colons.
Filesystems can be mounted anywhere by commands similar to the following:
@ -42,11 +93,6 @@ Filesystems can be mounted anywhere by commands similar to the following:
mount -t afs "#root.afs." /afs
mount -t afs "#root.cell." /afs/cambridge
NB: When using this on Linux 2.4, the mount command has to be different,
since the filesystem doesn't have access to the device name argument:
mount -t afs none /afs -ovol="#root.afs."
Where the initial character is either a hash or a percent symbol depending on
whether you definitely want a R/W volume (hash) or whether you'd prefer a R/O
volume, but are willing to use a R/W volume instead (percent).
@ -60,55 +106,66 @@ named volume will be looked up in the cell specified during insmod.
Additional cells can be added through /proc (see later section).
===========
MOUNTPOINTS
===========
AFS has a concept of mountpoints. These are specially formatted symbolic links
(of the same form as the "device name" passed to mount). kAFS presents these
to the user as directories that have special properties:
AFS has a concept of mountpoints. In AFS terms, these are specially formatted
symbolic links (of the same form as the "device name" passed to mount). kAFS
presents these to the user as directories that have a follow-link capability
(ie: symbolic link semantics). If anyone attempts to access them, they will
automatically cause the target volume to be mounted (if possible) on that site.
(*) They cannot be listed. Running a program like "ls" on them will incur an
EREMOTE error (Object is remote).
Automatically mounted filesystems will be automatically unmounted approximately
twenty minutes after they were last used. Alternatively they can be unmounted
directly with the umount() system call.
(*) Other objects can't be looked up inside of them. This also incurs an
EREMOTE error.
Manually unmounting an AFS volume will cause any idle submounts upon it to be
culled first. If all are culled, then the requested volume will also be
unmounted, otherwise error EBUSY will be returned.
(*) They can be queried with the readlink() system call, which will return
the name of the mountpoint to which they point. The "readlink" program
will also work.
This can be used by the administrator to attempt to unmount the whole AFS tree
mounted on /afs in one go by doing:
(*) They can be mounted on (which symbolic links can't).
umount /afs
===============
PROC FILESYSTEM
===============
The rxrpc module creates a number of files in various places in the /proc
filesystem:
(*) Firstly, some information files are made available in a directory called
"/proc/net/rxrpc/". These list the extant transport endpoint, peer,
connection and call records.
(*) Secondly, some control files are made available in a directory called
"/proc/sys/rxrpc/". Currently, all these files can be used for is to
turn on various levels of tracing.
The AFS modules creates a "/proc/fs/afs/" directory and populates it:
(*) A "cells" file that lists cells currently known to the afs module.
(*) A "cells" file that lists cells currently known to the afs module and
their usage counts:
[root@andromeda ~]# cat /proc/fs/afs/cells
USE NAME
3 cambridge.redhat.com
(*) A directory per cell that contains files that list volume location
servers, volumes, and active servers known within that cell.
[root@andromeda ~]# cat /proc/fs/afs/cambridge.redhat.com/servers
USE ADDR STATE
4 172.16.18.91 0
[root@andromeda ~]# cat /proc/fs/afs/cambridge.redhat.com/vlservers
ADDRESS
172.16.18.91
[root@andromeda ~]# cat /proc/fs/afs/cambridge.redhat.com/volumes
USE STT VLID[0] VLID[1] VLID[2] NAME
1 Val 20000000 20000001 20000002 root.afs
=================
THE CELL DATABASE
=================
The filesystem maintains an internal database of all the cells it knows and
the IP addresses of the volume location servers for those cells. The cell to
which the computer belongs is added to the database when insmod is performed
by the "rootcell=" argument.
The filesystem maintains an internal database of all the cells it knows and the
IP addresses of the volume location servers for those cells. The cell to which
the system belongs is added to the database when insmod is performed by the
"rootcell=" argument or, if compiled in, using a "kafs.rootcell=" argument on
the kernel command line.
Further cells can be added by commands similar to the following:
@ -118,20 +175,65 @@ Further cells can be added by commands similar to the following:
No other cell database operations are available at this time.
========
SECURITY
========
Secure operations are initiated by acquiring a key using the klog program. A
very primitive klog program is available at:
http://people.redhat.com/~dhowells/rxrpc/klog.c
This should be compiled by:
make klog LDLIBS="-lcrypto -lcrypt -lkrb4 -lkeyutils"
And then run as:
./klog
Assuming it's successful, this adds a key of type RxRPC, named for the service
and cell, eg: "afs@<cellname>". This can be viewed with the keyctl program or
by cat'ing /proc/keys:
[root@andromeda ~]# keyctl show
Session Keyring
-3 --alswrv 0 0 keyring: _ses.3268
2 --alswrv 0 0 \_ keyring: _uid.0
111416553 --als--v 0 0 \_ rxrpc: afs@CAMBRIDGE.REDHAT.COM
Currently the username, realm, password and proposed ticket lifetime are
compiled in to the program.
It is not required to acquire a key before using AFS facilities, but if one is
not acquired then all operations will be governed by the anonymous user parts
of the ACLs.
If a key is acquired, then all AFS operations, including mounts and automounts,
made by a possessor of that key will be secured with that key.
If a file is opened with a particular key and then the file descriptor is
passed to a process that doesn't have that key (perhaps over an AF_UNIX
socket), then the operations on the file will be made with key that was used to
open the file.
========
EXAMPLES
========
Here's what I use to test this. Some of the names and IP addresses are local
to my internal DNS. My "root.afs" partition has a mount point within it for
Here's what I use to test this. Some of the names and IP addresses are local
to my internal DNS. My "root.afs" partition has a mount point within it for
some public volumes volumes.
insmod -S /tmp/rxrpc.o
insmod -S /tmp/kafs.o rootcell=cambridge.redhat.com:172.16.18.73:172.16.18.91
insmod /tmp/rxrpc.o
insmod /tmp/rxkad.o
insmod /tmp/kafs.o rootcell=cambridge.redhat.com:172.16.18.91
mount -t afs \%root.afs. /afs
mount -t afs \%cambridge.redhat.com:root.cell. /afs/cambridge.redhat.com/
echo add grand.central.org 18.7.14.88:128.2.191.224 > /proc/fs/afs/cells
echo add grand.central.org 18.7.14.88:128.2.191.224 > /proc/fs/afs/cells
mount -t afs "#grand.central.org:root.cell." /afs/grand.central.org/
mount -t afs "#grand.central.org:root.archive." /afs/grand.central.org/archive
mount -t afs "#grand.central.org:root.contrib." /afs/grand.central.org/contrib
@ -141,15 +243,7 @@ mount -t afs "#grand.central.org:root.service." /afs/grand.central.org/service
mount -t afs "#grand.central.org:root.software." /afs/grand.central.org/software
mount -t afs "#grand.central.org:root.user." /afs/grand.central.org/user
umount /afs/grand.central.org/user
umount /afs/grand.central.org/software
umount /afs/grand.central.org/service
umount /afs/grand.central.org/project
umount /afs/grand.central.org/doc
umount /afs/grand.central.org/contrib
umount /afs/grand.central.org/archive
umount /afs/grand.central.org
umount /afs/cambridge.redhat.com
umount /afs
rmmod kafs
rmmod rxkad
rmmod rxrpc

9
Documentation/filesystems/proc.txt
View File

@ -1421,6 +1421,15 @@ fewer messages that will be written. Message_burst controls when messages will
be dropped. The default settings limit warning messages to one every five
seconds.
warnings
--------
This controls console messages from the networking stack that can occur because
of problems on the network like duplicate address or bad checksums. Normally,
this should be enabled, but if the problem persists the messages can be
disabled.
netdev_max_backlog
------------------

8
Documentation/infiniband/user_mad.txt
View File

@ -91,6 +91,14 @@ Sending MADs
if (ret != sizeof *mad + mad_length)
perror("write");
Transaction IDs
Users of the umad devices can use the lower 32 bits of the
transaction ID field (that is, the least significant half of the
field in network byte order) in MADs being sent to match
request/response pairs. The upper 32 bits are reserved for use by
the kernel and will be overwritten before a MAD is sent.
Setting IsSM Capability Bit
To set the IsSM capability bit for a port, simply open the

12
Documentation/keys.txt
View File

@ -859,6 +859,18 @@ payload contents" for more information.
void unregister_key_type(struct key_type *type);
Under some circumstances, it may be desirable to desirable to deal with a
bundle of keys. The facility provides access to the keyring type for managing
such a bundle:
struct key_type key_type_keyring;
This can be used with a function such as request_key() to find a specific
keyring in a process's keyrings. A keyring thus found can then be searched
with keyring_search(). Note that it is not possible to use request_key() to
search a specific keyring, so using keyrings in this way is of limited utility.
===================================
NOTES ON ACCESSING PAYLOAD CONTENTS
===================================

35
Documentation/networking/bonding.txt
View File

@ -920,40 +920,9 @@ options, you may wish to use the "max_bonds" module parameter,
documented above.
To create multiple bonding devices with differing options, it
is necessary to load the bonding driver multiple times. Note that
current versions of the sysconfig network initialization scripts
handle this automatically; if your distro uses these scripts, no
special action is needed. See the section Configuring Bonding
Devices, above, if you're not sure about your network initialization
scripts.
is necessary to use bonding parameters exported by sysfs, documented
in the section below.
To load multiple instances of the module, it is necessary to
specify a different name for each instance (the module loading system
requires that every loaded module, even multiple instances of the same
module, have a unique name). This is accomplished by supplying
multiple sets of bonding options in /etc/modprobe.conf, for example:
alias bond0 bonding
options bond0 -o bond0 mode=balance-rr miimon=100
alias bond1 bonding
options bond1 -o bond1 mode=balance-alb miimon=50
will load the bonding module two times. The first instance is
named "bond0" and creates the bond0 device in balance-rr mode with an
miimon of 100. The second instance is named "bond1" and creates the
bond1 device in balance-alb mode with an miimon of 50.
In some circumstances (typically with older distributions),
the above does not work, and the second bonding instance never sees
its options. In that case, the second options line can be substituted
as follows:
install bond1 /sbin/modprobe --ignore-install bonding -o bond1 \
mode=balance-alb miimon=50
This may be repeated any number of times, specifying a new and
unique name in place of bond1 for each subsequent instance.
3.4 Configuring Bonding Manually via Sysfs
------------------------------------------

10
Documentation/networking/dccp.txt
View File

@ -57,6 +57,16 @@ DCCP_SOCKOPT_SEND_CSCOV is for the receiver and has a different meaning: it
coverage value are also acceptable. The higher the number, the more
restrictive this setting (see [RFC 4340, sec. 9.2.1]).
The following two options apply to CCID 3 exclusively and are getsockopt()-only.
In either case, a TFRC info struct (defined in <linux/tfrc.h>) is returned.
DCCP_SOCKOPT_CCID_RX_INFO
Returns a `struct tfrc_rx_info' in optval; the buffer for optval and
optlen must be set to at least sizeof(struct tfrc_rx_info).
DCCP_SOCKOPT_CCID_TX_INFO
Returns a `struct tfrc_tx_info' in optval; the buffer for optval and
optlen must be set to at least sizeof(struct tfrc_tx_info).
Sysctl variables
================
Several DCCP default parameters can be managed by the following sysctls

31
Documentation/networking/ip-sysctl.txt
View File

@ -179,11 +179,31 @@ tcp_fin_timeout - INTEGER
because they eat maximum 1.5K of memory, but they tend
to live longer. Cf. tcp_max_orphans.
tcp_frto - BOOLEAN
tcp_frto - INTEGER
Enables F-RTO, an enhanced recovery algorithm for TCP retransmission
timeouts. It is particularly beneficial in wireless environments
where packet loss is typically due to random radio interference
rather than intermediate router congestion.
rather than intermediate router congestion. If set to 1, basic
version is enabled. 2 enables SACK enhanced F-RTO, which is
EXPERIMENTAL. The basic version can be used also when SACK is
enabled for a flow through tcp_sack sysctl.
tcp_frto_response - INTEGER
When F-RTO has detected that a TCP retransmission timeout was
spurious (i.e, the timeout would have been avoided had TCP set a
longer retransmission timeout), TCP has several options what to do
next. Possible values are:
0 Rate halving based; a smooth and conservative response,
results in halved cwnd and ssthresh after one RTT
1 Very conservative response; not recommended because even
though being valid, it interacts poorly with the rest of
Linux TCP, halves cwnd and ssthresh immediately
2 Aggressive response; undoes congestion control measures
that are now known to be unnecessary (ignoring the
possibility of a lost retransmission that would require
TCP to be more cautious), cwnd and ssthresh are restored
to the values prior timeout
Default: 0 (rate halving based)
tcp_keepalive_time - INTEGER
How often TCP sends out keepalive messages when keepalive is enabled.
@ -995,7 +1015,12 @@ bridge-nf-call-ip6tables - BOOLEAN
Default: 1
bridge-nf-filter-vlan-tagged - BOOLEAN
1 : pass bridged vlan-tagged ARP/IP traffic to arptables/iptables.
1 : pass bridged vlan-tagged ARP/IP/IPv6 traffic to {arp,ip,ip6}tables.
0 : disable this.
Default: 1
bridge-nf-filter-pppoe-tagged - BOOLEAN
1 : pass bridged pppoe-tagged IP/IPv6 traffic to {ip,ip6}tables.
0 : disable this.
Default: 1

859
Documentation/networking/rxrpc.txt Normal file
View File

@ -0,0 +1,859 @@
======================
RxRPC NETWORK PROTOCOL
======================
The RxRPC protocol driver provides a reliable two-phase transport on top of UDP
that can be used to perform RxRPC remote operations. This is done over sockets
of AF_RXRPC family, using sendmsg() and recvmsg() with control data to send and
receive data, aborts and errors.
Contents of this document:
(*) Overview.
(*) RxRPC protocol summary.
(*) AF_RXRPC driver model.
(*) Control messages.
(*) Socket options.
(*) Security.
(*) Example client usage.
(*) Example server usage.
(*) AF_RXRPC kernel interface.
========
OVERVIEW
========
RxRPC is a two-layer protocol. There is a session layer which provides
reliable virtual connections using UDP over IPv4 (or IPv6) as the transport
layer, but implements a real network protocol; and there's the presentation
layer which renders structured data to binary blobs and back again using XDR
(as does SunRPC):
+-------------+
| Application |
+-------------+
| XDR | Presentation
+-------------+
| RxRPC | Session
+-------------+
| UDP | Transport
+-------------+
AF_RXRPC provides:
(1) Part of an RxRPC facility for both kernel and userspace applications by
making the session part of it a Linux network protocol (AF_RXRPC).
(2) A two-phase protocol. The client transmits a blob (the request) and then
receives a blob (the reply), and the server receives the request and then
transmits the reply.
(3) Retention of the reusable bits of the transport system set up for one call
to speed up subsequent calls.
(4) A secure protocol, using the Linux kernel's key retention facility to
manage security on the client end. The server end must of necessity be
more active in security negotiations.
AF_RXRPC does not provide XDR marshalling/presentation facilities. That is
left to the application. AF_RXRPC only deals in blobs. Even the operation ID
is just the first four bytes of the request blob, and as such is beyond the
kernel's interest.
Sockets of AF_RXRPC family are:
(1) created as type SOCK_DGRAM;
(2) provided with a protocol of the type of underlying transport they're going
to use - currently only PF_INET is supported.
The Andrew File System (AFS) is an example of an application that uses this and
that has both kernel (filesystem) and userspace (utility) components.
======================
RXRPC PROTOCOL SUMMARY
======================
An overview of the RxRPC protocol:
(*) RxRPC sits on top of another networking protocol (UDP is the only option
currently), and uses this to provide network transport. UDP ports, for
example, provide transport endpoints.
(*) RxRPC supports multiple virtual "connections" from any given transport
endpoint, thus allowing the endpoints to be shared, even to the same
remote endpoint.
(*) Each connection goes to a particular "service". A connection may not go
to multiple services. A service may be considered the RxRPC equivalent of
a port number. AF_RXRPC permits multiple services to share an endpoint.
(*) Client-originating packets are marked, thus a transport endpoint can be
shared between client and server connections (connections have a
direction).
(*) Up to a billion connections may be supported concurrently between one
local transport endpoint and one service on one remote endpoint. An RxRPC
connection is described by seven numbers:
Local address }
Local port } Transport (UDP) address
Remote address }
Remote port }
Direction
Connection ID
Service ID
(*) Each RxRPC operation is a "call". A connection may make up to four
billion calls, but only up to four calls may be in progress on a
connection at any one time.
(*) Calls are two-phase and asymmetric: the client sends its request data,
which the service receives; then the service transmits the reply data
which the client receives.
(*) The data blobs are of indefinite size, the end of a phase is marked with a
flag in the packet. The number of packets of data making up one blob may
not exceed 4 billion, however, as this would cause the sequence number to
wrap.
(*) The first four bytes of the request data are the service operation ID.
(*) Security is negotiated on a per-connection basis. The connection is
initiated by the first data packet on it arriving. If security is
requested, the server then issues a "challenge" and then the client
replies with a "response". If the response is successful, the security is
set for the lifetime of that connection, and all subsequent calls made
upon it use that same security. In the event that the server lets a
connection lapse before the client, the security will be renegotiated if
the client uses the connection again.
(*) Calls use ACK packets to handle reliability. Data packets are also
explicitly sequenced per call.
(*) There are two types of positive acknowledgement: hard-ACKs and soft-ACKs.
A hard-ACK indicates to the far side that all the data received to a point
has been received and processed; a soft-ACK indicates that the data has
been received but may yet be discarded and re-requested. The sender may
not discard any transmittable packets until they've been hard-ACK'd.
(*) Reception of a reply data packet implicitly hard-ACK's all the data
packets that make up the request.
(*) An call is complete when the request has been sent, the reply has been
received and the final hard-ACK on the last packet of the reply has
reached the server.
(*) An call may be aborted by either end at any time up to its completion.
=====================
AF_RXRPC DRIVER MODEL
=====================
About the AF_RXRPC driver:
(*) The AF_RXRPC protocol transparently uses internal sockets of the transport
protocol to represent transport endpoints.
(*) AF_RXRPC sockets map onto RxRPC connection bundles. Actual RxRPC
connections are handled transparently. One client socket may be used to
make multiple simultaneous calls to the same service. One server socket
may handle calls from many clients.
(*) Additional parallel client connections will be initiated to support extra
concurrent calls, up to a tunable limit.
(*) Each connection is retained for a certain amount of time [tunable] after
the last call currently using it has completed in case a new call is made
that could reuse it.
(*) Each internal UDP socket is retained [tunable] for a certain amount of
time [tunable] after the last connection using it discarded, in case a new
connection is made that could use it.
(*) A client-side connection is only shared between calls if they have have
the same key struct describing their security (and assuming the calls
would otherwise share the connection). Non-secured calls would also be
able to share connections with each other.
(*) A server-side connection is shared if the client says it is.
(*) ACK'ing is handled by the protocol driver automatically, including ping
replying.
(*) SO_KEEPALIVE automatically pings the other side to keep the connection
alive [TODO].
(*) If an ICMP error is received, all calls affected by that error will be
aborted with an appropriate network error passed through recvmsg().
Interaction with the user of the RxRPC socket:
(*) A socket is made into a server socket by binding an address with a
non-zero service ID.
(*) In the client, sending a request is achieved with one or more sendmsgs,
followed by the reply being received with one or more recvmsgs.
(*) The first sendmsg for a request to be sent from a client contains a tag to
be used in all other sendmsgs or recvmsgs associated with that call. The
tag is carried in the control data.
(*) connect() is used to supply a default destination address for a client
socket. This may be overridden by supplying an alternate address to the
first sendmsg() of a call (struct msghdr::msg_name).
(*) If connect() is called on an unbound client, a random local port will
bound before the operation takes place.
(*) A server socket may also be used to make client calls. To do this, the
first sendmsg() of the call must specify the target address. The server's
transport endpoint is used to send the packets.
(*) Once the application has received the last message associated with a call,
the tag is guaranteed not to be seen again, and so it can be used to pin
client resources. A new call can then be initiated with the same tag
without fear of interference.
(*) In the server, a request is received with one or more recvmsgs, then the
the reply is transmitted with one or more sendmsgs, and then the final ACK
is received with a last recvmsg.
(*) When sending data for a call, sendmsg is given MSG_MORE if there's more
data to come on that call.
(*) When receiving data for a call, recvmsg flags MSG_MORE if there's more
data to come for that call.
(*) When receiving data or messages for a call, MSG_EOR is flagged by recvmsg
to indicate the terminal message for that call.
(*) A call may be aborted by adding an abort control message to the control
data. Issuing an abort terminates the kernel's use of that call's tag.
Any messages waiting in the receive queue for that call will be discarded.
(*) Aborts, busy notifications and challenge packets are delivered by recvmsg,
and control data messages will be set to indicate the context. Receiving
an abort or a busy message terminates the kernel's use of that call's tag.
(*) The control data part of the msghdr struct is used for a number of things:
(*) The tag of the intended or affected call.
(*) Sending or receiving errors, aborts and busy notifications.
(*) Notifications of incoming calls.
(*) Sending debug requests and receiving debug replies [TODO].
(*) When the kernel has received and set up an incoming call, it sends a
message to server application to let it know there's a new call awaiting
its acceptance [recvmsg reports a special control message]. The server
application then uses sendmsg to assign a tag to the new call. Once that
is done, the first part of the request data will be delivered by recvmsg.
(*) The server application has to provide the server socket with a keyring of
secret keys corresponding to the security types it permits. When a secure
connection is being set up, the kernel looks up the appropriate secret key
in the keyring and then sends a challenge packet to the client and
receives a response packet. The kernel then checks the authorisation of
the packet and either aborts the connection or sets up the security.
(*) The name of the key a client will use to secure its communications is
nominated by a socket option.
Notes on recvmsg:
(*) If there's a sequence of data messages belonging to a particular call on
the receive queue, then recvmsg will keep working through them until:
(a) it meets the end of that call's received data,
(b) it meets a non-data message,
(c) it meets a message belonging to a different call, or
(d) it fills the user buffer.
If recvmsg is called in blocking mode, it will keep sleeping, awaiting the
reception of further data, until one of the above four conditions is met.
(2) MSG_PEEK operates similarly, but will return immediately if it has put any
data in the buffer rather than sleeping until it can fill the buffer.
(3) If a data message is only partially consumed in filling a user buffer,
then the remainder of that message will be left on the front of the queue
for the next taker. MSG_TRUNC will never be flagged.
(4) If there is more data to be had on a call (it hasn't copied the last byte
of the last data message in that phase yet), then MSG_MORE will be
flagged.
================
CONTROL MESSAGES
================
AF_RXRPC makes use of control messages in sendmsg() and recvmsg() to multiplex
calls, to invoke certain actions and to report certain conditions. These are:
MESSAGE ID SRT DATA MEANING
======================= === =========== ===============================
RXRPC_USER_CALL_ID sr- User ID App's call specifier
RXRPC_ABORT srt Abort code Abort code to issue/received
RXRPC_ACK -rt n/a Final ACK received
RXRPC_NET_ERROR -rt error num Network error on call
RXRPC_BUSY -rt n/a Call rejected (server busy)
RXRPC_LOCAL_ERROR -rt error num Local error encountered
RXRPC_NEW_CALL -r- n/a New call received
RXRPC_ACCEPT s-- n/a Accept new call
(SRT = usable in Sendmsg / delivered by Recvmsg / Terminal message)
(*) RXRPC_USER_CALL_ID
This is used to indicate the application's call ID. It's an unsigned long
that the app specifies in the client by attaching it to the first data
message or in the server by passing it in association with an RXRPC_ACCEPT
message. recvmsg() passes it in conjunction with all messages except
those of the RXRPC_NEW_CALL message.
(*) RXRPC_ABORT
This is can be used by an application to abort a call by passing it to
sendmsg, or it can be delivered by recvmsg to indicate a remote abort was
received. Either way, it must be associated with an RXRPC_USER_CALL_ID to
specify the call affected. If an abort is being sent, then error EBADSLT
will be returned if there is no call with that user ID.
(*) RXRPC_ACK
This is delivered to a server application to indicate that the final ACK
of a call was received from the client. It will be associated with an
RXRPC_USER_CALL_ID to indicate the call that's now complete.
(*) RXRPC_NET_ERROR
This is delivered to an application to indicate that an ICMP error message
was encountered in the process of trying to talk to the peer. An
errno-class integer value will be included in the control message data
indicating the problem, and an RXRPC_USER_CALL_ID will indicate the call
affected.
(*) RXRPC_BUSY
This is delivered to a client application to indicate that a call was
rejected by the server due to the server being busy. It will be
associated with an RXRPC_USER_CALL_ID to indicate the rejected call.
(*) RXRPC_LOCAL_ERROR
This is delivered to an application to indicate that a local error was
encountered and that a call has been aborted because of it. An
errno-class integer value will be included in the control message data
indicating the problem, and an RXRPC_USER_CALL_ID will indicate the call
affected.
(*) RXRPC_NEW_CALL
This is delivered to indicate to a server application that a new call has
arrived and is awaiting acceptance. No user ID is associated with this,
as a user ID must subsequently be assigned by doing an RXRPC_ACCEPT.
(*) RXRPC_ACCEPT
This is used by a server application to attempt to accept a call and
assign it a user ID. It should be associated with an RXRPC_USER_CALL_ID
to indicate the user ID to be assigned. If there is no call to be
accepted (it may have timed out, been aborted, etc.), then sendmsg will
return error ENODATA. If the user ID is already in use by another call,
then error EBADSLT will be returned.
==============
SOCKET OPTIONS
==============
AF_RXRPC sockets support a few socket options at the SOL_RXRPC level:
(*) RXRPC_SECURITY_KEY
This is used to specify the description of the key to be used. The key is
extracted from the calling process's keyrings with request_key() and
should be of "rxrpc" type.
The optval pointer points to the description string, and optlen indicates
how long the string is, without the NUL terminator.
(*) RXRPC_SECURITY_KEYRING
Similar to above but specifies a keyring of server secret keys to use (key
type "keyring"). See the "Security" section.
(*) RXRPC_EXCLUSIVE_CONNECTION
This is used to request that new connections should be used for each call
made subsequently on this socket. optval should be NULL and optlen 0.
(*) RXRPC_MIN_SECURITY_LEVEL
This is used to specify the minimum security level required for calls on
this socket. optval must point to an int containing one of the following
values:
(a) RXRPC_SECURITY_PLAIN
Encrypted checksum only.
(b) RXRPC_SECURITY_AUTH
Encrypted checksum plus packet padded and first eight bytes of packet
encrypted - which includes the actual packet length.
(c) RXRPC_SECURITY_ENCRYPTED
Encrypted checksum plus entire packet padded and encrypted, including
actual packet length.
========
SECURITY
========
Currently, only the kerberos 4 equivalent protocol has been implemented
(security index 2 - rxkad). This requires the rxkad module to be loaded and,
on the client, tickets of the appropriate type to be obtained from the AFS
kaserver or the kerberos server and installed as "rxrpc" type keys. This is
normally done using the klog program. An example simple klog program can be
found at:
http://people.redhat.com/~dhowells/rxrpc/klog.c
The payload provided to add_key() on the client should be of the following
form:
struct rxrpc_key_sec2_v1 {
uint16_t security_index; /* 2 */
uint16_t ticket_length; /* length of ticket[] */
uint32_t expiry; /* time at which expires */
uint8_t kvno; /* key version number */
uint8_t __pad[3];
uint8_t session_key[8]; /* DES session key */
uint8_t ticket[0]; /* the encrypted ticket */
};
Where the ticket blob is just appended to the above structure.
For the server, keys of type "rxrpc_s" must be made available to the server.
They have a description of "<serviceID>:<securityIndex>" (eg: "52:2" for an
rxkad key for the AFS VL service). When such a key is created, it should be
given the server's secret key as the instantiation data (see the example
below).
add_key("rxrpc_s", "52:2", secret_key, 8, keyring);
A keyring is passed to the server socket by naming it in a sockopt. The server
socket then looks the server secret keys up in this keyring when secure
incoming connections are made. This can be seen in an example program that can
be found at:
http://people.redhat.com/~dhowells/rxrpc/listen.c
====================
EXAMPLE CLIENT USAGE
====================
A client would issue an operation by:
(1) An RxRPC socket is set up by:
client = socket(AF_RXRPC, SOCK_DGRAM, PF_INET);
Where the third parameter indicates the protocol family of the transport
socket used - usually IPv4 but it can also be IPv6 [TODO].
(2) A local address can optionally be bound:
struct sockaddr_rxrpc srx = {
.srx_family = AF_RXRPC,
.srx_service = 0, /* we're a client */
.transport_type = SOCK_DGRAM, /* type of transport socket */
.transport.sin_family = AF_INET,
.transport.sin_port = htons(7000), /* AFS callback */
.transport.sin_address = 0, /* all local interfaces */
};
bind(client, &srx, sizeof(srx));
This specifies the local UDP port to be used. If not given, a random
non-privileged port will be used. A UDP port may be shared between
several unrelated RxRPC sockets. Security is handled on a basis of
per-RxRPC virtual connection.
(3) The security is set:
const char *key = "AFS:cambridge.redhat.com";
setsockopt(client, SOL_RXRPC, RXRPC_SECURITY_KEY, key, strlen(key));
This issues a request_key() to get the key representing the security
context. The minimum security level can be set:
unsigned int sec = RXRPC_SECURITY_ENCRYPTED;
setsockopt(client, SOL_RXRPC, RXRPC_MIN_SECURITY_LEVEL,
&sec, sizeof(sec));
(4) The server to be contacted can then be specified (alternatively this can
be done through sendmsg):
struct sockaddr_rxrpc srx = {
.srx_family = AF_RXRPC,
.srx_service = VL_SERVICE_ID,
.transport_type = SOCK_DGRAM, /* type of transport socket */
.transport.sin_family = AF_INET,
.transport.sin_port = htons(7005), /* AFS volume manager */
.transport.sin_address = ...,
};
connect(client, &srx, sizeof(srx));
(5) The request data should then be posted to the server socket using a series
of sendmsg() calls, each with the following control message attached:
RXRPC_USER_CALL_ID - specifies the user ID for this call
MSG_MORE should be set in msghdr::msg_flags on all but the last part of
the request. Multiple requests may be made simultaneously.
If a call is intended to go to a destination other then the default
specified through connect(), then msghdr::msg_name should be set on the
first request message of that call.
(6) The reply data will then be posted to the server socket for recvmsg() to
pick up. MSG_MORE will be flagged by recvmsg() if there's more reply data
for a particular call to be read. MSG_EOR will be set on the terminal
read for a call.
All data will be delivered with the following control message attached:
RXRPC_USER_CALL_ID - specifies the user ID for this call
If an abort or error occurred, this will be returned in the control data
buffer instead, and MSG_EOR will be flagged to indicate the end of that
call.
====================
EXAMPLE SERVER USAGE
====================
A server would be set up to accept operations in the following manner:
(1) An RxRPC socket is created by:
server = socket(AF_RXRPC, SOCK_DGRAM, PF_INET);
Where the third parameter indicates the address type of the transport
socket used - usually IPv4.
(2) Security is set up if desired by giving the socket a keyring with server
secret keys in it:
keyring = add_key("keyring", "AFSkeys", NULL, 0,
KEY_SPEC_PROCESS_KEYRING);
const char secret_key[8] = {
0xa7, 0x83, 0x8a, 0xcb, 0xc7, 0x83, 0xec, 0x94 };
add_key("rxrpc_s", "52:2", secret_key, 8, keyring);
setsockopt(server, SOL_RXRPC, RXRPC_SECURITY_KEYRING, "AFSkeys", 7);
The keyring can be manipulated after it has been given to the socket. This
permits the server to add more keys, replace keys, etc. whilst it is live.
(2) A local address must then be bound:
struct sockaddr_rxrpc srx = {
.srx_family = AF_RXRPC,
.srx_service = VL_SERVICE_ID, /* RxRPC service ID */
.transport_type = SOCK_DGRAM, /* type of transport socket */
.transport.sin_family = AF_INET,
.transport.sin_port = htons(7000), /* AFS callback */
.transport.sin_address = 0, /* all local interfaces */
};
bind(server, &srx, sizeof(srx));
(3) The server is then set to listen out for incoming calls:
listen(server, 100);
(4) The kernel notifies the server of pending incoming connections by sending
it a message for each. This is received with recvmsg() on the server
socket. It has no data, and has a single dataless control message
attached:
RXRPC_NEW_CALL
The address that can be passed back by recvmsg() at this point should be
ignored since the call for which the message was posted may have gone by
the time it is accepted - in which case the first call still on the queue
will be accepted.
(5) The server then accepts the new call by issuing a sendmsg() with two
pieces of control data and no actual data:
RXRPC_ACCEPT - indicate connection acceptance
RXRPC_USER_CALL_ID - specify user ID for this call
(6) The first request data packet will then be posted to the server socket for
recvmsg() to pick up. At that point, the RxRPC address for the call can
be read from the address fields in the msghdr struct.
Subsequent request data will be posted to the server socket for recvmsg()
to collect as it arrives. All but the last piece of the request data will
be delivered with MSG_MORE flagged.
All data will be delivered with the following control message attached:
RXRPC_USER_CALL_ID - specifies the user ID for this call
(8) The reply data should then be posted to the server socket using a series
of sendmsg() calls, each with the following control messages attached:
RXRPC_USER_CALL_ID - specifies the user ID for this call
MSG_MORE should be set in msghdr::msg_flags on all but the last message
for a particular call.
(9) The final ACK from the client will be posted for retrieval by recvmsg()
when it is received. It will take the form of a dataless message with two
control messages attached:
RXRPC_USER_CALL_ID - specifies the user ID for this call
RXRPC_ACK - indicates final ACK (no data)
MSG_EOR will be flagged to indicate that this is the final message for
this call.
(10) Up to the point the final packet of reply data is sent, the call can be
aborted by calling sendmsg() with a dataless message with the following
control messages attached:
RXRPC_USER_CALL_ID - specifies the user ID for this call
RXRPC_ABORT - indicates abort code (4 byte data)
Any packets waiting in the socket's receive queue will be discarded if
this is issued.
Note that all the communications for a particular service take place through
the one server socket, using control messages on sendmsg() and recvmsg() to
determine the call affected.
=========================
AF_RXRPC KERNEL INTERFACE
=========================
The AF_RXRPC module also provides an interface for use by in-kernel utilities
such as the AFS filesystem. This permits such a utility to:
(1) Use different keys directly on individual client calls on one socket
rather than having to open a whole slew of sockets, one for each key it
might want to use.
(2) Avoid having RxRPC call request_key() at the point of issue of a call or
opening of a socket. Instead the utility is responsible for requesting a
key at the appropriate point. AFS, for instance, would do this during VFS
operations such as open() or unlink(). The key is then handed through
when the call is initiated.
(3) Request the use of something other than GFP_KERNEL to allocate memory.
(4) Avoid the overhead of using the recvmsg() call. RxRPC messages can be
intercepted before they get put into the socket Rx queue and the socket
buffers manipulated directly.
To use the RxRPC facility, a kernel utility must still open an AF_RXRPC socket,
bind an addess as appropriate and listen if it's to be a server socket, but
then it passes this to the kernel interface functions.
The kernel interface functions are as follows:
(*) Begin a new client call.
struct rxrpc_call *
rxrpc_kernel_begin_call(struct socket *sock,
struct sockaddr_rxrpc *srx,
struct key *key,
unsigned long user_call_ID,
gfp_t gfp);
This allocates the infrastructure to make a new RxRPC call and assigns
call and connection numbers. The call will be made on the UDP port that
the socket is bound to. The call will go to the destination address of a
connected client socket unless an alternative is supplied (srx is
non-NULL).
If a key is supplied then this will be used to secure the call instead of
the key bound to the socket with the RXRPC_SECURITY_KEY sockopt. Calls
secured in this way will still share connections if at all possible.
The user_call_ID is equivalent to that supplied to sendmsg() in the
control data buffer. It is entirely feasible to use this to point to a
kernel data structure.
If this function is successful, an opaque reference to the RxRPC call is
returned. The caller now holds a reference on this and it must be
properly ended.
(*) End a client call.
void rxrpc_kernel_end_call(struct rxrpc_call *call);
This is used to end a previously begun call. The user_call_ID is expunged
from AF_RXRPC's knowledge and will not be seen again in association with
the specified call.
(*) Send data through a call.
int rxrpc_kernel_send_data(struct rxrpc_call *call, struct msghdr *msg,
size_t len);
This is used to supply either the request part of a client call or the
reply part of a server call. msg.msg_iovlen and msg.msg_iov specify the
data buffers to be used. msg_iov may not be NULL and must point
exclusively to in-kernel virtual addresses. msg.msg_flags may be given
MSG_MORE if there will be subsequent data sends for this call.
The msg must not specify a destination address, control data or any flags
other than MSG_MORE. len is the total amount of data to transmit.
(*) Abort a call.
void rxrpc_kernel_abort_call(struct rxrpc_call *call, u32 abort_code);
This is used to abort a call if it's still in an abortable state. The
abort code specified will be placed in the ABORT message sent.
(*) Intercept received RxRPC messages.
typedef void (*rxrpc_interceptor_t)(struct sock *sk,
unsigned long user_call_ID,
struct sk_buff *skb);
void
rxrpc_kernel_intercept_rx_messages(struct socket *sock,
rxrpc_interceptor_t interceptor);
This installs an interceptor function on the specified AF_RXRPC socket.
All messages that would otherwise wind up in the socket's Rx queue are
then diverted to this function. Note that care must be taken to process
the messages in the right order to maintain DATA message sequentiality.
The interceptor function itself is provided with the address of the socket
and handling the incoming message, the ID assigned by the kernel utility
to the call and the socket buffer containing the message.
The skb->mark field indicates the type of message:
MARK MEANING
=============================== =======================================
RXRPC_SKB_MARK_DATA Data message
RXRPC_SKB_MARK_FINAL_ACK Final ACK received for an incoming call
RXRPC_SKB_MARK_BUSY Client call rejected as server busy
RXRPC_SKB_MARK_REMOTE_ABORT Call aborted by peer
RXRPC_SKB_MARK_NET_ERROR Network error detected
RXRPC_SKB_MARK_LOCAL_ERROR Local error encountered
RXRPC_SKB_MARK_NEW_CALL New incoming call awaiting acceptance
The remote abort message can be probed with rxrpc_kernel_get_abort_code().
The two error messages can be probed with rxrpc_kernel_get_error_number().
A new call can be accepted with rxrpc_kernel_accept_call().
Data messages can have their contents extracted with the usual bunch of
socket buffer manipulation functions. A data message can be determined to
be the last one in a sequence with rxrpc_kernel_is_data_last(). When a
data message has been used up, rxrpc_kernel_data_delivered() should be
called on it..
Non-data messages should be handled to rxrpc_kernel_free_skb() to dispose
of. It is possible to get extra refs on all types of message for later
freeing, but this may pin the state of a call until the message is finally
freed.
(*) Accept an incoming call.
struct rxrpc_call *
rxrpc_kernel_accept_call(struct socket *sock,
unsigned long user_call_ID);
This is used to accept an incoming call and to assign it a call ID. This
function is similar to rxrpc_kernel_begin_call() and calls accepted must
be ended in the same way.
If this function is successful, an opaque reference to the RxRPC call is
returned. The caller now holds a reference on this and it must be
properly ended.
(*) Reject an incoming call.
int rxrpc_kernel_reject_call(struct socket *sock);
This is used to reject the first incoming call on the socket's queue with
a BUSY message. -ENODATA is returned if there were no incoming calls.
Other errors may be returned if the call had been aborted (-ECONNABORTED)
or had timed out (-ETIME).
(*) Record the delivery of a data message and free it.
void rxrpc_kernel_data_delivered(struct sk_buff *skb);
This is used to record a data message as having been delivered and to
update the ACK state for the call. The socket buffer will be freed.
(*) Free a message.
void rxrpc_kernel_free_skb(struct sk_buff *skb);
This is used to free a non-DATA socket buffer intercepted from an AF_RXRPC
socket.
(*) Determine if a data message is the last one on a call.
bool rxrpc_kernel_is_data_last(struct sk_buff *skb);
This is used to determine if a socket buffer holds the last data message
to be received for a call (true will be returned if it does, false
if not).
The data message will be part of the reply on a client call and the
request on an incoming call. In the latter case there will be more
messages, but in the former case there will not.
(*) Get the abort code from an abort message.
u32 rxrpc_kernel_get_abort_code(struct sk_buff *skb);
This is used to extract the abort code from a remote abort message.
(*) Get the error number from a local or network error message.
int rxrpc_kernel_get_error_number(struct sk_buff *skb);
This is used to extract the error number from a message indicating either
a local error occurred or a network error occurred.

1
Documentation/networking/wan-router.txt
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@ -250,7 +250,6 @@ PRODUCT COMPONENTS AND RELATED FILES
sdladrv.h SDLA support module API definitions
sdlasfm.h SDLA firmware module definitions
if_wanpipe.h WANPIPE Socket definitions
if_wanpipe_common.h WANPIPE Socket/Driver common definitions.
sdlapci.h WANPIPE PCI definitions

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@ -1,83 +0,0 @@
crypto-API support for z990 Message Security Assist (MSA) instructions
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
AUTHOR: Thomas Spatzier (tspat@de.ibm.com)
1. Introduction crypto-API
~~~~~~~~~~~~~~~~~~~~~~~~~~
See Documentation/crypto/api-intro.txt for an introduction/description of the
kernel crypto API.
According to api-intro.txt support for z990 crypto instructions has been added
in the algorithm api layer of the crypto API. Several files containing z990
optimized implementations of crypto algorithms are placed in the
arch/s390/crypto directory.
2. Probing for availability of MSA
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
It should be possible to use Kernels with the z990 crypto implementations both
on machines with MSA available and on those without MSA (pre z990 or z990
without MSA). Therefore a simple probing mechanism has been implemented:
In the init function of each crypto module the availability of MSA and of the
respective crypto algorithm in particular will be tested. If the algorithm is
available the module will load and register its algorithm with the crypto API.
If the respective crypto algorithm is not available, the init function will
return -ENOSYS. In that case a fallback to the standard software implementation
of the crypto algorithm must be taken ( -> the standard crypto modules are
also built when compiling the kernel).
3. Ensuring z990 crypto module preference
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
If z990 crypto instructions are available the optimized modules should be
preferred instead of standard modules.
3.1. compiled-in modules
~~~~~~~~~~~~~~~~~~~~~~~~
For compiled-in modules it has to be ensured that the z990 modules are linked
before the standard crypto modules. Then, on system startup the init functions
of z990 crypto modules will be called first and query for availability of z990
crypto instructions. If instruction is available, the z990 module will register
its crypto algorithm implementation -> the load of the standard module will fail
since the algorithm is already registered.
If z990 crypto instruction is not available the load of the z990 module will
fail -> the standard module will load and register its algorithm.
3.2. dynamic modules
~~~~~~~~~~~~~~~~~~~~
A system administrator has to take care of giving preference to z990 crypto
modules. If MSA is available appropriate lines have to be added to
/etc/modprobe.conf.
Example: z990 crypto instruction for SHA1 algorithm is available
add the following line to /etc/modprobe.conf (assuming the
z990 crypto modules for SHA1 is called sha1_z990):
alias sha1 sha1_z990
-> when the sha1 algorithm is requested through the crypto API
(which has a module autoloader) the z990 module will be loaded.
TBD: a userspace module probing mechanism
something like 'probe sha1 sha1_z990 sha1' in modprobe.conf
-> try module sha1_z990, if it fails to load standard module sha1
the 'probe' statement is currently not supported in modprobe.conf
4. Currently implemented z990 crypto algorithms
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The following crypto algorithms with z990 MSA support are currently implemented.
The name of each algorithm under which it is registered in crypto API and the
name of the respective module is given in square brackets.
- SHA1 Digest Algorithm [sha1 -> sha1_z990]
- DES Encrypt/Decrypt Algorithm (64bit key) [des -> des_z990]
- Triple DES Encrypt/Decrypt Algorithm (128bit key) [des3_ede128 -> des_z990]
- Triple DES Encrypt/Decrypt Algorithm (192bit key) [des3_ede -> des_z990]
In order to load, for example, the sha1_z990 module when the sha1 algorithm is
requested (see 3.2.) add 'alias sha1 sha1_z990' to /etc/modprobe.conf.

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s390 SCSI dump tool (zfcpdump)
System z machines (z900 or higher) provide hardware support for creating system
dumps on SCSI disks. The dump process is initiated by booting a dump tool, which
has to create a dump of the current (probably crashed) Linux image. In order to
not overwrite memory of the crashed Linux with data of the dump tool, the
hardware saves some memory plus the register sets of the boot cpu before the
dump tool is loaded. There exists an SCLP hardware interface to obtain the saved
memory afterwards. Currently 32 MB are saved.
This zfcpdump implementation consists of a Linux dump kernel together with
a userspace dump tool, which are loaded together into the saved memory region
below 32 MB. zfcpdump is installed on a SCSI disk using zipl (as contained in
the s390-tools package) to make the device bootable. The operator of a Linux
system can then trigger a SCSI dump by booting the SCSI disk, where zfcpdump
resides on.
The kernel part of zfcpdump is implemented as a debugfs file under "zcore/mem",
which exports memory and registers of the crashed Linux in an s390
standalone dump format. It can be used in the same way as e.g. /dev/mem. The
dump format defines a 4K header followed by plain uncompressed memory. The
register sets are stored in the prefix pages of the respective cpus. To build a
dump enabled kernel with the zcore driver, the kernel config option
CONFIG_ZFCPDUMP has to be set. When reading from "zcore/mem", the part of
memory, which has been saved by hardware is read by the driver via the SCLP
hardware interface. The second part is just copied from the non overwritten real
memory.
The userspace application of zfcpdump can reside e.g. in an intitramfs or an
initrd. It reads from zcore/mem and writes the system dump to a file on a
SCSI disk.
To build a zfcpdump kernel use the following settings in your kernel
configuration:
* CONFIG_ZFCPDUMP=y
* Enable ZFCP driver
* Enable SCSI driver
* Enable ext2 and ext3 filesystems
* Disable as many features as possible to keep the kernel small.
E.g. network support is not needed at all.
To use the zfcpdump userspace application in an initramfs you have to do the
following:
* Copy the zfcpdump executable somewhere into your Linux tree.
E.g. to "arch/s390/boot/zfcpdump. If you do not want to include
shared libraries, compile the tool with the "-static" gcc option.
* If you want to include e2fsck, add it to your source tree, too. The zfcpdump
application attempts to start /sbin/e2fsck from the ramdisk.
* Use an initramfs config file like the following:
dir /dev 755 0 0
nod /dev/console 644 0 0 c 5 1
nod /dev/null 644 0 0 c 1 3
nod /dev/sda1 644 0 0 b 8 1
nod /dev/sda2 644 0 0 b 8 2
nod /dev/sda3 644 0 0 b 8 3
nod /dev/sda4 644 0 0 b 8 4
nod /dev/sda5 644 0 0 b 8 5
nod /dev/sda6 644 0 0 b 8 6
nod /dev/sda7 644 0 0 b 8 7
nod /dev/sda8 644 0 0 b 8 8
nod /dev/sda9 644 0 0 b 8 9
nod /dev/sda10 644 0 0 b 8 10
nod /dev/sda11 644 0 0 b 8 11
nod /dev/sda12 644 0 0 b 8 12
nod /dev/sda13 644 0 0 b 8 13
nod /dev/sda14 644 0 0 b 8 14
nod /dev/sda15 644 0 0 b 8 15
file /init arch/s390/boot/zfcpdump 755 0 0
file /sbin/e2fsck arch/s390/boot/e2fsck 755 0 0
dir /proc 755 0 0
dir /sys 755 0 0
dir /mnt 755 0 0
dir /sbin 755 0 0
* Issue "make image" to build the zfcpdump image with initramfs.
In a Linux distribution the zfcpdump enabled kernel image must be copied to
/usr/share/zfcpdump/zfcpdump.image, where the s390 zipl tool is looking for the
dump kernel when preparing a SCSI dump disk.
If you use a ramdisk copy it to "/usr/share/zfcpdump/zfcpdump.rd".
For more information on how to use zfcpdump refer to the s390 'Using the Dump
Tools book', which is available from
http://www.ibm.com/developerworks/linux/linux390.

50
MAINTAINERS
View File

@ -384,7 +384,7 @@ S: Supported
APPLETALK NETWORK LAYER
P: Arnaldo Carvalho de Melo
M: acme@conectiva.com.br
M: acme@ghostprotocols.net
S: Maintained
ARC FRAMEBUFFER DRIVER
@ -656,6 +656,7 @@ S: Supported
ATMEL WIRELESS DRIVER
P: Simon Kelley
M: simon@thekelleys.org.uk
L: linux-wireless@vger.kernel.org
W: http://www.thekelleys.org.uk/atmel
W: http://atmelwlandriver.sourceforge.net/
S: Maintained
@ -711,6 +712,7 @@ P: Larry Finger
M: Larry.Finger@lwfinger.net
P: Stefano Brivio
M: st3@riseup.net
L: linux-wireless@vger.kernel.org
W: http://bcm43xx.berlios.de/
S: Maintained
@ -892,6 +894,12 @@ M: maxextreme@gmail.com
L: linux-kernel@vger.kernel.org
S: Maintained
CFG80211 and NL80211
P: Johannes Berg
M: johannes@sipsolutions.net
L: linux-wireless@vger.kernel.org
S: Maintained
COMMON INTERNET FILE SYSTEM (CIFS)
P: Steve French
M: sfrench@samba.org
@ -1034,9 +1042,8 @@ S: Maintained
CYCLADES 2X SYNC CARD DRIVER
P: Arnaldo Carvalho de Melo
M: acme@conectiva.com.br
W: http://advogato.org/person/acme
L: cycsyn-devel@bazar.conectiva.com.br
M: acme@ghostprotocols.net
W: http://oops.ghostprotocols.net:81/blog
S: Maintained
CYCLADES ASYNC MUX DRIVER
@ -1077,7 +1084,7 @@ S: Maintained
DCCP PROTOCOL
P: Arnaldo Carvalho de Melo
M: acme@mandriva.com
M: acme@ghostprotocols.net
L: dccp@vger.kernel.org
W: http://linux-net.osdl.org/index.php/DCCP
S: Maintained
@ -1558,6 +1565,7 @@ S: Supported
HOST AP DRIVER
P: Jouni Malinen
M: jkmaline@cc.hut.fi
L: linux-wireless@vger.kernel.org
L: hostap@shmoo.com
W: http://hostap.epitest.fi/
S: Maintained
@ -1830,6 +1838,7 @@ P: Yi Zhu
M: yi.zhu@intel.com
P: James Ketrenos
M: jketreno@linux.intel.com
L: linux-wireless@vger.kernel.org
L: ipw2100-devel@lists.sourceforge.net
L: http://lists.sourceforge.net/mailman/listinfo/ipw2100-devel
W: http://ipw2100.sourceforge.net
@ -1840,6 +1849,7 @@ P: Yi Zhu
M: yi.zhu@intel.com
P: James Ketrenos
M: jketreno@linux.intel.com
L: linux-wireless@vger.kernel.org
L: ipw2100-devel@lists.sourceforge.net
L: http://lists.sourceforge.net/mailman/listinfo/ipw2100-devel
W: http://ipw2200.sourceforge.net
@ -1871,7 +1881,7 @@ S: Supported
IPX NETWORK LAYER
P: Arnaldo Carvalho de Melo
M: acme@conectiva.com.br
M: acme@ghostprotocols.net
L: netdev@vger.kernel.org
S: Maintained
@ -2108,7 +2118,7 @@ S: Supported
LLC (802.2)
P: Arnaldo Carvalho de Melo
M: acme@conectiva.com.br
M: acme@ghostprotocols.net
S: Maintained
LINUX FOR 64BIT POWERPC
@ -2236,6 +2246,14 @@ L: linux-mtd@lists.infradead.org
T: git git://git.infradead.org/mtd-2.6.git
S: Maintained
UNSORTED BLOCK IMAGES (UBI)
P: Artem Bityutskiy
M: dedekind@infradead.org
W: http://www.linux-mtd.infradead.org/
L: linux-mtd@lists.infradead.org
T: git git://git.infradead.org/ubi-2.6.git
S: Maintained
MICROTEK X6 SCANNER
P: Oliver Neukum
M: oliver@neukum.name
@ -2532,6 +2550,7 @@ P: Pavel Roskin
M: proski@gnu.org
P: David Gibson
M: hermes@gibson.dropbear.id.au
L: linux-wireless@vger.kernel.org
L: orinoco-users@lists.sourceforge.net
L: orinoco-devel@lists.sourceforge.net
W: http://www.nongnu.org/orinoco/
@ -2711,7 +2730,7 @@ S: Supported
PRISM54 WIRELESS DRIVER
P: Prism54 Development Team
M: developers@islsm.org
L: netdev@vger.kernel.org
L: linux-wireless@vger.kernel.org
W: http://prism54.org
S: Maintained
@ -2782,7 +2801,7 @@ S: Maintained
RAYLINK/WEBGEAR 802.11 WIRELESS LAN DRIVER
P: Corey Thomas
M: corey@world.std.com
L: linux-kernel@vger.kernel.org
L: linux-wireless@vger.kernel.org
S: Maintained
RANDOM NUMBER DRIVER
@ -2961,8 +2980,10 @@ P: Stephen Smalley
M: sds@tycho.nsa.gov
P: James Morris
M: jmorris@namei.org
P: Eric Paris
M: eparis@parisplace.org
L: linux-kernel@vger.kernel.org (kernel issues)
L: selinux@tycho.nsa.gov (general discussion)
L: selinux@tycho.nsa.gov (subscribers-only, general discussion)
W: http://www.nsa.gov/selinux
S: Supported
@ -3045,7 +3066,7 @@ M: josejx@gentoo.org
P: Daniel Drake
M: dsd@gentoo.org
W: http://softmac.sipsolutions.net/
L: netdev@vger.kernel.org
L: linux-wireless@vger.kernel.org
S: Maintained
SOFTWARE RAID (Multiple Disks) SUPPORT
@ -3750,6 +3771,7 @@ S: Maintained
WAVELAN NETWORK DRIVER & WIRELESS EXTENSIONS
P: Jean Tourrilhes
M: jt@hpl.hp.com
L: linux-wireless@vger.kernel.org
W: http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/
S: Maintained
@ -3766,8 +3788,9 @@ S: Maintained
WL3501 WIRELESS PCMCIA CARD DRIVER
P: Arnaldo Carvalho de Melo
M: acme@conectiva.com.br
W: http://advogato.org/person/acme
M: acme@ghostprotocols.net
L: linux-wireless@vger.kernel.org
W: http://oops.ghostprotocols.net:81/blog
S: Maintained
X.25 NETWORK LAYER
@ -3830,6 +3853,7 @@ M: dsd@gentoo.org
P: Ulrich Kunitz
M: kune@deine-taler.de
W: http://zd1211.ath.cx/wiki/DriverRewrite
L: linux-wireless@vger.kernel.org
L: zd1211-devs@lists.sourceforge.net (subscribers-only)
S: Maintained

1
arch/alpha/lib/Makefile
View File

@ -36,7 +36,6 @@ lib-y = __divqu.o __remqu.o __divlu.o __remlu.o \
$(ev6-y)csum_ipv6_magic.o \
$(ev6-y)clear_page.o \
$(ev6-y)copy_page.o \
strcasecmp.o \
fpreg.o \
callback_srm.o srm_puts.o srm_printk.o

26
arch/alpha/lib/strcasecmp.c
View File

@ -1,26 +0,0 @@
/*
* linux/arch/alpha/lib/strcasecmp.c
*/
#include <linux/string.h>
/* We handle nothing here except the C locale. Since this is used in
only one place, on strings known to contain only 7 bit ASCII, this
is ok. */
int strcasecmp(const char *a, const char *b)
{
int ca, cb;
do {
ca = *a++ & 0xff;
cb = *b++ & 0xff;
if (ca >= 'A' && ca <= 'Z')
ca += 'a' - 'A';
if (cb >= 'A' && cb <= 'Z')
cb += 'a' - 'A';
} while (ca == cb && ca != '\0');
return ca - cb;
}

13
arch/avr32/Kconfig
View File

@ -57,9 +57,6 @@ config ARCH_HAS_ILOG2_U64
bool
default n
config GENERIC_BUST_SPINLOCK
bool
config GENERIC_HWEIGHT
bool
default y
@ -68,6 +65,11 @@ config GENERIC_CALIBRATE_DELAY
bool
default y
config GENERIC_BUG
bool
default y
depends on BUG
source "init/Kconfig"
menu "System Type and features"
@ -106,6 +108,9 @@ choice
config BOARD_ATSTK1000
bool "ATSTK1000 evaluation board"
select BOARD_ATSTK1002 if CPU_AT32AP7000
config BOARD_ATNGW100
bool "ATNGW100 Network Gateway"
endchoice
choice
@ -116,6 +121,8 @@ config LOADER_U_BOOT
bool "U-Boot (or similar) bootloader"
endchoice
source "arch/avr32/mach-at32ap/Kconfig"
config LOAD_ADDRESS
hex
default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y

1
arch/avr32/Makefile
View File

@ -27,6 +27,7 @@ head-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/head.o
head-y += arch/avr32/kernel/head.o
core-$(CONFIG_PLATFORM_AT32AP) += arch/avr32/mach-at32ap/
core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/
core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/
core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
core-y += arch/avr32/kernel/
core-y += arch/avr32/mm/

1
arch/avr32/boards/atngw100/Makefile Normal file
View File

@ -0,0 +1 @@
obj-y += setup.o flash.o

95
arch/avr32/boards/atngw100/flash.c Normal file
View File

@ -0,0 +1,95 @@
/*
* ATNGW100 board-specific flash initialization
*
* Copyright (C) 2005-2006 Atmel Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <asm/arch/smc.h>
static struct smc_config flash_config __initdata = {
.ncs_read_setup = 0,
.nrd_setup = 40,
.ncs_write_setup = 0,
.nwe_setup = 10,
.ncs_read_pulse = 80,
.nrd_pulse = 40,
.ncs_write_pulse = 65,
.nwe_pulse = 55,
.read_cycle = 120,
.write_cycle = 120,
.bus_width = 2,
.nrd_controlled = 1,
.nwe_controlled = 1,
.byte_write = 1,
};
static struct mtd_partition flash_parts[] = {
{
.name = "u-boot",
.offset = 0x00000000,
.size = 0x00020000, /* 128 KiB */
.mask_flags = MTD_WRITEABLE,
},
{
.name = "root",
.offset = 0x00020000,
.size = 0x007d0000,
},
{
.name = "env",
.offset = 0x007f0000,
.size = 0x00010000,
.mask_flags = MTD_WRITEABLE,
},
};
static struct physmap_flash_data flash_data = {
.width = 2,
.nr_parts = ARRAY_SIZE(flash_parts),
.parts = flash_parts,
};
static struct resource flash_resource = {
.start = 0x00000000,
.end = 0x007fffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device flash_device = {
.name = "physmap-flash",
.id = 0,
.resource = &flash_resource,
.num_resources = 1,
.dev = {
.platform_data = &flash_data,
},
};
/* This needs to be called after the SMC has been initialized */
static int __init atngw100_flash_init(void)
{
int ret;
ret = smc_set_configuration(0, &flash_config);
if (ret < 0) {
printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
return ret;
}
platform_device_register(&flash_device);
return 0;
}
device_initcall(atngw100_flash_init);

124
arch/avr32/boards/atngw100/setup.c Normal file
View File

@ -0,0 +1,124 @@
/*
* Board-specific setup code for the ATNGW100 Network Gateway
*
* Copyright (C) 2005-2006 Atmel Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/clk.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
#include <linux/linkage.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/spi/spi.h>
#include <asm/io.h>
#include <asm/setup.h>
#include <asm/arch/at32ap7000.h>
#include <asm/arch/board.h>
#include <asm/arch/init.h>
/* Initialized by bootloader-specific startup code. */
struct tag *bootloader_tags __initdata;
struct eth_addr {
u8 addr[6];
};
static struct eth_addr __initdata hw_addr[2];
static struct eth_platform_data __initdata eth_data[2];
static struct spi_board_info spi0_board_info[] __initdata = {
{
.modalias = "mtd_dataflash",
.max_speed_hz = 10000000,
.chip_select = 0,
},
};
/*
* The next two functions should go away as the boot loader is
* supposed to initialize the macb address registers with a valid
* ethernet address. But we need to keep it around for a while until
* we can be reasonably sure the boot loader does this.
*
* The phy_id is ignored as the driver will probe for it.
*/
static int __init parse_tag_ethernet(struct tag *tag)
{
int i;
i = tag->u.ethernet.mac_index;
if (i < ARRAY_SIZE(hw_addr))
memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
sizeof(hw_addr[i].addr));
return 0;
}
__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
static void __init set_hw_addr(struct platform_device *pdev)
{
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
const u8 *addr;
void __iomem *regs;
struct clk *pclk;
if (!res)
return;
if (pdev->id >= ARRAY_SIZE(hw_addr))
return;
addr = hw_addr[pdev->id].addr;
if (!is_valid_ether_addr(addr))
return;
/*
* Since this is board-specific code, we'll cheat and use the
* physical address directly as we happen to know that it's
* the same as the virtual address.
*/
regs = (void __iomem __force *)res->start;
pclk = clk_get(&pdev->dev, "pclk");
if (!pclk)
return;
clk_enable(pclk);
__raw_writel((addr[3] << 24) | (addr[2] << 16)
| (addr[1] << 8) | addr[0], regs + 0x98);
__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
clk_disable(pclk);
clk_put(pclk);
}
struct platform_device *at32_usart_map[1];
unsigned int at32_nr_usarts = 1;
void __init setup_board(void)
{
at32_map_usart(1, 0); /* USART 1: /dev/ttyS0, DB9 */
at32_setup_serial_console(0);
}
static int __init atngw100_init(void)
{
/*
* ATNGW100 uses 16-bit SDRAM interface, so we don't need to
* reserve any pins for it.
*/
at32_add_system_devices();
at32_add_device_usart(0);
set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
return 0;
}
postcore_initcall(atngw100_init);

4
arch/avr32/boards/atstk1000/atstk1002.c
View File

@ -33,7 +33,7 @@ struct eth_addr {
static struct eth_addr __initdata hw_addr[2];
static struct eth_platform_data __initdata eth_data[2];
extern struct lcdc_platform_data atstk1000_fb0_data;
static struct lcdc_platform_data atstk1000_fb0_data;
static struct spi_board_info spi0_board_info[] __initdata = {
{
@ -148,6 +148,8 @@ static int __init atstk1002_init(void)
set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
atstk1000_fb0_data.fbmem_start = fbmem_start;
atstk1000_fb0_data.fbmem_size = fbmem_size;
at32_add_device_lcdc(0, &atstk1000_fb0_data);
return 0;

30
arch/avr32/boards/atstk1000/setup.c
View File

@ -18,33 +18,3 @@
/* Initialized by bootloader-specific startup code. */
struct tag *bootloader_tags __initdata;
struct lcdc_platform_data __initdata atstk1000_fb0_data;
void __init board_setup_fbmem(unsigned long fbmem_start,
unsigned long fbmem_size)
{
if (!fbmem_size)
return;
if (!fbmem_start) {
void *fbmem;
fbmem = alloc_bootmem_low_pages(fbmem_size);
fbmem_start = __pa(fbmem);
} else {
pg_data_t *pgdat;
for_each_online_pgdat(pgdat) {
if (fbmem_start >= pgdat->bdata->node_boot_start
&& fbmem_start <= pgdat->bdata->node_low_pfn)
reserve_bootmem_node(pgdat, fbmem_start,
fbmem_size);
}
}
printk("%luKiB framebuffer memory at address 0x%08lx\n",
fbmem_size >> 10, fbmem_start);
atstk1000_fb0_data.fbmem_start = fbmem_start;
atstk1000_fb0_data.fbmem_size = fbmem_size;
}

1085
arch/avr32/configs/atngw100_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

64
arch/avr32/kernel/cpu.c
View File

@ -209,16 +209,17 @@ static const char *mmu_types[] = {
void __init setup_processor(void)
{
unsigned long config0, config1;
unsigned long features;
unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
unsigned tmp;
config0 = sysreg_read(CONFIG0); /* 0x0000013e; */
config1 = sysreg_read(CONFIG1); /* 0x01f689a2; */
cpu_id = config0 >> 24;
cpu_rev = (config0 >> 16) & 0xff;
arch_id = (config0 >> 13) & 0x07;
arch_rev = (config0 >> 10) & 0x07;
mmu_type = (config0 >> 7) & 0x03;
config0 = sysreg_read(CONFIG0);
config1 = sysreg_read(CONFIG1);
cpu_id = SYSREG_BFEXT(PROCESSORID, config0);
cpu_rev = SYSREG_BFEXT(PROCESSORREVISION, config0);
arch_id = SYSREG_BFEXT(AT, config0);
arch_rev = SYSREG_BFEXT(AR, config0);
mmu_type = SYSREG_BFEXT(MMUT, config0);
boot_cpu_data.arch_type = arch_id;
boot_cpu_data.cpu_type = cpu_id;
@ -226,16 +227,16 @@ void __init setup_processor(void)
boot_cpu_data.cpu_revision = cpu_rev;
boot_cpu_data.tlb_config = mmu_type;
tmp = (config1 >> 13) & 0x07;
tmp = SYSREG_BFEXT(ILSZ, config1);
if (tmp) {
boot_cpu_data.icache.ways = 1 << ((config1 >> 10) & 0x07);
boot_cpu_data.icache.sets = 1 << ((config1 >> 16) & 0x0f);
boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1);
boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1);
boot_cpu_data.icache.linesz = 1 << (tmp + 1);
}
tmp = (config1 >> 3) & 0x07;
tmp = SYSREG_BFEXT(DLSZ, config1);
if (tmp) {
boot_cpu_data.dcache.ways = 1 << (config1 & 0x07);
boot_cpu_data.dcache.sets = 1 << ((config1 >> 6) & 0x0f);
boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1);
boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1);
boot_cpu_data.dcache.linesz = 1 << (tmp + 1);
}
@ -250,16 +251,39 @@ void __init setup_processor(void)
cpu_names[cpu_id], cpu_id, cpu_rev,
arch_names[arch_id], arch_rev);
printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
printk ("CPU: features:");
if (config0 & (1 << 6))
printk(" fpu");
if (config0 & (1 << 5))
printk(" java");
if (config0 & (1 << 4))
printk(" perfctr");
if (config0 & (1 << 3))
features = 0;
if (config0 & SYSREG_BIT(CONFIG0_R)) {
features |= AVR32_FEATURE_RMW;
printk(" rmw");
}
if (config0 & SYSREG_BIT(CONFIG0_D)) {
features |= AVR32_FEATURE_DSP;
printk(" dsp");
}
if (config0 & SYSREG_BIT(CONFIG0_S)) {
features |= AVR32_FEATURE_SIMD;
printk(" simd");
}
if (config0 & SYSREG_BIT(CONFIG0_O)) {
features |= AVR32_FEATURE_OCD;
printk(" ocd");
}
if (config0 & SYSREG_BIT(CONFIG0_P)) {
features |= AVR32_FEATURE_PCTR;
printk(" perfctr");
}
if (config0 & SYSREG_BIT(CONFIG0_J)) {
features |= AVR32_FEATURE_JAVA;
printk(" java");
}
if (config0 & SYSREG_BIT(CONFIG0_F)) {
features |= AVR32_FEATURE_FPU;
printk(" fpu");
}
printk("\n");
boot_cpu_data.features = features;
}
#ifdef CONFIG_PROC_FS

124
arch/avr32/kernel/entry-avr32b.S
View File

@ -100,55 +100,49 @@ dtlb_miss_write:
.global tlb_miss_common
tlb_miss_common:
mfsr r0, SYSREG_PTBR
mfsr r1, SYSREG_TLBEAR
mfsr r0, SYSREG_TLBEAR
mfsr r1, SYSREG_PTBR
/* Is it the vmalloc space? */
bld r1, 31
bld r0, 31
brcs handle_vmalloc_miss
/* First level lookup */
pgtbl_lookup:
lsr r2, r1, PGDIR_SHIFT
ld.w r0, r0[r2 << 2]
bld r0, _PAGE_BIT_PRESENT
lsr r2, r0, PGDIR_SHIFT
ld.w r3, r1[r2 << 2]
bfextu r1, r0, PAGE_SHIFT, PGDIR_SHIFT - PAGE_SHIFT
bld r3, _PAGE_BIT_PRESENT
brcc page_table_not_present
/* TODO: Check access rights on page table if necessary */
/* Translate to virtual address in P1. */
andl r0, 0xf000
sbr r0, 31
andl r3, 0xf000
sbr r3, 31
/* Second level lookup */
lsl r1, (32 - PGDIR_SHIFT)
lsr r1, (32 - PGDIR_SHIFT) + PAGE_SHIFT
add r2, r0, r1 << 2
ld.w r1, r2[0]
bld r1, _PAGE_BIT_PRESENT
ld.w r2, r3[r1 << 2]
mfsr r0, SYSREG_TLBARLO
bld r2, _PAGE_BIT_PRESENT
brcc page_not_present
/* Mark the page as accessed */
sbr r1, _PAGE_BIT_ACCESSED
st.w r2[0], r1
sbr r2, _PAGE_BIT_ACCESSED
st.w r3[r1 << 2], r2
/* Drop software flags */
andl r1, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
mtsr SYSREG_TLBELO, r1
andl r2, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
mtsr SYSREG_TLBELO, r2
/* Figure out which entry we want to replace */
mfsr r0, SYSREG_TLBARLO
mfsr r1, SYSREG_MMUCR
clz r2, r0
brcc 1f
mov r1, -1 /* All entries have been accessed, */
mtsr SYSREG_TLBARLO, r1 /* so reset TLBAR */
mov r2, 0 /* and start at 0 */
1: mfsr r1, SYSREG_MMUCR
lsl r2, 14
andl r1, 0x3fff, COH
or r1, r2
mtsr SYSREG_MMUCR, r1
mov r3, -1 /* All entries have been accessed, */
mov r2, 0 /* so start at 0 */
mtsr SYSREG_TLBARLO, r3 /* and reset TLBAR */
1: bfins r1, r2, SYSREG_DRP_OFFSET, SYSREG_DRP_SIZE
mtsr SYSREG_MMUCR, r1
tlbw
tlbmiss_restore
@ -156,8 +150,8 @@ pgtbl_lookup:
handle_vmalloc_miss:
/* Simply do the lookup in init's page table */
mov r0, lo(swapper_pg_dir)
orh r0, hi(swapper_pg_dir)
mov r1, lo(swapper_pg_dir)
orh r1, hi(swapper_pg_dir)
rjmp pgtbl_lookup
@ -340,12 +334,34 @@ do_bus_error_read:
do_nmi_ll:
sub sp, 4
stmts --sp, r0-lr
/* FIXME: Make sure RAR_NMI and RSR_NMI are pushed instead of *_EX */
rcall save_full_context_ex
mfsr r9, SYSREG_RSR_NMI
mfsr r8, SYSREG_RAR_NMI
bfextu r0, r9, MODE_SHIFT, 3
brne 2f
1: pushm r8, r9 /* PC and SR */
mfsr r12, SYSREG_ECR
mov r11, sp
rcall do_nmi
rjmp bad_return
popm r8-r9
mtsr SYSREG_RAR_NMI, r8
tst r0, r0
mtsr SYSREG_RSR_NMI, r9
brne 3f
ldmts sp++, r0-lr
sub sp, -4 /* skip r12_orig */
rete
2: sub r10, sp, -(FRAME_SIZE_FULL - REG_LR)
stdsp sp[4], r10 /* replace saved SP */
rjmp 1b
3: popm lr
sub sp, -4 /* skip sp */
popm r0-r12
sub sp, -4 /* skip r12_orig */
rete
handle_address_fault:
sub sp, 4
@ -630,9 +646,12 @@ irq_level\level:
rcall do_IRQ
lddsp r4, sp[REG_SR]
andh r4, (MODE_MASK >> 16), COH
bfextu r4, r4, SYSREG_M0_OFFSET, 3
cp.w r4, MODE_SUPERVISOR >> SYSREG_M0_OFFSET
breq 2f
cp.w r4, MODE_USER >> SYSREG_M0_OFFSET
#ifdef CONFIG_PREEMPT
brne 2f
brne 3f
#else
brne 1f
#endif
@ -649,9 +668,18 @@ irq_level\level:
sub sp, -4 /* ignore r12_orig */
rete
2: get_thread_info r0
ld.w r1, r0[TI_flags]
bld r1, TIF_CPU_GOING_TO_SLEEP
#ifdef CONFIG_PREEMPT
2:
get_thread_info r0
brcc 3f
#else
brcc 1b
#endif
sub r1, pc, . - cpu_idle_skip_sleep
stdsp sp[REG_PC], r1
#ifdef CONFIG_PREEMPT
3: get_thread_info r0
ld.w r2, r0[TI_preempt_count]
cp.w r2, 0
brne 1b
@ -662,12 +690,32 @@ irq_level\level:
bld r4, SYSREG_GM_OFFSET
brcs 1b
rcall preempt_schedule_irq
rjmp 1b
#endif
rjmp 1b
.endm
.section .irq.text,"ax",@progbits
.global cpu_idle_sleep
cpu_idle_sleep:
mask_interrupts
get_thread_info r8
ld.w r9, r8[TI_flags]
bld r9, TIF_NEED_RESCHED
brcs cpu_idle_enable_int_and_exit
sbr r9, TIF_CPU_GOING_TO_SLEEP
st.w r8[TI_flags], r9
unmask_interrupts
sleep 0
cpu_idle_skip_sleep:
mask_interrupts
ld.w r9, r8[TI_flags]
cbr r9, TIF_CPU_GOING_TO_SLEEP
st.w r8[TI_flags], r9
cpu_idle_enable_int_and_exit:
unmask_interrupts
retal r12
.global irq_level0
.global irq_level1
.global irq_level2

11
arch/avr32/kernel/module.c
View File

@ -12,10 +12,11 @@
* published by the Free Software Foundation.
*/
#include <linux/moduleloader.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/bug.h>
#include <linux/elf.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleloader.h>
#include <linux/vmalloc.h>
void *module_alloc(unsigned long size)
@ -315,10 +316,10 @@ int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
vfree(module->arch.syminfo);
module->arch.syminfo = NULL;
return 0;
return module_bug_finalize(hdr, sechdrs, module);
}
void module_arch_cleanup(struct module *module)
{
module_bug_cleanup(module);
}

193
arch/avr32/kernel/process.c
View File

@ -11,6 +11,7 @@
#include <linux/fs.h>
#include <linux/ptrace.h>
#include <linux/reboot.h>
#include <linux/uaccess.h>
#include <linux/unistd.h>
#include <asm/sysreg.h>
@ -19,6 +20,8 @@
void (*pm_power_off)(void) = NULL;
EXPORT_SYMBOL(pm_power_off);
extern void cpu_idle_sleep(void);
/*
* This file handles the architecture-dependent parts of process handling..
*/
@ -27,9 +30,8 @@ void cpu_idle(void)
{
/* endless idle loop with no priority at all */
while (1) {
/* TODO: Enter sleep mode */
while (!need_resched())
cpu_relax();
cpu_idle_sleep();
preempt_enable_no_resched();
schedule();
preempt_disable();
@ -114,39 +116,178 @@ void release_thread(struct task_struct *dead_task)
/* do nothing */
}
static void dump_mem(const char *str, const char *log_lvl,
unsigned long bottom, unsigned long top)
{
unsigned long p;
int i;
printk("%s%s(0x%08lx to 0x%08lx)\n", log_lvl, str, bottom, top);
for (p = bottom & ~31; p < top; ) {
printk("%s%04lx: ", log_lvl, p & 0xffff);
for (i = 0; i < 8; i++, p += 4) {
unsigned int val;
if (p < bottom || p >= top)
printk(" ");
else {
if (__get_user(val, (unsigned int __user *)p)) {
printk("\n");
goto out;
}
printk("%08x ", val);
}
}
printk("\n");
}
out:
return;
}
static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
{
return (p > (unsigned long)tinfo)
&& (p < (unsigned long)tinfo + THREAD_SIZE - 3);
}
#ifdef CONFIG_FRAME_POINTER
static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
struct pt_regs *regs, const char *log_lvl)
{
unsigned long lr, fp;
struct thread_info *tinfo;
if (regs)
fp = regs->r7;
else if (tsk == current)
asm("mov %0, r7" : "=r"(fp));
else
fp = tsk->thread.cpu_context.r7;
/*
* Walk the stack as long as the frame pointer (a) is within
* the kernel stack of the task, and (b) it doesn't move
* downwards.
*/
tinfo = task_thread_info(tsk);
printk("%sCall trace:\n", log_lvl);
while (valid_stack_ptr(tinfo, fp)) {
unsigned long new_fp;
lr = *(unsigned long *)fp;
#ifdef CONFIG_KALLSYMS
printk("%s [<%08lx>] ", log_lvl, lr);
#else
printk(" [<%08lx>] ", lr);
#endif
print_symbol("%s\n", lr);
new_fp = *(unsigned long *)(fp + 4);
if (new_fp <= fp)
break;
fp = new_fp;
}
printk("\n");
}
#else
static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
struct pt_regs *regs, const char *log_lvl)
{
unsigned long addr;
printk("%sCall trace:\n", log_lvl);
while (!kstack_end(sp)) {
addr = *sp++;
if (kernel_text_address(addr)) {
#ifdef CONFIG_KALLSYMS
printk("%s [<%08lx>] ", log_lvl, addr);
#else
printk(" [<%08lx>] ", addr);
#endif
print_symbol("%s\n", addr);
}
}
printk("\n");
}
#endif
void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
struct pt_regs *regs, const char *log_lvl)
{
struct thread_info *tinfo;
if (sp == 0) {
if (tsk)
sp = tsk->thread.cpu_context.ksp;
else
sp = (unsigned long)&tinfo;
}
if (!tsk)
tsk = current;
tinfo = task_thread_info(tsk);
if (valid_stack_ptr(tinfo, sp)) {
dump_mem("Stack: ", log_lvl, sp,
THREAD_SIZE + (unsigned long)tinfo);
show_trace_log_lvl(tsk, (unsigned long *)sp, regs, log_lvl);
}
}
void show_stack(struct task_struct *tsk, unsigned long *stack)
{
show_stack_log_lvl(tsk, (unsigned long)stack, NULL, "");
}
void dump_stack(void)
{
unsigned long stack;
show_trace_log_lvl(current, &stack, NULL, "");
}
EXPORT_SYMBOL(dump_stack);
static const char *cpu_modes[] = {
"Application", "Supervisor", "Interrupt level 0", "Interrupt level 1",
"Interrupt level 2", "Interrupt level 3", "Exception", "NMI"
};
void show_regs(struct pt_regs *regs)
void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl)
{
unsigned long sp = regs->sp;
unsigned long lr = regs->lr;
unsigned long mode = (regs->sr & MODE_MASK) >> MODE_SHIFT;
if (!user_mode(regs))
if (!user_mode(regs)) {
sp = (unsigned long)regs + FRAME_SIZE_FULL;
print_symbol("PC is at %s\n", instruction_pointer(regs));
print_symbol("LR is at %s\n", lr);
printk("pc : [<%08lx>] lr : [<%08lx>] %s\n"
"sp : %08lx r12: %08lx r11: %08lx\n",
instruction_pointer(regs),
lr, print_tainted(), sp, regs->r12, regs->r11);
printk("r10: %08lx r9 : %08lx r8 : %08lx\n",
regs->r10, regs->r9, regs->r8);
printk("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
regs->r7, regs->r6, regs->r5, regs->r4);
printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
regs->r3, regs->r2, regs->r1, regs->r0);
printk("Flags: %c%c%c%c%c\n",
printk("%s", log_lvl);
print_symbol("PC is at %s\n", instruction_pointer(regs));
printk("%s", log_lvl);
print_symbol("LR is at %s\n", lr);
}
printk("%spc : [<%08lx>] lr : [<%08lx>] %s\n"
"%ssp : %08lx r12: %08lx r11: %08lx\n",
log_lvl, instruction_pointer(regs), lr, print_tainted(),
log_lvl, sp, regs->r12, regs->r11);
printk("%sr10: %08lx r9 : %08lx r8 : %08lx\n",
log_lvl, regs->r10, regs->r9, regs->r8);
printk("%sr7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
log_lvl, regs->r7, regs->r6, regs->r5, regs->r4);
printk("%sr3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
log_lvl, regs->r3, regs->r2, regs->r1, regs->r0);
printk("%sFlags: %c%c%c%c%c\n", log_lvl,
regs->sr & SR_Q ? 'Q' : 'q',
regs->sr & SR_V ? 'V' : 'v',
regs->sr & SR_N ? 'N' : 'n',
regs->sr & SR_Z ? 'Z' : 'z',
regs->sr & SR_C ? 'C' : 'c');
printk("Mode bits: %c%c%c%c%c%c%c%c%c\n",
printk("%sMode bits: %c%c%c%c%c%c%c%c%c\n", log_lvl,
regs->sr & SR_H ? 'H' : 'h',
regs->sr & SR_R ? 'R' : 'r',
regs->sr & SR_J ? 'J' : 'j',
@ -156,9 +297,21 @@ void show_regs(struct pt_regs *regs)
regs->sr & SR_I1M ? '1' : '.',
regs->sr & SR_I0M ? '0' : '.',
regs->sr & SR_GM ? 'G' : 'g');
printk("CPU Mode: %s\n", cpu_modes[mode]);
printk("%sCPU Mode: %s\n", log_lvl, cpu_modes[mode]);
printk("%sProcess: %s [%d] (task: %p thread: %p)\n",
log_lvl, current->comm, current->pid, current,
task_thread_info(current));
}
show_trace(NULL, (unsigned long *)sp, regs);
void show_regs(struct pt_regs *regs)
{
unsigned long sp = regs->sp;
if (!user_mode(regs))
sp = (unsigned long)regs + FRAME_SIZE_FULL;
show_regs_log_lvl(regs, "");
show_trace_log_lvl(current, (unsigned long *)sp, regs, "");
}
EXPORT_SYMBOL(show_regs);

486
arch/avr32/kernel/setup.c
View File

@ -8,12 +8,14 @@
#include <linux/clk.h>
#include <linux/init.h>
#include <linux/initrd.h>
#include <linux/sched.h>
#include <linux/console.h>
#include <linux/ioport.h>
#include <linux/bootmem.h>
#include <linux/fs.h>
#include <linux/module.h>
#include <linux/pfn.h>
#include <linux/root_dev.h>
#include <linux/cpu.h>
#include <linux/kernel.h>
@ -29,13 +31,6 @@
extern int root_mountflags;
/*
* Bootloader-provided information about physical memory
*/
struct tag_mem_range *mem_phys;
struct tag_mem_range *mem_reserved;
struct tag_mem_range *mem_ramdisk;
/*
* Initialize loops_per_jiffy as 5000000 (500MIPS).
* Better make it too large than too small...
@ -47,49 +42,194 @@ EXPORT_SYMBOL(boot_cpu_data);
static char __initdata command_line[COMMAND_LINE_SIZE];
/*
* Should be more than enough, but if you have a _really_ complex
* setup, you might need to increase the size of this...
*/
static struct tag_mem_range __initdata mem_range_cache[32];
static unsigned mem_range_next_free;
/*
* Standard memory resources
*/
static struct resource mem_res[] = {
{
.name = "Kernel code",
.start = 0,
.end = 0,
.flags = IORESOURCE_MEM
},
{
.name = "Kernel data",
.start = 0,
.end = 0,
.flags = IORESOURCE_MEM,
},
static struct resource __initdata kernel_data = {
.name = "Kernel data",
.start = 0,
.end = 0,
.flags = IORESOURCE_MEM,
};
static struct resource __initdata kernel_code = {
.name = "Kernel code",
.start = 0,
.end = 0,
.flags = IORESOURCE_MEM,
.sibling = &kernel_data,
};
#define kernel_code mem_res[0]
#define kernel_data mem_res[1]
/*
* Available system RAM and reserved regions as singly linked
* lists. These lists are traversed using the sibling pointer in
* struct resource and are kept sorted at all times.
*/
static struct resource *__initdata system_ram;
static struct resource *__initdata reserved = &kernel_code;
/*
* We need to allocate these before the bootmem allocator is up and
* running, so we need this "cache". 32 entries are probably enough
* for all but the most insanely complex systems.
*/
static struct resource __initdata res_cache[32];
static unsigned int __initdata res_cache_next_free;
static void __init resource_init(void)
{
struct resource *mem, *res;
struct resource *new;
kernel_code.start = __pa(init_mm.start_code);
for (mem = system_ram; mem; mem = mem->sibling) {
new = alloc_bootmem_low(sizeof(struct resource));
memcpy(new, mem, sizeof(struct resource));
new->sibling = NULL;
if (request_resource(&iomem_resource, new))
printk(KERN_WARNING "Bad RAM resource %08x-%08x\n",
mem->start, mem->end);
}
for (res = reserved; res; res = res->sibling) {
new = alloc_bootmem_low(sizeof(struct resource));
memcpy(new, res, sizeof(struct resource));
new->sibling = NULL;
if (insert_resource(&iomem_resource, new))
printk(KERN_WARNING
"Bad reserved resource %s (%08x-%08x)\n",
res->name, res->start, res->end);
}
}
static void __init
add_physical_memory(resource_size_t start, resource_size_t end)
{
struct resource *new, *next, **pprev;
for (pprev = &system_ram, next = system_ram; next;
pprev = &next->sibling, next = next->sibling) {
if (end < next->start)
break;
if (start <= next->end) {
printk(KERN_WARNING
"Warning: Physical memory map is broken\n");
printk(KERN_WARNING
"Warning: %08x-%08x overlaps %08x-%08x\n",
start, end, next->start, next->end);
return;
}
}
if (res_cache_next_free >= ARRAY_SIZE(res_cache)) {
printk(KERN_WARNING
"Warning: Failed to add physical memory %08x-%08x\n",
start, end);
return;
}
new = &res_cache[res_cache_next_free++];
new->start = start;
new->end = end;
new->name = "System RAM";
new->flags = IORESOURCE_MEM;
*pprev = new;
}
static int __init
add_reserved_region(resource_size_t start, resource_size_t end,
const char *name)
{
struct resource *new, *next, **pprev;
if (end < start)
return -EINVAL;
if (res_cache_next_free >= ARRAY_SIZE(res_cache))
return -ENOMEM;
for (pprev = &reserved, next = reserved; next;
pprev = &next->sibling, next = next->sibling) {
if (end < next->start)
break;
if (start <= next->end)
return -EBUSY;
}
new = &res_cache[res_cache_next_free++];
new->start = start;
new->end = end;
new->name = name;
new->flags = IORESOURCE_MEM;
*pprev = new;
return 0;
}
static unsigned long __init
find_free_region(const struct resource *mem, resource_size_t size,
resource_size_t align)
{
struct resource *res;
unsigned long target;
target = ALIGN(mem->start, align);
for (res = reserved; res; res = res->sibling) {
if ((target + size) <= res->start)
break;
if (target <= res->end)
target = ALIGN(res->end + 1, align);
}
if ((target + size) > (mem->end + 1))
return mem->end + 1;
return target;
}
static int __init
alloc_reserved_region(resource_size_t *start, resource_size_t size,
resource_size_t align, const char *name)
{
struct resource *mem;
resource_size_t target;
int ret;
for (mem = system_ram; mem; mem = mem->sibling) {
target = find_free_region(mem, size, align);
if (target <= mem->end) {
ret = add_reserved_region(target, target + size - 1,
name);
if (!ret)
*start = target;
return ret;
}
}
return -ENOMEM;
}
/*
* Early framebuffer allocation. Works as follows:
* - If fbmem_size is zero, nothing will be allocated or reserved.
* - If fbmem_start is zero when setup_bootmem() is called,
* fbmem_size bytes will be allocated from the bootmem allocator.
* a block of fbmem_size bytes will be reserved before bootmem
* initialization. It will be aligned to the largest page size
* that fbmem_size is a multiple of.
* - If fbmem_start is nonzero, an area of size fbmem_size will be
* reserved at the physical address fbmem_start if necessary. If
* the area isn't in a memory region known to the kernel, it will
* be left alone.
* reserved at the physical address fbmem_start if possible. If
* it collides with other reserved memory, a different block of
* same size will be allocated, just as if fbmem_start was zero.
*
* Board-specific code may use these variables to set up platform data
* for the framebuffer driver if fbmem_size is nonzero.
*/
static unsigned long __initdata fbmem_start;
static unsigned long __initdata fbmem_size;
resource_size_t __initdata fbmem_start;
resource_size_t __initdata fbmem_size;
/*
* "fbmem=xxx[kKmM]" allocates the specified amount of boot memory for
@ -103,49 +243,43 @@ static unsigned long __initdata fbmem_size;
*/
static int __init early_parse_fbmem(char *p)
{
int ret;
unsigned long align;
fbmem_size = memparse(p, &p);
if (*p == '@')
if (*p == '@') {
fbmem_start = memparse(p, &p);
ret = add_reserved_region(fbmem_start,
fbmem_start + fbmem_size - 1,
"Framebuffer");
if (ret) {
printk(KERN_WARNING
"Failed to reserve framebuffer memory\n");
fbmem_start = 0;
}
}
if (!fbmem_start) {
if ((fbmem_size & 0x000fffffUL) == 0)
align = 0x100000; /* 1 MiB */
else if ((fbmem_size & 0x0000ffffUL) == 0)
align = 0x10000; /* 64 KiB */
else
align = 0x1000; /* 4 KiB */
ret = alloc_reserved_region(&fbmem_start, fbmem_size,
align, "Framebuffer");
if (ret) {
printk(KERN_WARNING
"Failed to allocate framebuffer memory\n");
fbmem_size = 0;
}
}
return 0;
}
early_param("fbmem", early_parse_fbmem);
static inline void __init resource_init(void)
{
struct tag_mem_range *region;
kernel_code.start = __pa(init_mm.start_code);
kernel_code.end = __pa(init_mm.end_code - 1);
kernel_data.start = __pa(init_mm.end_code);
kernel_data.end = __pa(init_mm.brk - 1);
for (region = mem_phys; region; region = region->next) {
struct resource *res;
unsigned long phys_start, phys_end;
if (region->size == 0)
continue;
phys_start = region->addr;
phys_end = phys_start + region->size - 1;
res = alloc_bootmem_low(sizeof(*res));
res->name = "System RAM";
res->start = phys_start;
res->end = phys_end;
res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
request_resource (&iomem_resource, res);
if (kernel_code.start >= res->start &&
kernel_code.end <= res->end)
request_resource (res, &kernel_code);
if (kernel_data.start >= res->start &&
kernel_data.end <= res->end)
request_resource (res, &kernel_data);
}
}
static int __init parse_tag_core(struct tag *tag)
{
if (tag->hdr.size > 2) {
@ -157,11 +291,9 @@ static int __init parse_tag_core(struct tag *tag)
}
__tagtable(ATAG_CORE, parse_tag_core);
static int __init parse_tag_mem_range(struct tag *tag,
struct tag_mem_range **root)
static int __init parse_tag_mem(struct tag *tag)
{
struct tag_mem_range *cur, **pprev;
struct tag_mem_range *new;
unsigned long start, end;
/*
* Ignore zero-sized entries. If we're running standalone, the
@ -171,34 +303,53 @@ static int __init parse_tag_mem_range(struct tag *tag,
if (tag->u.mem_range.size == 0)
return 0;
/*
* Copy the data so the bootmem init code doesn't need to care
* about it.
*/
if (mem_range_next_free >= ARRAY_SIZE(mem_range_cache))
panic("Physical memory map too complex!\n");
start = tag->u.mem_range.addr;
end = tag->u.mem_range.addr + tag->u.mem_range.size - 1;
new = &mem_range_cache[mem_range_next_free++];
*new = tag->u.mem_range;
add_physical_memory(start, end);
return 0;
}
__tagtable(ATAG_MEM, parse_tag_mem);
pprev = root;
cur = *root;
while (cur) {
pprev = &cur->next;
cur = cur->next;
static int __init parse_tag_rdimg(struct tag *tag)
{
#ifdef CONFIG_INITRD
struct tag_mem_range *mem = &tag->u.mem_range;
int ret;
if (initrd_start) {
printk(KERN_WARNING
"Warning: Only the first initrd image will be used\n");
return 0;
}
*pprev = new;
new->next = NULL;
ret = add_reserved_region(mem->start, mem->start + mem->size - 1,
"initrd");
if (ret) {
printk(KERN_WARNING
"Warning: Failed to reserve initrd memory\n");
return ret;
}
initrd_start = (unsigned long)__va(mem->addr);
initrd_end = initrd_start + mem->size;
#else
printk(KERN_WARNING "RAM disk image present, but "
"no initrd support in kernel, ignoring\n");
#endif
return 0;
}
__tagtable(ATAG_RDIMG, parse_tag_rdimg);
static int __init parse_tag_mem(struct tag *tag)
static int __init parse_tag_rsvd_mem(struct tag *tag)
{
return parse_tag_mem_range(tag, &mem_phys);
struct tag_mem_range *mem = &tag->u.mem_range;
return add_reserved_region(mem->addr, mem->addr + mem->size - 1,
"Reserved");
}
__tagtable(ATAG_MEM, parse_tag_mem);
__tagtable(ATAG_RSVD_MEM, parse_tag_rsvd_mem);
static int __init parse_tag_cmdline(struct tag *tag)
{
@ -207,12 +358,6 @@ static int __init parse_tag_cmdline(struct tag *tag)
}
__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
static int __init parse_tag_rdimg(struct tag *tag)
{
return parse_tag_mem_range(tag, &mem_ramdisk);
}
__tagtable(ATAG_RDIMG, parse_tag_rdimg);
static int __init parse_tag_clock(struct tag *tag)
{
/*
@ -223,12 +368,6 @@ static int __init parse_tag_clock(struct tag *tag)
}
__tagtable(ATAG_CLOCK, parse_tag_clock);
static int __init parse_tag_rsvd_mem(struct tag *tag)
{
return parse_tag_mem_range(tag, &mem_reserved);
}
__tagtable(ATAG_RSVD_MEM, parse_tag_rsvd_mem);
/*
* Scan the tag table for this tag, and call its parse function. The
* tag table is built by the linker from all the __tagtable
@ -260,10 +399,137 @@ static void __init parse_tags(struct tag *t)
t->hdr.tag);
}
/*
* Find a free memory region large enough for storing the
* bootmem bitmap.
*/
static unsigned long __init
find_bootmap_pfn(const struct resource *mem)
{
unsigned long bootmap_pages, bootmap_len;
unsigned long node_pages = PFN_UP(mem->end - mem->start + 1);
unsigned long bootmap_start;
bootmap_pages = bootmem_bootmap_pages(node_pages);
bootmap_len = bootmap_pages << PAGE_SHIFT;
/*
* Find a large enough region without reserved pages for
* storing the bootmem bitmap. We can take advantage of the
* fact that all lists have been sorted.
*
* We have to check that we don't collide with any reserved
* regions, which includes the kernel image and any RAMDISK
* images.
*/
bootmap_start = find_free_region(mem, bootmap_len, PAGE_SIZE);
return bootmap_start >> PAGE_SHIFT;
}
#define MAX_LOWMEM HIGHMEM_START
#define MAX_LOWMEM_PFN PFN_DOWN(MAX_LOWMEM)
static void __init setup_bootmem(void)
{
unsigned bootmap_size;
unsigned long first_pfn, bootmap_pfn, pages;
unsigned long max_pfn, max_low_pfn;
unsigned node = 0;
struct resource *res;
printk(KERN_INFO "Physical memory:\n");
for (res = system_ram; res; res = res->sibling)
printk(" %08x-%08x\n", res->start, res->end);
printk(KERN_INFO "Reserved memory:\n");
for (res = reserved; res; res = res->sibling)
printk(" %08x-%08x: %s\n",
res->start, res->end, res->name);
nodes_clear(node_online_map);
if (system_ram->sibling)
printk(KERN_WARNING "Only using first memory bank\n");
for (res = system_ram; res; res = NULL) {
first_pfn = PFN_UP(res->start);
max_low_pfn = max_pfn = PFN_DOWN(res->end + 1);
bootmap_pfn = find_bootmap_pfn(res);
if (bootmap_pfn > max_pfn)
panic("No space for bootmem bitmap!\n");
if (max_low_pfn > MAX_LOWMEM_PFN) {
max_low_pfn = MAX_LOWMEM_PFN;
#ifndef CONFIG_HIGHMEM
/*
* Lowmem is memory that can be addressed
* directly through P1/P2
*/
printk(KERN_WARNING
"Node %u: Only %ld MiB of memory will be used.\n",
node, MAX_LOWMEM >> 20);
printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
#else
#error HIGHMEM is not supported by AVR32 yet
#endif
}
/* Initialize the boot-time allocator with low memory only. */
bootmap_size = init_bootmem_node(NODE_DATA(node), bootmap_pfn,
first_pfn, max_low_pfn);
/*
* Register fully available RAM pages with the bootmem
* allocator.
*/
pages = max_low_pfn - first_pfn;
free_bootmem_node (NODE_DATA(node), PFN_PHYS(first_pfn),
PFN_PHYS(pages));
/* Reserve space for the bootmem bitmap... */
reserve_bootmem_node(NODE_DATA(node),
PFN_PHYS(bootmap_pfn),
bootmap_size);
/* ...and any other reserved regions. */
for (res = reserved; res; res = res->sibling) {
if (res->start > PFN_PHYS(max_pfn))
break;
/*
* resource_init will complain about partial
* overlaps, so we'll just ignore such
* resources for now.
*/
if (res->start >= PFN_PHYS(first_pfn)
&& res->end < PFN_PHYS(max_pfn))
reserve_bootmem_node(
NODE_DATA(node), res->start,
res->end - res->start + 1);
}
node_set_online(node);
}
}
void __init setup_arch (char **cmdline_p)
{
struct clk *cpu_clk;
init_mm.start_code = (unsigned long)_text;
init_mm.end_code = (unsigned long)_etext;
init_mm.end_data = (unsigned long)_edata;
init_mm.brk = (unsigned long)_end;
/*
* Include .init section to make allocations easier. It will
* be removed before the resource is actually requested.
*/
kernel_code.start = __pa(__init_begin);
kernel_code.end = __pa(init_mm.end_code - 1);
kernel_data.start = __pa(init_mm.end_code);
kernel_data.end = __pa(init_mm.brk - 1);
parse_tags(bootloader_tags);
setup_processor();
@ -289,24 +555,16 @@ void __init setup_arch (char **cmdline_p)
((cpu_hz + 500) / 1000) % 1000);
}
init_mm.start_code = (unsigned long) &_text;
init_mm.end_code = (unsigned long) &_etext;
init_mm.end_data = (unsigned long) &_edata;
init_mm.brk = (unsigned long) &_end;
strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
setup_bootmem();
board_setup_fbmem(fbmem_start, fbmem_size);
#ifdef CONFIG_VT
conswitchp = &dummy_con;
#endif
paging_init();
resource_init();
}

150
arch/avr32/kernel/time.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2004-2006 Atmel Corporation
* Copyright (C) 2004-2007 Atmel Corporation
*
* Based on MIPS implementation arch/mips/kernel/time.c
* Copyright 2001 MontaVista Software Inc.
@ -20,18 +20,25 @@
#include <linux/init.h>
#include <linux/profile.h>
#include <linux/sysdev.h>
#include <linux/err.h>
#include <asm/div64.h>
#include <asm/sysreg.h>
#include <asm/io.h>
#include <asm/sections.h>
static cycle_t read_cycle_count(void)
/* how many counter cycles in a jiffy? */
static u32 cycles_per_jiffy;
/* the count value for the next timer interrupt */
static u32 expirelo;
cycle_t __weak read_cycle_count(void)
{
return (cycle_t)sysreg_read(COUNT);
}
static struct clocksource clocksource_avr32 = {
struct clocksource __weak clocksource_avr32 = {
.name = "avr32",
.rating = 350,
.read = read_cycle_count,
@ -40,12 +47,20 @@ static struct clocksource clocksource_avr32 = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
struct irqaction timer_irqaction = {
.handler = timer_interrupt,
.flags = IRQF_DISABLED,
.name = "timer",
};
/*
* By default we provide the null RTC ops
*/
static unsigned long null_rtc_get_time(void)
{
return mktime(2004, 1, 1, 0, 0, 0);
return mktime(2007, 1, 1, 0, 0, 0);
}
static int null_rtc_set_time(unsigned long sec)
@ -56,23 +71,14 @@ static int null_rtc_set_time(unsigned long sec)
static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
/* how many counter cycles in a jiffy? */
static unsigned long cycles_per_jiffy;
/* cycle counter value at the previous timer interrupt */
static unsigned int timerhi, timerlo;
/* the count value for the next timer interrupt */
static unsigned int expirelo;
static void avr32_timer_ack(void)
{
unsigned int count;
u32 count;
/* Ack this timer interrupt and set the next one */
expirelo += cycles_per_jiffy;
/* setting COMPARE to 0 stops the COUNT-COMPARE */
if (expirelo == 0) {
printk(KERN_DEBUG "expirelo == 0\n");
sysreg_write(COMPARE, expirelo + 1);
} else {
sysreg_write(COMPARE, expirelo);
@ -86,27 +92,56 @@ static void avr32_timer_ack(void)
}
}
static unsigned int avr32_hpt_read(void)
int __weak avr32_hpt_init(void)
{
return sysreg_read(COUNT);
int ret;
unsigned long mult, shift, count_hz;
count_hz = clk_get_rate(boot_cpu_data.clk);
shift = clocksource_avr32.shift;
mult = clocksource_hz2mult(count_hz, shift);
clocksource_avr32.mult = mult;
{
u64 tmp;
tmp = TICK_NSEC;
tmp <<= shift;
tmp += mult / 2;
do_div(tmp, mult);
cycles_per_jiffy = tmp;
}
ret = setup_irq(0, &timer_irqaction);
if (ret) {
pr_debug("timer: could not request IRQ 0: %d\n", ret);
return -ENODEV;
}
printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
"%lu.%03lu MHz\n",
((count_hz + 500) / 1000) / 1000,
((count_hz + 500) / 1000) % 1000);
return 0;
}
/*
* Taken from MIPS c0_hpt_timer_init().
*
* Why is it so complicated, and what is "count"? My assumption is
* that `count' specifies the "reference cycle", i.e. the cycle since
* reset that should mean "zero". The reason COUNT is written twice is
* probably to make sure we don't get any timer interrupts while we
* are messing with the counter.
* The reason COUNT is written twice is probably to make sure we don't get any
* timer interrupts while we are messing with the counter.
*/
static void avr32_hpt_init(unsigned int count)
int __weak avr32_hpt_start(void)
{
count = sysreg_read(COUNT) - count;
u32 count = sysreg_read(COUNT);
expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
sysreg_write(COUNT, expirelo - cycles_per_jiffy);
sysreg_write(COMPARE, expirelo);
sysreg_write(COUNT, count);
return 0;
}
/*
@ -115,26 +150,18 @@ static void avr32_hpt_init(unsigned int count)
*
* In UP mode, it is invoked from the (global) timer_interrupt.
*/
static void local_timer_interrupt(int irq, void *dev_id)
void local_timer_interrupt(int irq, void *dev_id)
{
if (current->pid)
profile_tick(CPU_PROFILING);
update_process_times(user_mode(get_irq_regs()));
}
static irqreturn_t
timer_interrupt(int irq, void *dev_id)
irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
{
unsigned int count;
/* ack timer interrupt and try to set next interrupt */
count = avr32_hpt_read();
avr32_timer_ack();
/* Update timerhi/timerlo for intra-jiffy calibration */
timerhi += count < timerlo; /* Wrap around */
timerlo = count;
/*
* Call the generic timer interrupt handler
*/
@ -153,60 +180,37 @@ timer_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
static struct irqaction timer_irqaction = {
.handler = timer_interrupt,
.flags = IRQF_DISABLED,
.name = "timer",
};
void __init time_init(void)
{
unsigned long mult, shift, count_hz;
int ret;
/*
* Make sure we don't get any COMPARE interrupts before we can
* handle them.
*/
sysreg_write(COMPARE, 0);
xtime.tv_sec = rtc_get_time();
xtime.tv_nsec = 0;
set_normalized_timespec(&wall_to_monotonic,
-xtime.tv_sec, -xtime.tv_nsec);
printk("Before time_init: count=%08lx, compare=%08lx\n",
(unsigned long)sysreg_read(COUNT),
(unsigned long)sysreg_read(COMPARE));
count_hz = clk_get_rate(boot_cpu_data.clk);
shift = clocksource_avr32.shift;
mult = clocksource_hz2mult(count_hz, shift);
clocksource_avr32.mult = mult;
printk("Cycle counter: mult=%lu, shift=%lu\n", mult, shift);
{
u64 tmp;
tmp = TICK_NSEC;
tmp <<= shift;
tmp += mult / 2;
do_div(tmp, mult);
cycles_per_jiffy = tmp;
ret = avr32_hpt_init();
if (ret) {
pr_debug("timer: failed setup: %d\n", ret);
return;
}
/* This sets up the high precision timer for the first interrupt. */
avr32_hpt_init(avr32_hpt_read());
printk("After time_init: count=%08lx, compare=%08lx\n",
(unsigned long)sysreg_read(COUNT),
(unsigned long)sysreg_read(COMPARE));
ret = clocksource_register(&clocksource_avr32);
if (ret)
printk(KERN_ERR
"timer: could not register clocksource: %d\n", ret);
pr_debug("timer: could not register clocksource: %d\n", ret);
ret = setup_irq(0, &timer_irqaction);
if (ret)
printk("timer: could not request IRQ 0: %d\n", ret);
ret = avr32_hpt_start();
if (ret) {
pr_debug("timer: failed starting: %d\n", ret);
return;
}
}
static struct sysdev_class timer_class = {

419
arch/avr32/kernel/traps.c
View File

@ -5,158 +5,25 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#undef DEBUG
#include <linux/sched.h>
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kallsyms.h>
#include <linux/module.h>
#include <linux/notifier.h>
#include <linux/sched.h>
#include <linux/uaccess.h>
#include <asm/traps.h>
#include <asm/sysreg.h>
#include <asm/addrspace.h>
#include <asm/ocd.h>
#include <asm/mmu_context.h>
#include <asm/uaccess.h>
static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
{
unsigned long p;
int i;
printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
for (p = bottom & ~31; p < top; ) {
printk("%04lx: ", p & 0xffff);
for (i = 0; i < 8; i++, p += 4) {
unsigned int val;
if (p < bottom || p >= top)
printk(" ");
else {
if (__get_user(val, (unsigned int __user *)p)) {
printk("\n");
goto out;
}
printk("%08x ", val);
}
}
printk("\n");
}
out:
return;
}
static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
{
return (p > (unsigned long)tinfo)
&& (p < (unsigned long)tinfo + THREAD_SIZE - 3);
}
#ifdef CONFIG_FRAME_POINTER
static inline void __show_trace(struct task_struct *tsk, unsigned long *sp,
struct pt_regs *regs)
{
unsigned long lr, fp;
struct thread_info *tinfo;
tinfo = (struct thread_info *)
((unsigned long)sp & ~(THREAD_SIZE - 1));
if (regs)
fp = regs->r7;
else if (tsk == current)
asm("mov %0, r7" : "=r"(fp));
else
fp = tsk->thread.cpu_context.r7;
/*
* Walk the stack as long as the frame pointer (a) is within
* the kernel stack of the task, and (b) it doesn't move
* downwards.
*/
while (valid_stack_ptr(tinfo, fp)) {
unsigned long new_fp;
lr = *(unsigned long *)fp;
printk(" [<%08lx>] ", lr);
print_symbol("%s\n", lr);
new_fp = *(unsigned long *)(fp + 4);
if (new_fp <= fp)
break;
fp = new_fp;
}
printk("\n");
}
#else
static inline void __show_trace(struct task_struct *tsk, unsigned long *sp,
struct pt_regs *regs)
{
unsigned long addr;
while (!kstack_end(sp)) {
addr = *sp++;
if (kernel_text_address(addr)) {
printk(" [<%08lx>] ", addr);
print_symbol("%s\n", addr);
}
}
}
#endif
void show_trace(struct task_struct *tsk, unsigned long *sp,
struct pt_regs *regs)
{
if (regs &&
(((regs->sr & MODE_MASK) == MODE_EXCEPTION) ||
((regs->sr & MODE_MASK) == MODE_USER)))
return;
printk ("Call trace:");
#ifdef CONFIG_KALLSYMS
printk("\n");
#endif
__show_trace(tsk, sp, regs);
printk("\n");
}
void show_stack(struct task_struct *tsk, unsigned long *sp)
{
unsigned long stack;
if (!tsk)
tsk = current;
if (sp == 0) {
if (tsk == current) {
register unsigned long *real_sp __asm__("sp");
sp = real_sp;
} else {
sp = (unsigned long *)tsk->thread.cpu_context.ksp;
}
}
stack = (unsigned long)sp;
dump_mem("Stack: ", stack,
THREAD_SIZE + (unsigned long)tsk->thread_info);
show_trace(tsk, sp, NULL);
}
void dump_stack(void)
{
show_stack(NULL, NULL);
}
EXPORT_SYMBOL(dump_stack);
#include <asm/ocd.h>
#include <asm/sysreg.h>
#include <asm/traps.h>
ATOMIC_NOTIFIER_HEAD(avr32_die_chain);
int register_die_notifier(struct notifier_block *nb)
{
pr_debug("register_die_notifier: %p\n", nb);
return atomic_notifier_chain_register(&avr32_die_chain, nb);
}
EXPORT_SYMBOL(register_die_notifier);
@ -169,93 +36,103 @@ EXPORT_SYMBOL(unregister_die_notifier);
static DEFINE_SPINLOCK(die_lock);
void __die(const char *str, struct pt_regs *regs, unsigned long err,
const char *file, const char *func, unsigned long line)
void NORET_TYPE die(const char *str, struct pt_regs *regs, long err)
{
struct task_struct *tsk = current;
static int die_counter;
console_verbose();
spin_lock_irq(&die_lock);
bust_spinlocks(1);
printk(KERN_ALERT "%s", str);
if (file && func)
printk(" in %s:%s, line %ld", file, func, line);
printk("[#%d]:\n", ++die_counter);
print_modules();
show_regs(regs);
printk("Process %s (pid: %d, stack limit = 0x%p)\n",
tsk->comm, tsk->pid, tsk->thread_info + 1);
if (!user_mode(regs) || in_interrupt()) {
dump_mem("Stack: ", regs->sp,
THREAD_SIZE + (unsigned long)tsk->thread_info);
printk(KERN_ALERT "Oops: %s, sig: %ld [#%d]\n" KERN_EMERG,
str, err, ++die_counter);
#ifdef CONFIG_PREEMPT
printk("PREEMPT ");
#endif
#ifdef CONFIG_FRAME_POINTER
printk("FRAME_POINTER ");
#endif
if (current_cpu_data.features & AVR32_FEATURE_OCD) {
unsigned long did = __mfdr(DBGREG_DID);
printk("chip: 0x%03lx:0x%04lx rev %lu\n",
(did >> 1) & 0x7ff,
(did >> 12) & 0x7fff,
(did >> 28) & 0xf);
} else {
printk("cpu: arch %u r%u / core %u r%u\n",
current_cpu_data.arch_type,
current_cpu_data.arch_revision,
current_cpu_data.cpu_type,
current_cpu_data.cpu_revision);
}
print_modules();
show_regs_log_lvl(regs, KERN_EMERG);
show_stack_log_lvl(current, regs->sp, regs, KERN_EMERG);
bust_spinlocks(0);
spin_unlock_irq(&die_lock);
do_exit(SIGSEGV);
if (in_interrupt())
panic("Fatal exception in interrupt");
if (panic_on_oops)
panic("Fatal exception");
do_exit(err);
}
void __die_if_kernel(const char *str, struct pt_regs *regs, unsigned long err,
const char *file, const char *func, unsigned long line)
void _exception(long signr, struct pt_regs *regs, int code,
unsigned long addr)
{
siginfo_t info;
if (!user_mode(regs))
__die(str, regs, err, file, func, line);
die("Unhandled exception in kernel mode", regs, signr);
memset(&info, 0, sizeof(info));
info.si_signo = signr;
info.si_code = code;
info.si_addr = (void __user *)addr;
force_sig_info(signr, &info, current);
/*
* Init gets no signals that it doesn't have a handler for.
* That's all very well, but if it has caused a synchronous
* exception and we ignore the resulting signal, it will just
* generate the same exception over and over again and we get
* nowhere. Better to kill it and let the kernel panic.
*/
if (is_init(current)) {
__sighandler_t handler;
spin_lock_irq(&current->sighand->siglock);
handler = current->sighand->action[signr-1].sa.sa_handler;
spin_unlock_irq(&current->sighand->siglock);
if (handler == SIG_DFL) {
/* init has generated a synchronous exception
and it doesn't have a handler for the signal */
printk(KERN_CRIT "init has generated signal %ld "
"but has no handler for it\n", signr);
do_exit(signr);
}
}
}
asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
{
#ifdef CONFIG_SUBARCH_AVR32B
/*
* The exception entry always saves RSR_EX. For NMI, this is
* wrong; it should be RSR_NMI
*/
regs->sr = sysreg_read(RSR_NMI);
#endif
printk("NMI taken!!!!\n");
die("NMI", regs, ecr);
BUG();
printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
show_regs_log_lvl(regs, KERN_ALERT);
show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
}
asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
{
printk("Unable to handle critical exception %lu at pc = %08lx!\n",
ecr, regs->pc);
die("Oops", regs, ecr);
BUG();
die("Critical exception", regs, SIGKILL);
}
asmlinkage void do_address_exception(unsigned long ecr, struct pt_regs *regs)
{
siginfo_t info;
die_if_kernel("Oops: Address exception in kernel mode", regs, ecr);
#ifdef DEBUG
if (ecr == ECR_ADDR_ALIGN_X)
pr_debug("Instruction Address Exception at pc = %08lx\n",
regs->pc);
else if (ecr == ECR_ADDR_ALIGN_R)
pr_debug("Data Address Exception (Read) at pc = %08lx\n",
regs->pc);
else if (ecr == ECR_ADDR_ALIGN_W)
pr_debug("Data Address Exception (Write) at pc = %08lx\n",
regs->pc);
else
BUG();
show_regs(regs);
#endif
info.si_signo = SIGBUS;
info.si_errno = 0;
info.si_code = BUS_ADRALN;
info.si_addr = (void __user *)regs->pc;
force_sig_info(SIGBUS, &info, current);
_exception(SIGBUS, regs, BUS_ADRALN, regs->pc);
}
/* This way of handling undefined instructions is stolen from ARM */
@ -280,7 +157,8 @@ static int do_cop_absent(u32 insn)
{
int cop_nr;
u32 cpucr;
if ( (insn & 0xfdf00000) == 0xf1900000 )
if ((insn & 0xfdf00000) == 0xf1900000)
/* LDC0 */
cop_nr = 0;
else
@ -292,136 +170,91 @@ static int do_cop_absent(u32 insn)
sysreg_write(CPUCR, cpucr);
cpucr = sysreg_read(CPUCR);
if ( !(cpucr & (1 << (24 + cop_nr))) ){
printk("Coprocessor #%i not found!\n", cop_nr);
return -1;
}
if (!(cpucr & (1 << (24 + cop_nr))))
return -ENODEV;
return 0;
}
#ifdef CONFIG_BUG
#ifdef CONFIG_DEBUG_BUGVERBOSE
static inline void do_bug_verbose(struct pt_regs *regs, u32 insn)
int is_valid_bugaddr(unsigned long pc)
{
char *file;
u16 line;
char c;
unsigned short opcode;
if (__get_user(line, (u16 __user *)(regs->pc + 2)))
return;
if (__get_user(file, (char * __user *)(regs->pc + 4))
|| (unsigned long)file < PAGE_OFFSET
|| __get_user(c, file))
file = "<bad filename>";
if (pc < PAGE_OFFSET)
return 0;
if (probe_kernel_address((u16 *)pc, opcode))
return 0;
printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
return opcode == AVR32_BUG_OPCODE;
}
#else
static inline void do_bug_verbose(struct pt_regs *regs, u32 insn)
{
}
#endif
#endif
asmlinkage void do_illegal_opcode(unsigned long ecr, struct pt_regs *regs)
{
u32 insn;
struct undef_hook *hook;
siginfo_t info;
void __user *pc;
long code;
if (!user_mode(regs))
goto kernel_trap;
if (!user_mode(regs) && (ecr == ECR_ILLEGAL_OPCODE)) {
enum bug_trap_type type;
type = report_bug(regs->pc);
switch (type) {
case BUG_TRAP_TYPE_NONE:
break;
case BUG_TRAP_TYPE_WARN:
regs->pc += 2;
return;
case BUG_TRAP_TYPE_BUG:
die("Kernel BUG", regs, SIGKILL);
}
}
local_irq_enable();
pc = (void __user *)instruction_pointer(regs);
if (__get_user(insn, (u32 __user *)pc))
goto invalid_area;
if (user_mode(regs)) {
pc = (void __user *)instruction_pointer(regs);
if (get_user(insn, (u32 __user *)pc))
goto invalid_area;
if (ecr == ECR_COPROC_ABSENT) {
if (do_cop_absent(insn) == 0)
if (ecr == ECR_COPROC_ABSENT && !do_cop_absent(insn))
return;
}
spin_lock_irq(&undef_lock);
list_for_each_entry(hook, &undef_hook, node) {
if ((insn & hook->insn_mask) == hook->insn_val) {
if (hook->fn(regs, insn) == 0) {
spin_unlock_irq(&undef_lock);
return;
spin_lock_irq(&undef_lock);
list_for_each_entry(hook, &undef_hook, node) {
if ((insn & hook->insn_mask) == hook->insn_val) {
if (hook->fn(regs, insn) == 0) {
spin_unlock_irq(&undef_lock);
return;
}
}
}
spin_unlock_irq(&undef_lock);
}
spin_unlock_irq(&undef_lock);
invalid_area:
#ifdef DEBUG
printk("Illegal instruction at pc = %08lx\n", regs->pc);
if (regs->pc < TASK_SIZE) {
unsigned long ptbr, pgd, pte, *p;
ptbr = sysreg_read(PTBR);
p = (unsigned long *)ptbr;
pgd = p[regs->pc >> 22];
p = (unsigned long *)((pgd & 0x1ffff000) | 0x80000000);
pte = p[(regs->pc >> 12) & 0x3ff];
printk("page table: 0x%08lx -> 0x%08lx -> 0x%08lx\n", ptbr, pgd, pte);
}
#endif
info.si_signo = SIGILL;
info.si_errno = 0;
info.si_addr = (void __user *)regs->pc;
switch (ecr) {
case ECR_ILLEGAL_OPCODE:
case ECR_UNIMPL_INSTRUCTION:
info.si_code = ILL_ILLOPC;
break;
case ECR_PRIVILEGE_VIOLATION:
info.si_code = ILL_PRVOPC;
code = ILL_PRVOPC;
break;
case ECR_COPROC_ABSENT:
info.si_code = ILL_COPROC;
code = ILL_COPROC;
break;
default:
BUG();
code = ILL_ILLOPC;
break;
}
force_sig_info(SIGILL, &info, current);
_exception(SIGILL, regs, code, regs->pc);
return;
kernel_trap:
#ifdef CONFIG_BUG
if (__kernel_text_address(instruction_pointer(regs))) {
insn = *(u16 *)instruction_pointer(regs);
if (insn == AVR32_BUG_OPCODE) {
do_bug_verbose(regs, insn);
die("Kernel BUG", regs, 0);
return;
}
}
#endif
die("Oops: Illegal instruction in kernel code", regs, ecr);
invalid_area:
_exception(SIGSEGV, regs, SEGV_MAPERR, regs->pc);
}
asmlinkage void do_fpe(unsigned long ecr, struct pt_regs *regs)
{
siginfo_t info;
printk("Floating-point exception at pc = %08lx\n", regs->pc);
/* We have no FPU... */
info.si_signo = SIGILL;
info.si_errno = 0;
info.si_addr = (void __user *)regs->pc;
info.si_code = ILL_COPROC;
force_sig_info(SIGILL, &info, current);
/* We have no FPU yet */
_exception(SIGILL, regs, ILL_COPROC, regs->pc);
}

9
arch/avr32/kernel/vmlinux.lds.c
View File

@ -26,6 +26,12 @@ SECTIONS
_sinittext = .;
*(.text.reset)
*(.init.text)
/*
* .exit.text is discarded at runtime, not
* link time, to deal with references from
* __bug_table
*/
*(.exit.text)
_einittext = .;
. = ALIGN(4);
__tagtable_begin = .;
@ -86,6 +92,8 @@ SECTIONS
__stop___ex_table = .;
}
BUG_TABLE
RODATA
. = ALIGN(8192);
@ -126,7 +134,6 @@ SECTIONS
* thrown away, as cleanup code is never called unless it's a module.
*/
/DISCARD/ : {
*(.exit.text)
*(.exit.data)
*(.exitcall.exit)
}

31
arch/avr32/mach-at32ap/Kconfig Normal file
View File

@ -0,0 +1,31 @@
if PLATFORM_AT32AP
menu "Atmel AVR32 AP options"
choice
prompt "AT32AP7000 static memory bus width"
depends on CPU_AT32AP7000
default AP7000_16_BIT_SMC
help
Define the width of the AP7000 external static memory interface.
This is used to determine how to mangle the address and/or data
when doing little-endian port access.
The current code can only support a single external memory bus
width for all chip selects, excluding the flash (which is using
raw access and is thus not affected by any of this.)
config AP7000_32_BIT_SMC
bool "32 bit"
config AP7000_16_BIT_SMC
bool "16 bit"
config AP7000_8_BIT_SMC
bool "8 bit"
endchoice
endmenu
endif # PLATFORM_AT32AP

1
arch/avr32/mach-at32ap/Makefile
View File

@ -1,2 +1,3 @@
obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o
obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o

70
arch/avr32/mach-at32ap/at32ap7000.c
View File

@ -18,6 +18,7 @@
#include <asm/arch/sm.h>
#include "clock.h"
#include "hmatrix.h"
#include "pio.h"
#include "sm.h"
@ -416,7 +417,15 @@ struct platform_device at32_sm_device = {
.resource = sm_resource,
.num_resources = ARRAY_SIZE(sm_resource),
};
DEV_CLK(pclk, at32_sm, pbb, 0);
static struct clk at32_sm_pclk = {
.name = "pclk",
.dev = &at32_sm_device.dev,
.parent = &pbb_clk,
.mode = pbb_clk_mode,
.get_rate = pbb_clk_get_rate,
.users = 1,
.index = 0,
};
static struct resource intc0_resource[] = {
PBMEM(0xfff00400),
@ -442,6 +451,7 @@ static struct clk hramc_clk = {
.mode = hsb_clk_mode,
.get_rate = hsb_clk_get_rate,
.users = 1,
.index = 3,
};
static struct resource smc0_resource[] = {
@ -466,6 +476,57 @@ static struct clk pico_clk = {
.users = 1,
};
/* --------------------------------------------------------------------
* HMATRIX
* -------------------------------------------------------------------- */
static struct clk hmatrix_clk = {
.name = "hmatrix_clk",
.parent = &pbb_clk,
.mode = pbb_clk_mode,
.get_rate = pbb_clk_get_rate,
.index = 2,
.users = 1,
};
#define HMATRIX_BASE ((void __iomem *)0xfff00800)
#define hmatrix_readl(reg) \
__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
#define hmatrix_writel(reg,value) \
__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
/*
* Set bits in the HMATRIX Special Function Register (SFR) used by the
* External Bus Interface (EBI). This can be used to enable special
* features like CompactFlash support, NAND Flash support, etc. on
* certain chipselects.
*/
static inline void set_ebi_sfr_bits(u32 mask)
{
u32 sfr;
clk_enable(&hmatrix_clk);
sfr = hmatrix_readl(SFR4);
sfr |= mask;
hmatrix_writel(SFR4, sfr);
clk_disable(&hmatrix_clk);
}
/* --------------------------------------------------------------------
* System Timer/Counter (TC)
* -------------------------------------------------------------------- */
static struct resource at32_systc0_resource[] = {
PBMEM(0xfff00c00),
IRQ(22),
};
struct platform_device at32_systc0_device = {
.name = "systc",
.id = 0,
.resource = at32_systc0_resource,
.num_resources = ARRAY_SIZE(at32_systc0_resource),
};
DEV_CLK(pclk, at32_systc0, pbb, 3);
/* --------------------------------------------------------------------
* PIO
* -------------------------------------------------------------------- */
@ -514,6 +575,8 @@ void __init at32_add_system_devices(void)
platform_device_register(&smc0_device);
platform_device_register(&pdc_device);
platform_device_register(&at32_systc0_device);
platform_device_register(&pio0_device);
platform_device_register(&pio1_device);
platform_device_register(&pio2_device);
@ -950,6 +1013,7 @@ struct clk *at32_clock_list[] = {
&pbb_clk,
&at32_sm_pclk,
&at32_intc0_pclk,
&hmatrix_clk,
&ebi_clk,
&hramc_clk,
&smc0_pclk,
@ -962,6 +1026,7 @@ struct clk *at32_clock_list[] = {
&pio2_mck,
&pio3_mck,
&pio4_mck,
&at32_systc0_pclk,
&atmel_usart0_usart,
&atmel_usart1_usart,
&atmel_usart2_usart,
@ -1024,6 +1089,9 @@ void __init at32_clock_init(void)
for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
struct clk *clk = at32_clock_list[i];
if (clk->users == 0)
continue;
if (clk->mode == &cpu_clk_mode)
cpu_mask |= 1 << clk->index;
else if (clk->mode == &hsb_clk_mode)

182
arch/avr32/mach-at32ap/hmatrix.h Normal file
View File

@ -0,0 +1,182 @@
/*
* Register definitions for High-Speed Bus Matrix
*/
#ifndef __HMATRIX_H
#define __HMATRIX_H
/* HMATRIX register offsets */
#define HMATRIX_MCFG0 0x0000
#define HMATRIX_MCFG1 0x0004
#define HMATRIX_MCFG2 0x0008
#define HMATRIX_MCFG3 0x000c
#define HMATRIX_MCFG4 0x0010
#define HMATRIX_MCFG5 0x0014
#define HMATRIX_MCFG6 0x0018
#define HMATRIX_MCFG7 0x001c
#define HMATRIX_MCFG8 0x0020
#define HMATRIX_MCFG9 0x0024
#define HMATRIX_MCFG10 0x0028
#define HMATRIX_MCFG11 0x002c
#define HMATRIX_MCFG12 0x0030
#define HMATRIX_MCFG13 0x0034
#define HMATRIX_MCFG14 0x0038
#define HMATRIX_MCFG15 0x003c
#define HMATRIX_SCFG0 0x0040
#define HMATRIX_SCFG1 0x0044
#define HMATRIX_SCFG2 0x0048
#define HMATRIX_SCFG3 0x004c
#define HMATRIX_SCFG4 0x0050
#define HMATRIX_SCFG5 0x0054
#define HMATRIX_SCFG6 0x0058
#define HMATRIX_SCFG7 0x005c
#define HMATRIX_SCFG8 0x0060
#define HMATRIX_SCFG9 0x0064
#define HMATRIX_SCFG10 0x0068
#define HMATRIX_SCFG11 0x006c
#define HMATRIX_SCFG12 0x0070
#define HMATRIX_SCFG13 0x0074
#define HMATRIX_SCFG14 0x0078
#define HMATRIX_SCFG15 0x007c
#define HMATRIX_PRAS0 0x0080
#define HMATRIX_PRBS0 0x0084
#define HMATRIX_PRAS1 0x0088
#define HMATRIX_PRBS1 0x008c
#define HMATRIX_PRAS2 0x0090
#define HMATRIX_PRBS2 0x0094
#define HMATRIX_PRAS3 0x0098
#define HMATRIX_PRBS3 0x009c
#define HMATRIX_PRAS4 0x00a0
#define HMATRIX_PRBS4 0x00a4
#define HMATRIX_PRAS5 0x00a8
#define HMATRIX_PRBS5 0x00ac
#define HMATRIX_PRAS6 0x00b0
#define HMATRIX_PRBS6 0x00b4
#define HMATRIX_PRAS7 0x00b8
#define HMATRIX_PRBS7 0x00bc
#define HMATRIX_PRAS8 0x00c0
#define HMATRIX_PRBS8 0x00c4
#define HMATRIX_PRAS9 0x00c8
#define HMATRIX_PRBS9 0x00cc
#define HMATRIX_PRAS10 0x00d0
#define HMATRIX_PRBS10 0x00d4
#define HMATRIX_PRAS11 0x00d8
#define HMATRIX_PRBS11 0x00dc
#define HMATRIX_PRAS12 0x00e0
#define HMATRIX_PRBS12 0x00e4
#define HMATRIX_PRAS13 0x00e8
#define HMATRIX_PRBS13 0x00ec
#define HMATRIX_PRAS14 0x00f0
#define HMATRIX_PRBS14 0x00f4
#define HMATRIX_PRAS15 0x00f8
#define HMATRIX_PRBS15 0x00fc
#define HMATRIX_MRCR 0x0100
#define HMATRIX_SFR0 0x0110
#define HMATRIX_SFR1 0x0114
#define HMATRIX_SFR2 0x0118
#define HMATRIX_SFR3 0x011c
#define HMATRIX_SFR4 0x0120
#define HMATRIX_SFR5 0x0124
#define HMATRIX_SFR6 0x0128
#define HMATRIX_SFR7 0x012c
#define HMATRIX_SFR8 0x0130
#define HMATRIX_SFR9 0x0134
#define HMATRIX_SFR10 0x0138
#define HMATRIX_SFR11 0x013c
#define HMATRIX_SFR12 0x0140
#define HMATRIX_SFR13 0x0144
#define HMATRIX_SFR14 0x0148
#define HMATRIX_SFR15 0x014c
/* Bitfields in MCFGx */
#define HMATRIX_ULBT_OFFSET 0
#define HMATRIX_ULBT_SIZE 3
/* Bitfields in SCFGx */
#define HMATRIX_SLOT_CYCLE_OFFSET 0
#define HMATRIX_SLOT_CYCLE_SIZE 8
#define HMATRIX_DEFMSTR_TYPE_OFFSET 16
#define HMATRIX_DEFMSTR_TYPE_SIZE 2
#define HMATRIX_FIXED_DEFMSTR_OFFSET 18
#define HMATRIX_FIXED_DEFMSTR_SIZE 4
#define HMATRIX_ARBT_OFFSET 24
#define HMATRIX_ARBT_SIZE 2
/* Bitfields in PRASx */
#define HMATRIX_M0PR_OFFSET 0
#define HMATRIX_M0PR_SIZE 4
#define HMATRIX_M1PR_OFFSET 4
#define HMATRIX_M1PR_SIZE 4
#define HMATRIX_M2PR_OFFSET 8
#define HMATRIX_M2PR_SIZE 4
#define HMATRIX_M3PR_OFFSET 12
#define HMATRIX_M3PR_SIZE 4
#define HMATRIX_M4PR_OFFSET 16
#define HMATRIX_M4PR_SIZE 4
#define HMATRIX_M5PR_OFFSET 20
#define HMATRIX_M5PR_SIZE 4
#define HMATRIX_M6PR_OFFSET 24
#define HMATRIX_M6PR_SIZE 4
#define HMATRIX_M7PR_OFFSET 28
#define HMATRIX_M7PR_SIZE 4
/* Bitfields in PRBSx */
#define HMATRIX_M8PR_OFFSET 0
#define HMATRIX_M8PR_SIZE 4
#define HMATRIX_M9PR_OFFSET 4
#define HMATRIX_M9PR_SIZE 4
#define HMATRIX_M10PR_OFFSET 8
#define HMATRIX_M10PR_SIZE 4
#define HMATRIX_M11PR_OFFSET 12
#define HMATRIX_M11PR_SIZE 4
#define HMATRIX_M12PR_OFFSET 16
#define HMATRIX_M12PR_SIZE 4
#define HMATRIX_M13PR_OFFSET 20
#define HMATRIX_M13PR_SIZE 4
#define HMATRIX_M14PR_OFFSET 24
#define HMATRIX_M14PR_SIZE 4
#define HMATRIX_M15PR_OFFSET 28
#define HMATRIX_M15PR_SIZE 4
/* Bitfields in SFR4 */
#define HMATRIX_CS1A_OFFSET 1
#define HMATRIX_CS1A_SIZE 1
#define HMATRIX_CS3A_OFFSET 3
#define HMATRIX_CS3A_SIZE 1
#define HMATRIX_CS4A_OFFSET 4
#define HMATRIX_CS4A_SIZE 1
#define HMATRIX_CS5A_OFFSET 5
#define HMATRIX_CS5A_SIZE 1
#define HMATRIX_DBPUC_OFFSET 8
#define HMATRIX_DBPUC_SIZE 1
/* Constants for ULBT */
#define HMATRIX_ULBT_INFINITE 0
#define HMATRIX_ULBT_SINGLE 1
#define HMATRIX_ULBT_FOUR_BEAT 2
#define HMATRIX_ULBT_EIGHT_BEAT 3
#define HMATRIX_ULBT_SIXTEEN_BEAT 4
/* Constants for DEFMSTR_TYPE */
#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT 0
#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT 1
#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT 2
/* Constants for ARBT */
#define HMATRIX_ARBT_ROUND_ROBIN 0
#define HMATRIX_ARBT_FIXED_PRIORITY 1
/* Bit manipulation macros */
#define HMATRIX_BIT(name) \
(1 << HMATRIX_##name##_OFFSET)
#define HMATRIX_BF(name,value) \
(((value) & ((1 << HMATRIX_##name##_SIZE) - 1)) \
<< HMATRIX_##name##_OFFSET)
#define HMATRIX_BFEXT(name,value) \
(((value) >> HMATRIX_##name##_OFFSET) \
& ((1 << HMATRIX_##name##_SIZE) - 1))
#define HMATRIX_BFINS(name,value,old) \
(((old) & ~(((1 << HMATRIX_##name##_SIZE) - 1) \
<< HMATRIX_##name##_OFFSET)) \
| HMATRIX_BF(name,value))
#endif /* __HMATRIX_H */

23
arch/avr32/mach-at32ap/hsmc.c
View File

@ -75,12 +75,35 @@ int smc_set_configuration(int cs, const struct smc_config *config)
return -EINVAL;
}
switch (config->nwait_mode) {
case 0:
mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED);
break;
case 1:
mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED);
break;
case 2:
mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN);
break;
case 3:
mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY);
break;
default:
return -EINVAL;
}
if (config->tdf_cycles) {
mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles);
}
if (config->nrd_controlled)
mode |= HSMC_BIT(READ_MODE);
if (config->nwe_controlled)
mode |= HSMC_BIT(WRITE_MODE);
if (config->byte_write)
mode |= HSMC_BIT(BAT);
if (config->tdf_mode)
mode |= HSMC_BIT(TDF_MODE);
pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n",
cs, setup, pulse, cycle, mode);

218
arch/avr32/mach-at32ap/time-tc.c Normal file
View File

@ -0,0 +1,218 @@
/*
* Copyright (C) 2004-2007 Atmel Corporation
*
* Based on MIPS implementation arch/mips/kernel/time.c
* Copyright 2001 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/clk.h>
#include <linux/clocksource.h>
#include <linux/time.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel_stat.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/profile.h>
#include <linux/sysdev.h>
#include <linux/err.h>
#include <asm/div64.h>
#include <asm/sysreg.h>
#include <asm/io.h>
#include <asm/sections.h>
#include <asm/arch/time.h>
/* how many counter cycles in a jiffy? */
static u32 cycles_per_jiffy;
/* the count value for the next timer interrupt */
static u32 expirelo;
/* the I/O registers of the TC module */
static void __iomem *ioregs;
cycle_t read_cycle_count(void)
{
return (cycle_t)timer_read(ioregs, 0, CV);
}
struct clocksource clocksource_avr32 = {
.name = "avr32",
.rating = 342,
.read = read_cycle_count,
.mask = CLOCKSOURCE_MASK(16),
.shift = 16,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
static void avr32_timer_ack(void)
{
u16 count = expirelo;
/* Ack this timer interrupt and set the next one, use a u16
* variable so it will wrap around correctly */
count += cycles_per_jiffy;
expirelo = count;
timer_write(ioregs, 0, RC, expirelo);
/* Check to see if we have missed any timer interrupts */
count = timer_read(ioregs, 0, CV);
if ((count - expirelo) < 0x7fff) {
expirelo = count + cycles_per_jiffy;
timer_write(ioregs, 0, RC, expirelo);
}
}
u32 avr32_hpt_read(void)
{
return timer_read(ioregs, 0, CV);
}
static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk)
{
unsigned int cycles_max = (clocksource_avr32.mask + 1) / 2;
unsigned int divs[] = { 4, 8, 16, 32 };
int divs_size = sizeof(divs) / sizeof(*divs);
int i = 0;
unsigned long count_hz;
unsigned long shift;
unsigned long mult;
int clock_div = -1;
u64 tmp;
shift = clocksource_avr32.shift;
do {
count_hz = clk_get_rate(pclk) / divs[i];
mult = clocksource_hz2mult(count_hz, shift);
clocksource_avr32.mult = mult;
tmp = TICK_NSEC;
tmp <<= shift;
tmp += mult / 2;
do_div(tmp, mult);
cycles_per_jiffy = tmp;
} while (cycles_per_jiffy > cycles_max && ++i < divs_size);
clock_div = i + 1;
if (clock_div > divs_size) {
pr_debug("timer: could not calculate clock divider\n");
return -EFAULT;
}
/* Set the clock divider */
timer_write(ioregs, 0, CMR, TIMER_BF(CMR_TCCLKS, clock_div));
return 0;
}
int avr32_hpt_init(unsigned int count)
{
struct resource *regs;
struct clk *pclk;
int irq = -1;
int ret = 0;
ret = -ENXIO;
irq = platform_get_irq(&at32_systc0_device, 0);
if (irq < 0) {
pr_debug("timer: could not get irq\n");
goto out_error;
}
pclk = clk_get(&at32_systc0_device.dev, "pclk");
if (IS_ERR(pclk)) {
pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk));
goto out_error;
}
clk_enable(pclk);
regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0);
if (!regs) {
pr_debug("timer: could not get resource\n");
goto out_error_clk;
}
ioregs = ioremap(regs->start, regs->end - regs->start + 1);
if (!ioregs) {
pr_debug("timer: could not get ioregs\n");
goto out_error_clk;
}
ret = avr32_timer_calc_div_and_set_jiffies(pclk);
if (ret)
goto out_error_io;
ret = setup_irq(irq, &timer_irqaction);
if (ret) {
pr_debug("timer: could not request irq %d: %d\n",
irq, ret);
goto out_error_io;
}
expirelo = (timer_read(ioregs, 0, CV) / cycles_per_jiffy + 1)
* cycles_per_jiffy;
/* Enable clock and interrupts on RC compare */
timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_CLKEN));
timer_write(ioregs, 0, IER, TIMER_BIT(IER_CPCS));
/* Set cycles to first interrupt */
timer_write(ioregs, 0, RC, expirelo);
printk(KERN_INFO "timer: AT32AP system timer/counter at 0x%p irq %d\n",
ioregs, irq);
return 0;
out_error_io:
iounmap(ioregs);
out_error_clk:
clk_put(pclk);
out_error:
return ret;
}
int avr32_hpt_start(void)
{
timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_SWTRG));
return 0;
}
irqreturn_t timer_interrupt(int irq, void *dev_id)
{
unsigned int sr = timer_read(ioregs, 0, SR);
if (sr & TIMER_BIT(SR_CPCS)) {
/* ack timer interrupt and try to set next interrupt */
avr32_timer_ack();
/*
* Call the generic timer interrupt handler
*/
write_seqlock(&xtime_lock);
do_timer(1);
write_sequnlock(&xtime_lock);
/*
* In UP mode, we call local_timer_interrupt() to do profiling
* and process accounting.
*
* SMP is not supported yet.
*/
local_timer_interrupt(irq, dev_id);
return IRQ_HANDLED;
}
return IRQ_NONE;
}

116
arch/avr32/mm/fault.c
View File

@ -16,26 +16,8 @@
#include <asm/kdebug.h>
#include <asm/mmu_context.h>
#include <asm/sysreg.h>
#include <asm/uaccess.h>
#include <asm/tlb.h>
#ifdef DEBUG
static void dump_code(unsigned long pc)
{
char *p = (char *)pc;
char val;
int i;
printk(KERN_DEBUG "Code:");
for (i = 0; i < 16; i++) {
if (__get_user(val, p + i))
break;
printk(" %02x", val);
}
printk("\n");
}
#endif
#include <asm/uaccess.h>
#ifdef CONFIG_KPROBES
ATOMIC_NOTIFIER_HEAD(notify_page_fault_chain);
@ -68,17 +50,19 @@ static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
}
#endif
int exception_trace = 1;
/*
* This routine handles page faults. It determines the address and the
* problem, and then passes it off to one of the appropriate routines.
*
* ecr is the Exception Cause Register. Possible values are:
* 5: Page not found (instruction access)
* 6: Protection fault (instruction access)
* 12: Page not found (read access)
* 13: Page not found (write access)
* 14: Protection fault (read access)
* 15: Protection fault (write access)
* 15: Protection fault (read access)
* 16: Protection fault (write access)
* 20: Page not found (instruction access)
* 24: Page not found (read access)
* 28: Page not found (write access)
*/
asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
{
@ -88,7 +72,9 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
const struct exception_table_entry *fixup;
unsigned long address;
unsigned long page;
int writeaccess = 0;
int writeaccess;
long signr;
int code;
if (notify_page_fault(DIE_PAGE_FAULT, regs,
ecr, SIGSEGV) == NOTIFY_STOP)
@ -99,6 +85,9 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
tsk = current;
mm = tsk->mm;
signr = SIGSEGV;
code = SEGV_MAPERR;
/*
* If we're in an interrupt or have no user context, we must
* not take the fault...
@ -125,7 +114,9 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
* can handle it...
*/
good_area:
//pr_debug("good area: vm_flags = 0x%lx\n", vma->vm_flags);
code = SEGV_ACCERR;
writeaccess = 0;
switch (ecr) {
case ECR_PROTECTION_X:
case ECR_TLB_MISS_X:
@ -176,46 +167,24 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
* map. Fix it, but check if it's kernel or user first...
*/
bad_area:
pr_debug("Bad area [%s:%u]: addr %08lx, ecr %lu\n",
tsk->comm, tsk->pid, address, ecr);
up_read(&mm->mmap_sem);
if (user_mode(regs)) {
/* Hmm...we have to pass address and ecr somehow... */
/* tsk->thread.address = address;
tsk->thread.error_code = ecr; */
#ifdef DEBUG
show_regs(regs);
dump_code(regs->pc);
page = sysreg_read(PTBR);
printk("ptbr = %08lx", page);
if (page) {
page = ((unsigned long *)page)[address >> 22];
printk(" pgd = %08lx", page);
if (page & _PAGE_PRESENT) {
page &= PAGE_MASK;
address &= 0x003ff000;
page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT];
printk(" pte = %08lx\n", page);
}
}
#endif
pr_debug("Sending SIGSEGV to PID %d...\n",
tsk->pid);
force_sig(SIGSEGV, tsk);
if (exception_trace)
printk("%s%s[%d]: segfault at %08lx pc %08lx "
"sp %08lx ecr %lu\n",
is_init(tsk) ? KERN_EMERG : KERN_INFO,
tsk->comm, tsk->pid, address, regs->pc,
regs->sp, ecr);
_exception(SIGSEGV, regs, code, address);
return;
}
no_context:
pr_debug("No context\n");
/* Are we prepared to handle this kernel fault? */
fixup = search_exception_tables(regs->pc);
if (fixup) {
regs->pc = fixup->fixup;
pr_debug("Found fixup at %08lx\n", fixup->fixup);
return;
}
@ -230,7 +199,6 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
printk(KERN_ALERT
"Unable to handle kernel paging request");
printk(" at virtual address %08lx\n", address);
printk(KERN_ALERT "pc = %08lx\n", regs->pc);
page = sysreg_read(PTBR);
printk(KERN_ALERT "ptbr = %08lx", page);
@ -241,20 +209,20 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
page &= PAGE_MASK;
address &= 0x003ff000;
page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT];
printk(" pte = %08lx\n", page);
printk(" pte = %08lx", page);
}
}
die("\nOops", regs, ecr);
do_exit(SIGKILL);
printk("\n");
die("Kernel access of bad area", regs, signr);
return;
/*
* We ran out of memory, or some other thing happened to us
* that made us unable to handle the page fault gracefully.
*/
out_of_memory:
printk("Out of memory\n");
up_read(&mm->mmap_sem);
if (current->pid == 1) {
if (is_init(current)) {
yield();
down_read(&mm->mmap_sem);
goto survive;
@ -267,21 +235,20 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
do_sigbus:
up_read(&mm->mmap_sem);
/*
* Send a sigbus, regardless of whether we were in kernel or
* user mode.
*/
/* address, error_code, trap_no, ... */
#ifdef DEBUG
show_regs(regs);
dump_code(regs->pc);
#endif
pr_debug("Sending SIGBUS to PID %d...\n", tsk->pid);
force_sig(SIGBUS, tsk);
/* Kernel mode? Handle exceptions or die */
signr = SIGBUS;
code = BUS_ADRERR;
if (!user_mode(regs))
goto no_context;
if (exception_trace)
printk("%s%s[%d]: bus error at %08lx pc %08lx "
"sp %08lx ecr %lu\n",
is_init(tsk) ? KERN_EMERG : KERN_INFO,
tsk->comm, tsk->pid, address, regs->pc,
regs->sp, ecr);
_exception(SIGBUS, regs, BUS_ADRERR, address);
}
asmlinkage void do_bus_error(unsigned long addr, int write_access,
@ -292,8 +259,7 @@ asmlinkage void do_bus_error(unsigned long addr, int write_access,
addr, write_access ? "write" : "read");
printk(KERN_INFO "DTLB dump:\n");
dump_dtlb();
die("Bus Error", regs, write_access);
do_exit(SIGKILL);
die("Bus Error", regs, SIGKILL);
}
/*

238
arch/avr32/mm/init.c
View File

@ -10,11 +10,9 @@
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/init.h>
#include <linux/initrd.h>
#include <linux/mmzone.h>
#include <linux/bootmem.h>
#include <linux/pagemap.h>
#include <linux/pfn.h>
#include <linux/nodemask.h>
#include <asm/page.h>
@ -78,242 +76,6 @@ void show_mem(void)
printk ("%d pages swap cached\n", cached);
}
static void __init print_memory_map(const char *what,
struct tag_mem_range *mem)
{
printk ("%s:\n", what);
for (; mem; mem = mem->next) {
printk (" %08lx - %08lx\n",
(unsigned long)mem->addr,
(unsigned long)(mem->addr + mem->size));
}
}
#define MAX_LOWMEM HIGHMEM_START
#define MAX_LOWMEM_PFN PFN_DOWN(MAX_LOWMEM)
/*
* Sort a list of memory regions in-place by ascending address.
*
* We're using bubble sort because we only have singly linked lists
* with few elements.
*/
static void __init sort_mem_list(struct tag_mem_range **pmem)
{
int done;
struct tag_mem_range **a, **b;
if (!*pmem)
return;
do {
done = 1;
a = pmem, b = &(*pmem)->next;
while (*b) {
if ((*a)->addr > (*b)->addr) {
struct tag_mem_range *tmp;
tmp = (*b)->next;
(*b)->next = *a;
*a = *b;
*b = tmp;
done = 0;
}
a = &(*a)->next;
b = &(*a)->next;
}
} while (!done);
}
/*
* Find a free memory region large enough for storing the
* bootmem bitmap.
*/
static unsigned long __init
find_bootmap_pfn(const struct tag_mem_range *mem)
{
unsigned long bootmap_pages, bootmap_len;
unsigned long node_pages = PFN_UP(mem->size);
unsigned long bootmap_addr = mem->addr;
struct tag_mem_range *reserved = mem_reserved;
struct tag_mem_range *ramdisk = mem_ramdisk;
unsigned long kern_start = virt_to_phys(_stext);
unsigned long kern_end = virt_to_phys(_end);
bootmap_pages = bootmem_bootmap_pages(node_pages);
bootmap_len = bootmap_pages << PAGE_SHIFT;
/*
* Find a large enough region without reserved pages for
* storing the bootmem bitmap. We can take advantage of the
* fact that all lists have been sorted.
*
* We have to check explicitly reserved regions as well as the
* kernel image and any RAMDISK images...
*
* Oh, and we have to make sure we don't overwrite the taglist
* since we're going to use it until the bootmem allocator is
* fully up and running.
*/
while (1) {
if ((bootmap_addr < kern_end) &&
((bootmap_addr + bootmap_len) > kern_start))
bootmap_addr = kern_end;
while (reserved &&
(bootmap_addr >= (reserved->addr + reserved->size)))
reserved = reserved->next;
if (reserved &&
((bootmap_addr + bootmap_len) >= reserved->addr)) {
bootmap_addr = reserved->addr + reserved->size;
continue;
}
while (ramdisk &&
(bootmap_addr >= (ramdisk->addr + ramdisk->size)))
ramdisk = ramdisk->next;
if (!ramdisk ||
((bootmap_addr + bootmap_len) < ramdisk->addr))
break;
bootmap_addr = ramdisk->addr + ramdisk->size;
}
if ((PFN_UP(bootmap_addr) + bootmap_len) >= (mem->addr + mem->size))
return ~0UL;
return PFN_UP(bootmap_addr);
}
void __init setup_bootmem(void)
{
unsigned bootmap_size;
unsigned long first_pfn, bootmap_pfn, pages;
unsigned long max_pfn, max_low_pfn;
unsigned long kern_start = virt_to_phys(_stext);
unsigned long kern_end = virt_to_phys(_end);
unsigned node = 0;
struct tag_mem_range *bank, *res;
sort_mem_list(&mem_phys);
sort_mem_list(&mem_reserved);
print_memory_map("Physical memory", mem_phys);
print_memory_map("Reserved memory", mem_reserved);
nodes_clear(node_online_map);
if (mem_ramdisk) {
#ifdef CONFIG_BLK_DEV_INITRD
initrd_start = (unsigned long)__va(mem_ramdisk->addr);
initrd_end = initrd_start + mem_ramdisk->size;
print_memory_map("RAMDISK images", mem_ramdisk);
if (mem_ramdisk->next)
printk(KERN_WARNING
"Warning: Only the first RAMDISK image "
"will be used\n");
sort_mem_list(&mem_ramdisk);
#else
printk(KERN_WARNING "RAM disk image present, but "
"no initrd support in kernel!\n");
#endif
}
if (mem_phys->next)
printk(KERN_WARNING "Only using first memory bank\n");
for (bank = mem_phys; bank; bank = NULL) {
first_pfn = PFN_UP(bank->addr);
max_low_pfn = max_pfn = PFN_DOWN(bank->addr + bank->size);
bootmap_pfn = find_bootmap_pfn(bank);
if (bootmap_pfn > max_pfn)
panic("No space for bootmem bitmap!\n");
if (max_low_pfn > MAX_LOWMEM_PFN) {
max_low_pfn = MAX_LOWMEM_PFN;
#ifndef CONFIG_HIGHMEM
/*
* Lowmem is memory that can be addressed
* directly through P1/P2
*/
printk(KERN_WARNING
"Node %u: Only %ld MiB of memory will be used.\n",
node, MAX_LOWMEM >> 20);
printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
#else
#error HIGHMEM is not supported by AVR32 yet
#endif
}
/* Initialize the boot-time allocator with low memory only. */
bootmap_size = init_bootmem_node(NODE_DATA(node), bootmap_pfn,
first_pfn, max_low_pfn);
printk("Node %u: bdata = %p, bdata->node_bootmem_map = %p\n",
node, NODE_DATA(node)->bdata,
NODE_DATA(node)->bdata->node_bootmem_map);
/*
* Register fully available RAM pages with the bootmem
* allocator.
*/
pages = max_low_pfn - first_pfn;
free_bootmem_node (NODE_DATA(node), PFN_PHYS(first_pfn),
PFN_PHYS(pages));
/*
* Reserve space for the kernel image (if present in
* this node)...
*/
if ((kern_start >= PFN_PHYS(first_pfn)) &&
(kern_start < PFN_PHYS(max_pfn))) {
printk("Node %u: Kernel image %08lx - %08lx\n",
node, kern_start, kern_end);
reserve_bootmem_node(NODE_DATA(node), kern_start,
kern_end - kern_start);
}
/* ...the bootmem bitmap... */
reserve_bootmem_node(NODE_DATA(node),
PFN_PHYS(bootmap_pfn),
bootmap_size);
/* ...any RAMDISK images... */
for (res = mem_ramdisk; res; res = res->next) {
if (res->addr > PFN_PHYS(max_pfn))
break;
if (res->addr >= PFN_PHYS(first_pfn)) {
printk("Node %u: RAMDISK %08lx - %08lx\n",
node,
(unsigned long)res->addr,
(unsigned long)(res->addr + res->size));
reserve_bootmem_node(NODE_DATA(node),
res->addr, res->size);
}
}
/* ...and any other reserved regions. */
for (res = mem_reserved; res; res = res->next) {
if (res->addr > PFN_PHYS(max_pfn))
break;
if (res->addr >= PFN_PHYS(first_pfn)) {
printk("Node %u: Reserved %08lx - %08lx\n",
node,
(unsigned long)res->addr,
(unsigned long)(res->addr + res->size));
reserve_bootmem_node(NODE_DATA(node),
res->addr, res->size);
}
}
node_set_online(node);
}
}
/*
* paging_init() sets up the page tables
*

3
arch/ia64/hp/sim/simeth.c
View File

@ -427,7 +427,6 @@ make_new_skb(struct net_device *dev)
printk(KERN_NOTICE "%s: memory squeeze. dropping packet.\n", dev->name);
return NULL;
}
nskb->dev = dev;
skb_reserve(nskb, 2); /* Align IP on 16 byte boundaries */
@ -474,7 +473,7 @@ simeth_rx(struct net_device *dev)
* XXX Fix me
* Should really do a csum+copy here
*/
memcpy(skb->data, frame, len);
skb_copy_to_linear_data(skb, frame, len);
#endif
skb->protocol = eth_type_trans(skb, dev);

18
arch/ia64/sn/kernel/xpnet.c
View File

@ -233,7 +233,7 @@ xpnet_receive(partid_t partid, int channel, struct xpnet_message *msg)
"%lu)\n", skb->data, &msg->data,
(size_t) msg->embedded_bytes);
memcpy(skb->data, &msg->data, (size_t) msg->embedded_bytes);
skb_copy_to_linear_data(skb, &msg->data, (size_t)msg->embedded_bytes);
} else {
dev_dbg(xpnet, "transferring buffer to the skb->data area;\n\t"
"bte_copy(0x%p, 0x%p, %hu)\n", (void *)msg->buf_pa,
@ -264,17 +264,16 @@ xpnet_receive(partid_t partid, int channel, struct xpnet_message *msg)
dev_dbg(xpnet, "<skb->head=0x%p skb->data=0x%p skb->tail=0x%p "
"skb->end=0x%p skb->len=%d\n", (void *) skb->head,
(void *) skb->data, (void *) skb->tail, (void *) skb->end,
(void *)skb->data, skb_tail_pointer(skb), skb_end_pointer(skb),
skb->len);
skb->dev = xpnet_device;
skb->protocol = eth_type_trans(skb, xpnet_device);
skb->ip_summed = CHECKSUM_UNNECESSARY;
dev_dbg(xpnet, "passing skb to network layer; \n\tskb->head=0x%p "
"skb->data=0x%p skb->tail=0x%p skb->end=0x%p skb->len=%d\n",
(void *) skb->head, (void *) skb->data, (void *) skb->tail,
(void *) skb->end, skb->len);
(void *)skb->head, (void *)skb->data, skb_tail_pointer(skb),
skb_end_pointer(skb), skb->len);
xpnet_device->last_rx = jiffies;
@ -476,7 +475,7 @@ xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
dev_dbg(xpnet, ">skb->head=0x%p skb->data=0x%p skb->tail=0x%p "
"skb->end=0x%p skb->len=%d\n", (void *) skb->head,
(void *) skb->data, (void *) skb->tail, (void *) skb->end,
(void *)skb->data, skb_tail_pointer(skb), skb_end_pointer(skb),
skb->len);
@ -498,7 +497,7 @@ xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
/* get the beginning of the first cacheline and end of last */
start_addr = ((u64) skb->data & ~(L1_CACHE_BYTES - 1));
end_addr = L1_CACHE_ALIGN((u64) skb->tail);
end_addr = L1_CACHE_ALIGN((u64)skb_tail_pointer(skb));
/* calculate how many bytes to embed in the XPC message */
embedded_bytes = 0;
@ -567,14 +566,15 @@ xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
msg->version = XPNET_VERSION_EMBED;
dev_dbg(xpnet, "calling memcpy(0x%p, 0x%p, 0x%lx)\n",
&msg->data, skb->data, (size_t) embedded_bytes);
memcpy(&msg->data, skb->data, (size_t) embedded_bytes);
skb_copy_from_linear_data(skb, &msg->data,
(size_t)embedded_bytes);
} else {
msg->version = XPNET_VERSION;
}
msg->magic = XPNET_MAGIC;
msg->size = end_addr - start_addr;
msg->leadin_ignore = (u64) skb->data - start_addr;
msg->tailout_ignore = end_addr - (u64) skb->tail;
msg->tailout_ignore = end_addr - (u64)skb_tail_pointer(skb);
msg->buf_pa = __pa(start_addr);
dev_dbg(xpnet, "sending XPC message to %d:%d\nmsg->buf_pa="

27
arch/mips/Kconfig
View File

@ -10,7 +10,6 @@ menu "Machine selection"
config ZONE_DMA
bool
default y
choice
prompt "System type"
@ -165,7 +164,7 @@ config MIPS_COBALT
select HW_HAS_PCI
select I8259
select IRQ_CPU
select MIPS_GT64111
select PCI_GT64XXX_PCI0
select SYS_HAS_CPU_NEVADA
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
@ -207,7 +206,7 @@ config MIPS_EV64120
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_GT64120
select PCI_GT64XXX_PCI0
select SYS_HAS_CPU_R5000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
@ -245,7 +244,7 @@ config LASAT
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select HW_HAS_PCI
select MIPS_GT64120
select PCI_GT64XXX_PCI0
select MIPS_NILE4
select R5000_CPU_SCACHE
select SYS_HAS_CPU_R5000
@ -263,7 +262,7 @@ config MIPS_ATLAS
select HW_HAS_PCI
select MIPS_BOARDS_GEN
select MIPS_BONITO64
select MIPS_GT64120
select PCI_GT64XXX_PCI0
select MIPS_MSC
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
@ -296,7 +295,7 @@ config MIPS_MALTA
select MIPS_BOARDS_GEN
select MIPS_BONITO64
select MIPS_CPU_SCACHE
select MIPS_GT64120
select PCI_GT64XXX_PCI0
select MIPS_MSC
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
@ -340,7 +339,7 @@ config WR_PPMC
select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_GT64120
select PCI_GT64XXX_PCI0
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
@ -398,7 +397,7 @@ config MOMENCO_OCELOT
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
select MIPS_GT64120
select PCI_GT64XXX_PCI0
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM7000
@ -501,10 +500,8 @@ config DDB5477
ether port USB, AC97, PCI, etc.
config MACH_VR41XX
bool "NEC VR41XX-based machines"
bool "NEC VR4100 series based machines"
select SYS_HAS_CPU_VR41XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select GENERIC_HARDIRQS_NO__DO_IRQ
config PMC_YOSEMITE
@ -779,6 +776,7 @@ config TOSHIBA_JMR3927
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_BIG_ENDIAN
select TOSHIBA_BOARDS
select GENERIC_HARDIRQS_NO__DO_IRQ
config TOSHIBA_RBTX4927
bool "Toshiba TBTX49[23]7 board"
@ -922,6 +920,7 @@ config SYS_HAS_EARLY_PRINTK
config GENERIC_ISA_DMA
bool
select ZONE_DMA
config I8259
bool
@ -945,6 +944,7 @@ config MIPS_DISABLE_OBSOLETE_IDE
config GENERIC_ISA_DMA_SUPPORT_BROKEN
bool
select ZONE_DMA
#
# Endianess selection. Sufficiently obscure so many users don't know what to
@ -999,10 +999,7 @@ config DDB5XXX_COMMON
config MIPS_BOARDS_GEN
bool
config MIPS_GT64111
bool
config MIPS_GT64120
config PCI_GT64XXX_PCI0
bool
config MIPS_TX3927

6
arch/mips/Makefile
View File

@ -530,25 +530,29 @@ cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
#
# Sibyte SB1250 SOC
# Sibyte SB1250/BCM1480 SOC
#
# This is a LIB so that it links at the end, and initcalls are later
# the sequence; but it is built as an object so that modules don't get
# removed (as happens, even if they have __initcall/module_init)
#
core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/
cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/
cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/
cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/
cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL

2
arch/mips/basler/excite/excite_setup.c
View File

@ -63,7 +63,7 @@ volatile void __iomem * const ocd_base = (void *) (EXCITE_ADDR_OCD);
volatile void __iomem * const titan_base = (void *) (EXCITE_ADDR_TITAN);
/* Protect access to shared GPI registers */
spinlock_t titan_lock = SPIN_LOCK_UNLOCKED;
DEFINE_SPINLOCK(titan_lock);
int titan_irqflags;

1
arch/mips/cobalt/Makefile
View File

@ -4,5 +4,6 @@
obj-y := irq.o reset.o setup.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_EARLY_PRINTK) += console.o
obj-$(CONFIG_MTD_PHYSMAP) += mtd.o

8
arch/mips/cobalt/console.c
View File

@ -1,13 +1,11 @@
/*
* (C) P. Horton 2006
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/console.h>
#include <linux/serial_reg.h>
#include <asm/addrspace.h>
#include <asm/mach-cobalt/cobalt.h>
#include <cobalt.h>
void prom_putchar(char c)
{

2
arch/mips/cobalt/irq.c
View File

@ -17,7 +17,7 @@
#include <asm/irq_cpu.h>
#include <asm/gt64120.h>
#include <asm/mach-cobalt/cobalt.h>
#include <cobalt.h>
/*
* We have two types of interrupts that we handle, ones that come in through

47
arch/mips/cobalt/pci.c Normal file
View File

@ -0,0 +1,47 @@
/*
* Register PCI controller.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
*
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/gt64120.h>
extern struct pci_ops gt64xxx_pci0_ops;
static struct resource cobalt_mem_resource = {
.start = GT_DEF_PCI0_MEM0_BASE,
.end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
.name = "PCI memory",
.flags = IORESOURCE_MEM,
};
static struct resource cobalt_io_resource = {
.start = 0x1000,
.end = GT_DEF_PCI0_IO_SIZE - 1,
.name = "PCI I/O",
.flags = IORESOURCE_IO,
};
static struct pci_controller cobalt_pci_controller = {
.pci_ops = &gt64xxx_pci0_ops,
.mem_resource = &cobalt_mem_resource,
.io_resource = &cobalt_io_resource,
.io_offset = 0 - GT_DEF_PCI0_IO_BASE,
};
static int __init cobalt_pci_init(void)
{
register_pci_controller(&cobalt_pci_controller);
return 0;
}
arch_initcall(cobalt_pci_init);

11
arch/mips/cobalt/reset.c
View File

@ -8,15 +8,12 @@
* Copyright (C) 1995, 1996, 1997 by Ralf Baechle
* Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
*/
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/cacheflush.h>
#include <linux/jiffies.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/mipsregs.h>
#include <asm/mach-cobalt/cobalt.h>
#include <cobalt.h>
void cobalt_machine_halt(void)
{

32
arch/mips/cobalt/setup.c
View File

@ -19,12 +19,10 @@
#include <asm/bootinfo.h>
#include <asm/time.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/gt64120.h>
#include <asm/mach-cobalt/cobalt.h>
#include <cobalt.h>
extern void cobalt_machine_restart(char *command);
extern void cobalt_machine_halt(void);
@ -63,22 +61,6 @@ void __init plat_timer_setup(struct irqaction *irq)
GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS));
}
extern struct pci_ops gt64111_pci_ops;
static struct resource cobalt_mem_resource = {
.start = GT_DEF_PCI0_MEM0_BASE,
.end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
.name = "PCI memory",
.flags = IORESOURCE_MEM
};
static struct resource cobalt_io_resource = {
.start = 0x1000,
.end = 0xffff,
.name = "PCI I/O",
.flags = IORESOURCE_IO
};
/*
* Cobalt doesn't have PS/2 keyboard/mouse interfaces,
* keyboard conntroller is never used.
@ -111,14 +93,6 @@ static struct resource cobalt_reserved_resources[] = {
},
};
static struct pci_controller cobalt_pci_controller = {
.pci_ops = &gt64111_pci_ops,
.mem_resource = &cobalt_mem_resource,
.mem_offset = 0,
.io_resource = &cobalt_io_resource,
.io_offset = 0 - GT_DEF_PCI0_IO_BASE,
};
void __init plat_mem_setup(void)
{
static struct uart_port uart;
@ -146,10 +120,6 @@ void __init plat_mem_setup(void)
printk("Cobalt board ID: %d\n", cobalt_board_id);
#ifdef CONFIG_PCI
register_pci_controller(&cobalt_pci_controller);
#endif
if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
#ifdef CONFIG_SERIAL_8250
uart.line = 0;

254
arch/mips/configs/jmr3927_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20
# Tue Feb 20 21:47:34 2007
# Linux kernel version: 2.6.21-rc3
# Thu Mar 15 00:40:40 2007
#
CONFIG_MIPS=y
@ -70,7 +70,7 @@ CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_TIME=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_BIG_ENDIAN=y
@ -138,12 +138,12 @@ CONFIG_ZONE_DMA_FLAG=1
# CONFIG_HZ_48 is not set
# CONFIG_HZ_100 is not set
# CONFIG_HZ_128 is not set
# CONFIG_HZ_250 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_256 is not set
CONFIG_HZ_1000=y
# CONFIG_HZ_1000 is not set
# CONFIG_HZ_1024 is not set
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_HZ=1000
CONFIG_HZ=250
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
@ -175,14 +175,15 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_RELAY=y
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
@ -217,11 +218,11 @@ CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_DEFAULT_IOSCHED="cfq"
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
@ -233,12 +234,10 @@ CONFIG_MMU=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
#
# Executable file formats
@ -250,10 +249,7 @@ CONFIG_TRAD_SIGNALS=y
#
# Power management options
#
CONFIG_PM=y
# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
# CONFIG_PM is not set
#
# Networking
@ -267,12 +263,7 @@ CONFIG_NET=y
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
CONFIG_XFRM_USER=y
# CONFIG_XFRM_SUB_POLICY is not set
CONFIG_XFRM_MIGRATE=y
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
@ -290,19 +281,18 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
CONFIG_TCP_MD5SIG=y
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_NETWORK_SECMARK=y
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
#
@ -343,13 +333,7 @@ CONFIG_NETWORK_SECMARK=y
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_IEEE80211=y
# CONFIG_IEEE80211_DEBUG is not set
CONFIG_IEEE80211_CRYPT_WEP=y
CONFIG_IEEE80211_CRYPT_CCMP=y
CONFIG_IEEE80211_SOFTMAC=y
# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
CONFIG_WIRELESS_EXT=y
# CONFIG_IEEE80211 is not set
#
# Device Drivers
@ -360,14 +344,12 @@ CONFIG_WIRELESS_EXT=y
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
@ -396,16 +378,13 @@ CONFIG_PROC_EVENTS=y
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CDROM_PKTCDVD=y
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
CONFIG_ATA_OVER_ETH=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
CONFIG_SGI_IOC4=y
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
#
@ -416,7 +395,7 @@ CONFIG_SGI_IOC4=y
#
# SCSI device support
#
CONFIG_RAID_ATTRS=y
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_NETLINK is not set
@ -462,26 +441,13 @@ CONFIG_NETDEVICES=y
#
# PHY device support
#
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
CONFIG_MARVELL_PHY=y
CONFIG_DAVICOM_PHY=y
CONFIG_QSEMI_PHY=y
CONFIG_LXT_PHY=y
CONFIG_CICADA_PHY=y
CONFIG_VITESSE_PHY=y
CONFIG_SMSC_PHY=y
# CONFIG_BROADCOM_PHY is not set
# CONFIG_FIXED_PHY is not set
# CONFIG_PHYLIB is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
CONFIG_MII=y
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
@ -493,7 +459,27 @@ CONFIG_NET_ETHERNET=y
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
CONFIG_TC35815=y
# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
# CONFIG_E100 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_SC92031 is not set
#
# Ethernet (1000 Mbit)
@ -509,20 +495,21 @@ CONFIG_NET_ETHERNET=y
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
CONFIG_QLA3XXX=y
# CONFIG_QLA3XXX is not set
# CONFIG_ATL1 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
CONFIG_CHELSIO_T3=y
# CONFIG_CHELSIO_T3 is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
CONFIG_NETXEN_NIC=y
# CONFIG_NETXEN_NIC is not set
#
# Token Ring devices
@ -566,10 +553,7 @@ CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
@ -587,21 +571,13 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_LIBPS2 is not set
CONFIG_SERIO_RAW=y
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_VT is not set
CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_COMPUTONE is not set
# CONFIG_ROCKETPORT is not set
@ -609,7 +585,7 @@ CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_DIGIEPCA is not set
# CONFIG_MOXA_INTELLIO is not set
# CONFIG_MOXA_SMARTIO is not set
CONFIG_MOXA_SMARTIO_NEW=y
# CONFIG_MOXA_SMARTIO_NEW is not set
# CONFIG_ISI is not set
# CONFIG_SYNCLINKMP is not set
# CONFIG_SYNCLINK_GT is not set
@ -629,11 +605,12 @@ CONFIG_MOXA_SMARTIO_NEW=y
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_TXX9=y
CONFIG_HAS_TXX9_SERIAL=y
CONFIG_SERIAL_TXX9_NR_UARTS=6
# CONFIG_SERIAL_TXX9_CONSOLE is not set
# CONFIG_SERIAL_TXX9_STDSERIAL is not set
CONFIG_SERIAL_TXX9_CONSOLE=y
CONFIG_SERIAL_TXX9_STDSERIAL=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_UNIX98_PTYS is not set
CONFIG_LEGACY_PTYS=y
@ -684,6 +661,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
@ -697,51 +679,8 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# Graphics support
#
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FB=y
# CONFIG_FB_CFB_FILLRECT is not set
# CONFIG_FB_CFB_COPYAREA is not set
# CONFIG_FB_CFB_IMAGEBLIT is not set
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
# CONFIG_FB_ASILIANT is not set
# CONFIG_FB_IMSTT is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_NVIDIA is not set
# CONFIG_FB_RIVA is not set
# CONFIG_FB_MATROX is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_ATY is not set
# CONFIG_FB_S3 is not set
# CONFIG_FB_SAVAGE is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_SMIVGX is not set
# CONFIG_FB_TRIDENT is not set
# CONFIG_FB_VIRTUAL is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE is not set
#
# Logo configuration
#
# CONFIG_LOGO is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_FB is not set
#
# Sound
@ -864,7 +803,7 @@ CONFIG_INOTIFY_USER=y
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
CONFIG_FUSE_FS=y
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
@ -889,14 +828,13 @@ CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_CONFIGFS_FS=y
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
@ -944,10 +882,7 @@ CONFIG_MSDOS_PARTITION=y
#
# Distributed Lock Manager
#
CONFIG_DLM=y
CONFIG_DLM_TCP=y
# CONFIG_DLM_SCTP is not set
# CONFIG_DLM_DEBUG is not set
# CONFIG_DLM is not set
#
# Profiling support
@ -972,65 +907,22 @@ CONFIG_CMDLINE=""
#
# Security options
#
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=y
CONFIG_CRYPTO_TGR192=y
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=y
CONFIG_CRYPTO_LRW=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_FCRYPT=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
CONFIG_CRYPTO_SERPENT=y
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_CAST5=y
CONFIG_CRYPTO_CAST6=y
CONFIG_CRYPTO_TEA=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_KHAZAD=y
CONFIG_CRYPTO_ANUBIS=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CAMELLIA=y
#
# Hardware crypto devices
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
CONFIG_CRC16=y
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
CONFIG_LIBCRC32C=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y

1540
arch/mips/configs/pnx8550-v2pci_defconfig
View File

File diff suppressed because it is too large Load Diff

4
arch/mips/gt64120/wrppmc/pci.c
View File

@ -13,7 +13,7 @@
#include <linux/kernel.h>
#include <asm/gt64120.h>
extern struct pci_ops gt64120_pci_ops;
extern struct pci_ops gt64xxx_pci0_ops;
static struct resource pci0_io_resource = {
.name = "pci_0 io",
@ -30,7 +30,7 @@ static struct resource pci0_mem_resource = {
};
static struct pci_controller hose_0 = {
.pci_ops = &gt64120_pci_ops,
.pci_ops = &gt64xxx_pci0_ops,
.io_resource = &pci0_io_resource,
.mem_resource = &pci0_mem_resource,
};

12
arch/mips/jmr3927/common/prom.c
View File

@ -41,16 +41,6 @@
#include <asm/bootinfo.h>
extern int prom_argc;
extern char **prom_argv, **prom_envp;
typedef struct
{
char *name;
/* char *val; */
}t_env_var;
char * __init prom_getcmdline(void)
{
return &(arcs_cmdline[0]);
@ -60,6 +50,8 @@ void __init prom_init_cmdline(void)
{
char *cp;
int actr;
int prom_argc = fw_arg0;
char **prom_argv = (char **) fw_arg1;
actr = 1; /* Always ignore argv[0] */

122
arch/mips/jmr3927/common/puts.c
View File

@ -32,137 +32,29 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
#include <asm/jmr3927/txx927.h>
#include <asm/jmr3927/tx3927.h>
#include <asm/jmr3927/jmr3927.h>
#define TIMEOUT 0xffffff
#define SLOW_DOWN
static const char digits[16] = "0123456789abcdef";
#ifdef SLOW_DOWN
#define slow_down() { int k; for (k=0; k<10000; k++); }
#else
#define slow_down()
#endif
void
putch(const unsigned char c)
prom_putchar(char c)
{
int i = 0;
do {
slow_down();
i++;
if (i>TIMEOUT) {
if (i>TIMEOUT)
break;
}
} while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
tx3927_sioptr(1)->tfifo = c;
return;
}
unsigned char getch(void)
{
int i = 0;
int dicr;
char c;
/* diable RX int. */
dicr = tx3927_sioptr(1)->dicr;
tx3927_sioptr(1)->dicr = 0;
do {
slow_down();
i++;
if (i>TIMEOUT) {
break;
}
} while (tx3927_sioptr(1)->disr & TXx927_SIDISR_UVALID)
;
c = tx3927_sioptr(1)->rfifo;
/* clear RX int. status */
tx3927_sioptr(1)->disr &= ~TXx927_SIDISR_RDIS;
/* enable RX int. */
tx3927_sioptr(1)->dicr = dicr;
return c;
}
void
do_jmr3927_led_set(char n)
puts(const char *cp)
{
/* and with current leds */
jmr3927_led_and_set(n);
}
void
puts(unsigned char *cp)
{
int i = 0;
while (*cp) {
do {
slow_down();
i++;
if (i>TIMEOUT) {
break;
}
} while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
tx3927_sioptr(1)->tfifo = *cp++;
}
putch('\r');
putch('\n');
}
void
fputs(unsigned char *cp)
{
int i = 0;
while (*cp) {
do {
slow_down();
i++;
if (i>TIMEOUT) {
break;
}
} while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
tx3927_sioptr(1)->tfifo = *cp++;
}
}
void
put64(uint64_t ul)
{
int cnt;
unsigned ch;
cnt = 16; /* 16 nibbles in a 64 bit long */
putch('0');
putch('x');
do {
cnt--;
ch = (unsigned char)(ul >> cnt * 4) & 0x0F;
putch(digits[ch]);
} while (cnt > 0);
}
void
put32(unsigned u)
{
int cnt;
unsigned ch;
cnt = 8; /* 8 nibbles in a 32 bit long */
putch('0');
putch('x');
do {
cnt--;
ch = (unsigned char)(u >> cnt * 4) & 0x0F;
putch(digits[ch]);
} while (cnt > 0);
while (*cp)
prom_putchar(*cp++);
prom_putchar('\r');
prom_putchar('\n');
}

1
arch/mips/jmr3927/rbhma3100/Makefile
View File

@ -3,5 +3,4 @@
#
obj-y += init.o irq.o setup.o
obj-$(CONFIG_RUNTIME_DEBUG) += debug.o
obj-$(CONFIG_KGDB) += kgdb_io.o

16
arch/mips/jmr3927/rbhma3100/init.c
View File

@ -28,20 +28,10 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/jmr3927/jmr3927.h>
int prom_argc;
char **prom_argv, **prom_envp;
extern void __init prom_init_cmdline(void);
extern char *prom_getenv(char *envname);
unsigned long mips_nofpu = 0;
const char *get_system_type(void)
{
@ -52,7 +42,7 @@ const char *get_system_type(void)
;
}
extern void puts(unsigned char *cp);
extern void puts(const char *cp);
void __init prom_init(void)
{
@ -61,10 +51,6 @@ void __init prom_init(void)
if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
puts("Warning: TX3927 TLB off\n");
#endif
prom_argc = fw_arg0;
prom_argv = (char **) fw_arg1;
prom_envp = (char **) fw_arg2;
mips_machgroup = MACH_GROUP_TOSHIBA;
#ifdef CONFIG_TOSHIBA_JMR3927

312
arch/mips/jmr3927/rbhma3100/irq.c
View File

@ -30,53 +30,21 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/irq.h>
#include <linux/kernel_stat.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/bitops.h>
#include <asm/irq_regs.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/ptrace.h>
#include <asm/processor.h>
#include <asm/jmr3927/irq.h>
#include <asm/debug.h>
#include <asm/jmr3927/jmr3927.h>
#if JMR3927_IRQ_END > NR_IRQS
#error JMR3927_IRQ_END > NR_IRQS
#endif
struct tb_irq_space* tb_irq_spaces;
static int jmr3927_irq_base = -1;
#ifdef CONFIG_PCI
static int jmr3927_gen_iack(void)
{
/* generate ACK cycle */
#ifdef __BIG_ENDIAN
return (tx3927_pcicptr->iiadp >> 24) & 0xff;
#else
return tx3927_pcicptr->iiadp & 0xff;
#endif
}
#endif
#define irc_dlevel 0
#define irc_elevel 1
@ -87,89 +55,24 @@ static unsigned char irc_level[TX3927_NUM_IR] = {
6, 6, 6 /* TMR */
};
static void jmr3927_irq_disable(unsigned int irq_nr);
static void jmr3927_irq_enable(unsigned int irq_nr);
static void jmr3927_irq_ack(unsigned int irq)
{
if (irq == JMR3927_IRQ_IRC_TMR0)
jmr3927_tmrptr->tisr = 0; /* ack interrupt */
jmr3927_irq_disable(irq);
}
static void jmr3927_irq_end(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
jmr3927_irq_enable(irq);
}
static void jmr3927_irq_disable(unsigned int irq_nr)
{
struct tb_irq_space* sp;
for (sp = tb_irq_spaces; sp; sp = sp->next) {
if (sp->start_irqno <= irq_nr &&
irq_nr < sp->start_irqno + sp->nr_irqs) {
if (sp->mask_func)
sp->mask_func(irq_nr - sp->start_irqno,
sp->space_id);
break;
}
}
}
static void jmr3927_irq_enable(unsigned int irq_nr)
{
struct tb_irq_space* sp;
for (sp = tb_irq_spaces; sp; sp = sp->next) {
if (sp->start_irqno <= irq_nr &&
irq_nr < sp->start_irqno + sp->nr_irqs) {
if (sp->unmask_func)
sp->unmask_func(irq_nr - sp->start_irqno,
sp->space_id);
break;
}
}
}
/*
* CP0_STATUS is a thread's resource (saved/restored on context switch).
* So disable_irq/enable_irq MUST handle IOC/ISAC/IRC registers.
* So disable_irq/enable_irq MUST handle IOC/IRC registers.
*/
static void mask_irq_isac(int irq_nr, int space_id)
{
/* 0: mask */
unsigned char imask =
jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR);
unsigned int bit = 1 << irq_nr;
jmr3927_isac_reg_out(imask & ~bit, JMR3927_ISAC_INTM_ADDR);
/* flush write buffer */
(void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
}
static void unmask_irq_isac(int irq_nr, int space_id)
{
/* 0: mask */
unsigned char imask = jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR);
unsigned int bit = 1 << irq_nr;
jmr3927_isac_reg_out(imask | bit, JMR3927_ISAC_INTM_ADDR);
/* flush write buffer */
(void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
}
static void mask_irq_ioc(int irq_nr, int space_id)
static void mask_irq_ioc(unsigned int irq)
{
/* 0: mask */
unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
unsigned int bit = 1 << irq_nr;
jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR);
/* flush write buffer */
(void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
}
static void unmask_irq_ioc(int irq_nr, int space_id)
static void unmask_irq_ioc(unsigned int irq)
{
/* 0: mask */
unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
unsigned int bit = 1 << irq_nr;
jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR);
@ -177,8 +80,9 @@ static void unmask_irq_ioc(int irq_nr, int space_id)
(void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
}
static void mask_irq_irc(int irq_nr, int space_id)
static void mask_irq_irc(unsigned int irq)
{
unsigned int irq_nr = irq - JMR3927_IRQ_IRC;
volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2];
if (irq_nr & 1)
*ilrp = (*ilrp & 0x00ff) | (irc_dlevel << 8);
@ -191,8 +95,9 @@ static void mask_irq_irc(int irq_nr, int space_id)
(void)tx3927_ircptr->ssr;
}
static void unmask_irq_irc(int irq_nr, int space_id)
static void unmask_irq_irc(unsigned int irq)
{
unsigned int irq_nr = irq - JMR3927_IRQ_IRC;
volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2];
if (irq_nr & 1)
*ilrp = (*ilrp & 0x00ff) | (irc_level[irq_nr] << 8);
@ -203,98 +108,14 @@ static void unmask_irq_irc(int irq_nr, int space_id)
tx3927_ircptr->imr = irc_elevel;
}
struct tb_irq_space jmr3927_isac_irqspace = {
.next = NULL,
.start_irqno = JMR3927_IRQ_ISAC,
nr_irqs : JMR3927_NR_IRQ_ISAC,
.mask_func = mask_irq_isac,
.unmask_func = unmask_irq_isac,
.name = "ISAC",
.space_id = 0,
can_share : 0
};
struct tb_irq_space jmr3927_ioc_irqspace = {
.next = NULL,
.start_irqno = JMR3927_IRQ_IOC,
nr_irqs : JMR3927_NR_IRQ_IOC,
.mask_func = mask_irq_ioc,
.unmask_func = unmask_irq_ioc,
.name = "IOC",
.space_id = 0,
can_share : 1
};
struct tb_irq_space jmr3927_irc_irqspace = {
.next = NULL,
.start_irqno = JMR3927_IRQ_IRC,
.nr_irqs = JMR3927_NR_IRQ_IRC,
.mask_func = mask_irq_irc,
.unmask_func = unmask_irq_irc,
.name = "on-chip",
.space_id = 0,
.can_share = 0
};
#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
static int tx_branch_likely_bug_count = 0;
static int have_tx_branch_likely_bug = 0;
static void tx_branch_likely_bug_fixup(void)
{
struct pt_regs *regs = get_irq_regs();
/* TX39/49-BUG: Under this condition, the insn in delay slot
of the branch likely insn is executed (not nullified) even
the branch condition is false. */
if (!have_tx_branch_likely_bug)
return;
if ((regs->cp0_epc & 0xfff) == 0xffc &&
KSEGX(regs->cp0_epc) != KSEG0 &&
KSEGX(regs->cp0_epc) != KSEG1) {
unsigned int insn = *(unsigned int*)(regs->cp0_epc - 4);
/* beql,bnel,blezl,bgtzl */
/* bltzl,bgezl,blezall,bgezall */
/* bczfl, bcztl */
if ((insn & 0xf0000000) == 0x50000000 ||
(insn & 0xfc0e0000) == 0x04020000 ||
(insn & 0xf3fe0000) == 0x41020000) {
regs->cp0_epc -= 4;
tx_branch_likely_bug_count++;
printk(KERN_INFO
"fix branch-likery bug in %s (insn %08x)\n",
current->comm, insn);
}
}
}
#endif
static void jmr3927_spurious(void)
{
struct pt_regs * regs = get_irq_regs();
#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
tx_branch_likely_bug_fixup();
#endif
printk(KERN_WARNING "spurious interrupt (cause 0x%lx, pc 0x%lx, ra 0x%lx).\n",
regs->cp0_cause, regs->cp0_epc, regs->regs[31]);
}
asmlinkage void plat_irq_dispatch(void)
{
struct pt_regs * regs = get_irq_regs();
unsigned long cp0_cause = read_c0_cause();
int irq;
#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
tx_branch_likely_bug_fixup();
#endif
if ((regs->cp0_cause & CAUSEF_IP7) == 0) {
#if 0
jmr3927_spurious();
#endif
if ((cp0_cause & CAUSEF_IP7) == 0)
return;
}
irq = (regs->cp0_cause >> CAUSEB_IP2) & 0x0f;
irq = (cp0_cause >> CAUSEB_IP2) & 0x0f;
do_IRQ(irq + JMR3927_IRQ_IRC);
}
@ -317,35 +138,6 @@ static struct irqaction ioc_action = {
jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL,
};
static irqreturn_t jmr3927_isac_interrupt(int irq, void *dev_id)
{
unsigned char istat = jmr3927_isac_reg_in(JMR3927_ISAC_INTS2_ADDR);
int i;
for (i = 0; i < JMR3927_NR_IRQ_ISAC; i++) {
if (istat & (1 << i)) {
irq = JMR3927_IRQ_ISAC + i;
do_IRQ(irq);
}
}
return IRQ_HANDLED;
}
static struct irqaction isac_action = {
jmr3927_isac_interrupt, 0, CPU_MASK_NONE, "ISAC", NULL, NULL,
};
static irqreturn_t jmr3927_isaerr_interrupt(int irq, void *dev_id)
{
printk(KERN_WARNING "ISA error interrupt (irq 0x%x).\n", irq);
return IRQ_HANDLED;
}
static struct irqaction isaerr_action = {
jmr3927_isaerr_interrupt, 0, CPU_MASK_NONE, "ISA error", NULL, NULL,
};
static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
{
printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq);
@ -358,54 +150,19 @@ static struct irqaction pcierr_action = {
jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL,
};
int jmr3927_ether1_irq = 0;
void jmr3927_irq_init(u32 irq_base);
static void __init jmr3927_irq_init(void);
void __init arch_init_irq(void)
{
/* look for io board's presence */
int have_isac = jmr3927_have_isac();
/* Now, interrupt control disabled, */
/* all IRC interrupts are masked, */
/* all IRC interrupt mode are Low Active. */
if (have_isac) {
/* ETHER1 (NE2000 compatible 10M-Ether) parameter setup */
/* temporary enable interrupt control */
tx3927_ircptr->cer = 1;
/* ETHER1 Int. Is High-Active. */
if (tx3927_ircptr->ssr & (1 << 0))
jmr3927_ether1_irq = JMR3927_IRQ_IRC_INT0;
#if 0 /* INT3 may be asserted by ether0 (even after reboot...) */
else if (tx3927_ircptr->ssr & (1 << 3))
jmr3927_ether1_irq = JMR3927_IRQ_IRC_INT3;
#endif
/* disable interrupt control */
tx3927_ircptr->cer = 0;
/* Ether1: High Active */
if (jmr3927_ether1_irq) {
int ether1_irc = jmr3927_ether1_irq - JMR3927_IRQ_IRC;
tx3927_ircptr->cr[ether1_irc / 8] |=
TX3927_IRCR_HIGH << ((ether1_irc % 8) * 2);
}
}
/* mask all IOC interrupts */
jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR);
/* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */
jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR);
if (have_isac) {
/* mask all ISAC interrupts */
jmr3927_isac_reg_out(0, JMR3927_ISAC_INTM_ADDR);
/* setup ISAC interrupt mode (ISAIRQ3,ISAIRQ5:Low Active ???) */
jmr3927_isac_reg_out(JMR3927_ISAC_INTF_IRQ3|JMR3927_ISAC_INTF_IRQ5, JMR3927_ISAC_INTP_ADDR);
}
/* clear PCI Soft interrupts */
jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR);
/* clear PCI Reset interrupts */
@ -415,21 +172,11 @@ void __init arch_init_irq(void)
tx3927_ircptr->cer = TX3927_IRCER_ICE;
tx3927_ircptr->imr = irc_elevel;
jmr3927_irq_init(NR_ISA_IRQS);
/* setup irq space */
add_tb_irq_space(&jmr3927_isac_irqspace);
add_tb_irq_space(&jmr3927_ioc_irqspace);
add_tb_irq_space(&jmr3927_irc_irqspace);
jmr3927_irq_init();
/* setup IOC interrupt 1 (PCI, MODEM) */
setup_irq(JMR3927_IRQ_IOCINT, &ioc_action);
if (have_isac) {
setup_irq(JMR3927_IRQ_ISACINT, &isac_action);
setup_irq(JMR3927_IRQ_ISAC_ISAER, &isaerr_action);
}
#ifdef CONFIG_PCI
setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action);
#endif
@ -438,21 +185,28 @@ void __init arch_init_irq(void)
set_c0_status(ST0_IM); /* IE bit is still 0. */
}
static struct irq_chip jmr3927_irq_controller = {
.name = "jmr3927_irq",
.ack = jmr3927_irq_ack,
.mask = jmr3927_irq_disable,
.mask_ack = jmr3927_irq_ack,
.unmask = jmr3927_irq_enable,
.end = jmr3927_irq_end,
static struct irq_chip jmr3927_irq_ioc = {
.name = "jmr3927_ioc",
.ack = mask_irq_ioc,
.mask = mask_irq_ioc,
.mask_ack = mask_irq_ioc,
.unmask = unmask_irq_ioc,
};
void jmr3927_irq_init(u32 irq_base)
static struct irq_chip jmr3927_irq_irc = {
.name = "jmr3927_irc",
.ack = mask_irq_irc,
.mask = mask_irq_irc,
.mask_ack = mask_irq_irc,
.unmask = unmask_irq_irc,
};
static void __init jmr3927_irq_init(void)
{
u32 i;
for (i= irq_base; i< irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC; i++)
set_irq_chip(i, &jmr3927_irq_controller);
jmr3927_irq_base = irq_base;
for (i = JMR3927_IRQ_IRC; i < JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC; i++)
set_irq_chip_and_handler(i, &jmr3927_irq_irc, handle_level_irq);
for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++)
set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq);
}

54
arch/mips/jmr3927/rbhma3100/kgdb_io.c
View File

@ -31,23 +31,12 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
#include <asm/jmr3927/txx927.h>
#include <asm/jmr3927/tx3927.h>
#include <asm/jmr3927/jmr3927.h>
#define TIMEOUT 0xffffff
#define SLOW_DOWN
static const char digits[16] = "0123456789abcdef";
#ifdef SLOW_DOWN
#define slow_down() { int k; for (k=0; k<10000; k++); }
#else
#define slow_down()
#endif
static int remoteDebugInitialized = 0;
static void debugInit(int baud)
int putDebugChar(unsigned char c)
{
@ -103,20 +92,8 @@ unsigned char getDebugChar(void)
return c;
}
void debugInit(int baud)
static void debugInit(int baud)
{
/*
volatile unsigned long lcr;
volatile unsigned long dicr;
volatile unsigned long disr;
volatile unsigned long cisr;
volatile unsigned long fcr;
volatile unsigned long flcr;
volatile unsigned long bgr;
volatile unsigned long tfifo;
volatile unsigned long rfifo;
*/
tx3927_sioptr(0)->lcr = 0x020;
tx3927_sioptr(0)->dicr = 0;
tx3927_sioptr(0)->disr = 0x4100;
@ -125,31 +102,4 @@ void debugInit(int baud)
tx3927_sioptr(0)->flcr = 0x02;
tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) |
TXx927_SIBGR_BCLK_T0;
#if 0
/*
* Reset the UART.
*/
tx3927_sioptr(0)->fcr = TXx927_SIFCR_SWRST;
while (tx3927_sioptr(0)->fcr & TXx927_SIFCR_SWRST)
;
/*
* and set the speed of the serial port
* (currently hardwired to 9600 8N1
*/
tx3927_sioptr(0)->lcr = TXx927_SILCR_UMODE_8BIT |
TXx927_SILCR_USBL_1BIT |
TXx927_SILCR_SCS_IMCLK_BG;
tx3927_sioptr(0)->bgr =
((JMR3927_BASE_BAUD + baud / 2) / baud) |
TXx927_SIBGR_BCLK_T0;
/* HW RTS/CTS control */
if (ser->flags & ASYNC_HAVE_CTS_LINE)
tx3927_sioptr(0)->flcr = TXx927_SIFLCR_RCS | TXx927_SIFLCR_TES |
TXx927_SIFLCR_RTSTL_MAX /* 15 */;
/* Enable RX/TX */
tx3927_sioptr(0)->flcr &= ~(TXx927_SIFLCR_RSDE | TXx927_SIFLCR_TSDE);
#endif
}

157
arch/mips/jmr3927/rbhma3100/setup.c
View File

@ -54,87 +54,18 @@
#include <asm/addrspace.h>
#include <asm/time.h>
#include <asm/bcache.h>
#include <asm/irq.h>
#include <asm/reboot.h>
#include <asm/gdb-stub.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/mipsregs.h>
#include <asm/traps.h>
extern void puts(unsigned char *cp);
extern void puts(const char *cp);
/* Tick Timer divider */
#define JMR3927_TIMER_CCD 0 /* 1/2 */
#define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD))
unsigned char led_state = 0xf;
struct {
struct resource ram0;
struct resource ram1;
struct resource pcimem;
struct resource iob;
struct resource ioc;
struct resource pciio;
struct resource jmy1394;
struct resource rom1;
struct resource rom0;
struct resource sio0;
struct resource sio1;
} jmr3927_resources = {
{
.start = 0,
.end = 0x01FFFFFF,
.name = "RAM0",
.flags = IORESOURCE_MEM
}, {
.start = 0x02000000,
.end = 0x03FFFFFF,
.name = "RAM1",
.flags = IORESOURCE_MEM
}, {
.start = 0x08000000,
.end = 0x07FFFFFF,
.name = "PCIMEM",
.flags = IORESOURCE_MEM
}, {
.start = 0x10000000,
.end = 0x13FFFFFF,
.name = "IOB"
}, {
.start = 0x14000000,
.end = 0x14FFFFFF,
.name = "IOC"
}, {
.start = 0x15000000,
.end = 0x15FFFFFF,
.name = "PCIIO"
}, {
.start = 0x1D000000,
.end = 0x1D3FFFFF,
.name = "JMY1394"
}, {
.start = 0x1E000000,
.end = 0x1E3FFFFF,
.name = "ROM1"
}, {
.start = 0x1FC00000,
.end = 0x1FFFFFFF,
.name = "ROM0"
}, {
.start = 0xFFFEF300,
.end = 0xFFFEF3FF,
.name = "SIO0"
}, {
.start = 0xFFFEF400,
.end = 0xFFFEF4FF,
.name = "SIO1"
},
};
/* don't enable - see errata */
int jmr3927_ccfg_toeon = 0;
static int jmr3927_ccfg_toeon;
static inline void do_reset(void)
{
@ -173,9 +104,15 @@ static cycle_t jmr3927_hpt_read(void)
return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr;
}
static void jmr3927_timer_ack(void)
{
jmr3927_tmrptr->tisr = 0; /* ack interrupt */
}
static void __init jmr3927_time_init(void)
{
clocksource_mips.read = jmr3927_hpt_read;
mips_timer_ack = jmr3927_timer_ack;
mips_hpt_frequency = JMR3927_TIMER_CLK;
}
@ -190,9 +127,6 @@ void __init plat_timer_setup(struct irqaction *irq)
setup_irq(JMR3927_IRQ_TICK, irq);
}
#define USECS_PER_JIFFY (1000000/HZ)
//#undef DO_WRITE_THROUGH
#define DO_WRITE_THROUGH
#define DO_ENABLE_CACHE
@ -224,12 +158,6 @@ void __init plat_mem_setup(void)
/* Reboot on panic */
panic_timeout = 180;
{
unsigned int conf;
conf = read_c0_conf();
}
#if 1
/* cache setup */
{
unsigned int conf;
@ -256,16 +184,14 @@ void __init plat_mem_setup(void)
write_c0_conf(conf);
write_c0_cache(0);
}
#endif
/* initialize board */
jmr3927_board_init();
argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "toeon")) != NULL) {
jmr3927_ccfg_toeon = 1;
}
if ((argptr = strstr(argptr, "toeon")) != NULL)
jmr3927_ccfg_toeon = 1;
argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "ip=")) == NULL) {
argptr = prom_getcmdline();
@ -281,7 +207,7 @@ void __init plat_mem_setup(void)
memset(&req, 0, sizeof(req));
req.line = i;
req.iotype = UPIO_MEM;
req.membase = (char *)TX3927_SIO_REG(i);
req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i);
req.mapbase = TX3927_SIO_REG(i);
req.irq = i == 0 ?
JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1;
@ -303,65 +229,33 @@ void __init plat_mem_setup(void)
static void tx3927_setup(void);
#ifdef CONFIG_PCI
unsigned long mips_pci_io_base;
unsigned long mips_pci_io_size;
unsigned long mips_pci_mem_base;
unsigned long mips_pci_mem_size;
/* for legacy I/O, PCI I/O PCI Bus address must be 0 */
unsigned long mips_pci_io_pciaddr = 0;
#endif
static void __init jmr3927_board_init(void)
{
char *argptr;
#ifdef CONFIG_PCI
mips_pci_io_base = JMR3927_PCIIO;
mips_pci_io_size = JMR3927_PCIIO_SIZE;
mips_pci_mem_base = JMR3927_PCIMEM;
mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
#endif
tx3927_setup();
if (jmr3927_have_isac()) {
#ifdef CONFIG_FB_E1355
argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "video=")) == NULL) {
argptr = prom_getcmdline();
strcat(argptr, " video=e1355fb:crt16h");
}
#endif
#ifdef CONFIG_BLK_DEV_IDE
/* overrides PCI-IDE */
#endif
}
/* SIO0 DTR on */
jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
jmr3927_led_set(0);
if (jmr3927_have_isac())
jmr3927_io_led_set(0);
printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
jmr3927_dipsw1(), jmr3927_dipsw2(),
jmr3927_dipsw3(), jmr3927_dipsw4());
if (jmr3927_have_isac())
printk("JMI-3927IO2 --- ISAC(Rev %d) DIPSW:%01x\n",
jmr3927_isac_reg_in(JMR3927_ISAC_REV_ADDR) & JMR3927_REV_MASK,
jmr3927_io_dipsw());
}
void __init tx3927_setup(void)
static void __init tx3927_setup(void)
{
int i;
#ifdef CONFIG_PCI
unsigned long mips_pci_io_base = JMR3927_PCIIO;
unsigned long mips_pci_io_size = JMR3927_PCIIO_SIZE;
unsigned long mips_pci_mem_base = JMR3927_PCIMEM;
unsigned long mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
/* for legacy I/O, PCI I/O PCI Bus address must be 0 */
unsigned long mips_pci_io_pciaddr = 0;
#endif
/* SDRAMC are configured by PROM */
@ -475,10 +369,8 @@ void __init tx3927_setup(void)
tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1);
tx3927_pcicptr->mba = 0;
tx3927_pcicptr->tlbmma = 0;
#ifndef JMR3927_INIT_INDIRECT_PCI
/* Enable Direct mapping Address Space Decoder */
tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
#endif
/* Clear All Local Bus Status */
tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
@ -491,22 +383,15 @@ void __init tx3927_setup(void)
/* PCIC Int => IRC IRQ10 */
tx3927_pcicptr->il = TX3927_IR_PCI;
#if 1
/* Target Control (per errata) */
tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
#endif
/* Enable Bus Arbiter */
#if 0
tx3927_pcicptr->req_trace = 0x73737373;
#endif
tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY |
#if 1
PCI_COMMAND_IO |
#endif
PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
}
#endif /* CONFIG_PCI */
@ -555,8 +440,6 @@ static int __init jmr3927_rtc_init(void)
.flags = IORESOURCE_MEM,
};
struct platform_device *dev;
if (!jmr3927_have_nvram())
return -ENODEV;
dev = platform_device_register_simple("ds1742", -1, &res, 1);
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
}

1
arch/mips/kernel/asm-offsets.c
View File

@ -102,7 +102,6 @@ void output_thread_info_defines(void)
offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
offset("#define TI_REGS ", struct thread_info, regs);
constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
constant("#define _THREAD_SIZE ", THREAD_SIZE);
constant("#define _THREAD_MASK ", THREAD_MASK);
linefeed;

4
arch/mips/kernel/i8259.c
View File

@ -328,8 +328,8 @@ void __init init_i8259_irqs (void)
{
int i;
request_resource(&ioport_resource, &pic1_io_resource);
request_resource(&ioport_resource, &pic2_io_resource);
insert_resource(&ioport_resource, &pic1_io_resource);
insert_resource(&ioport_resource, &pic2_io_resource);
init_8259A(0);

5
arch/mips/kernel/kspd.c
View File

@ -17,6 +17,7 @@
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/unistd.h>
#include <linux/file.h>
#include <linux/fs.h>
@ -198,7 +199,6 @@ void sp_work_handle_request(void)
int cmd;
char *vcwd;
mm_segment_t old_fs;
int size;
ret.retval = -1;
@ -241,8 +241,6 @@ void sp_work_handle_request(void)
if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv,
(int)&tz, 0,0)) == 0)
ret.retval = tv.tv_sec;
ret.errno = errno;
break;
case MTSP_SYSCALL_EXIT:
@ -279,7 +277,6 @@ void sp_work_handle_request(void)
if (cmd >= 0) {
ret.retval = sp_syscall(cmd, generic.arg0, generic.arg1,
generic.arg2, generic.arg3);
ret.errno = errno;
} else
printk(KERN_WARNING
"KSPD: Unknown SP syscall number %d\n", sc.cmd);

7
arch/mips/kernel/rtlx.c
View File

@ -289,7 +289,7 @@ unsigned int rtlx_write_poll(int index)
return write_spacefree(chan->rt_read, chan->rt_write, chan->buffer_size);
}
ssize_t rtlx_read(int index, void __user *buff, size_t count, int user)
ssize_t rtlx_read(int index, void __user *buff, size_t count)
{
size_t lx_write, fl = 0L;
struct rtlx_channel *lx;
@ -331,9 +331,10 @@ ssize_t rtlx_read(int index, void __user *buff, size_t count, int user)
return count;
}
ssize_t rtlx_write(int index, const void __user *buffer, size_t count, int user)
ssize_t rtlx_write(int index, const void __user *buffer, size_t count)
{
struct rtlx_channel *rt;
unsigned long failed;
size_t rt_read;
size_t fl;
@ -363,7 +364,7 @@ ssize_t rtlx_write(int index, const void __user *buffer, size_t count, int user)
}
out:
count -= cailed;
count -= failed;
smp_wmb();
rt->rt_write = (rt->rt_write + count) % rt->buffer_size;

8
arch/mips/mips-boards/generic/display.c
View File

@ -24,16 +24,16 @@
void mips_display_message(const char *str)
{
static volatile unsigned int *display = NULL;
static unsigned int __iomem *display = NULL;
int i;
if (unlikely(display == NULL))
display = (volatile unsigned int *)ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int));
display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int));
for (i = 0; i <= 14; i=i+2) {
if (*str)
display[i] = *str++;
writel(*str++, display + i);
else
display[i] = ' ';
writel(' ', display + i);
}
}

4
arch/mips/mips-boards/generic/pci.c
View File

@ -65,7 +65,7 @@ static struct resource msc_io_resource = {
};
extern struct pci_ops bonito64_pci_ops;
extern struct pci_ops gt64120_pci_ops;
extern struct pci_ops gt64xxx_pci0_ops;
extern struct pci_ops msc_pci_ops;
static struct pci_controller bonito64_controller = {
@ -76,7 +76,7 @@ static struct pci_controller bonito64_controller = {
};
static struct pci_controller gt64120_controller = {
.pci_ops = &gt64120_pci_ops,
.pci_ops = &gt64xxx_pci0_ops,
.io_resource = &gt64120_io_resource,
.mem_resource = &gt64120_mem_resource,
};

12
arch/mips/mips-boards/generic/reset.c
View File

@ -39,24 +39,24 @@ static void atlas_machine_power_off(void);
static void mips_machine_restart(char *command)
{
volatile unsigned int *softres_reg = (unsigned int *)ioremap (SOFTRES_REG, sizeof(unsigned int));
unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int));
*softres_reg = GORESET;
writew(GORESET, softres_reg);
}
static void mips_machine_halt(void)
{
volatile unsigned int *softres_reg = (unsigned int *)ioremap (SOFTRES_REG, sizeof(unsigned int));
unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int));
*softres_reg = GORESET;
writew(GORESET, softres_reg);
}
#if defined(CONFIG_MIPS_ATLAS)
static void atlas_machine_power_off(void)
{
volatile unsigned int *psustby_reg = (unsigned int *)ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int));
unsigned int __iomem *psustby_reg = ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int));
*psustby_reg = ATLAS_GOSTBY;
writew(ATLAS_GOSTBY, psustby_reg);
}
#endif

4
arch/mips/mips-boards/malta/malta_int.c
View File

@ -42,8 +42,6 @@
#include <asm/mips-boards/msc01_pci.h>
#include <asm/msc01_ic.h>
extern void mips_timer_interrupt(void);
static DEFINE_SPINLOCK(mips_irq_lock);
static inline int mips_pcibios_iack(void)
@ -85,7 +83,7 @@ static inline int mips_pcibios_iack(void)
dummy = BONITO_PCIMAP_CFG;
iob(); /* sync */
irq = *(volatile u32 *)(_pcictrl_bonito_pcicfg);
irq = readl((u32 *)_pcictrl_bonito_pcicfg);
iob(); /* sync */
irq &= 0xff;
BONITO_PCIMAP_CFG = 0;

4
arch/mips/mips-boards/malta/malta_setup.c
View File

@ -145,7 +145,8 @@ void __init plat_mem_setup(void)
#ifdef CONFIG_BLK_DEV_IDE
/* Check PCI clock */
{
int jmpr = (*((volatile unsigned int *)ioremap(MALTA_JMPRS_REG, sizeof(unsigned int))) >> 2) & 0x07;
unsigned int __iomem *jmpr_p = (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
int jmpr = (readw(jmpr_p) >> 2) & 0x07;
static const int pciclocks[] __initdata = {
33, 20, 25, 30, 12, 16, 37, 10
};
@ -179,7 +180,6 @@ void __init plat_mem_setup(void)
};
#endif
#endif
mips_reboot_setup();
board_time_init = mips_time_init;

2
arch/mips/mm/cache.c
View File

@ -96,7 +96,7 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
kaddr = kmap_coherent(page, vmaddr);
flush_data_cache_page((unsigned long)kaddr);
kunmap_coherent(kaddr);
kunmap_coherent();
}
}

25
arch/mips/mm/init.c
View File

@ -177,7 +177,7 @@ void *kmap_coherent(struct page *page, unsigned long addr)
#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
void kunmap_coherent(struct page *page)
void kunmap_coherent(void)
{
#ifndef CONFIG_MIPS_MT_SMTC
unsigned int wired;
@ -210,7 +210,7 @@ void copy_user_highpage(struct page *to, struct page *from,
if (cpu_has_dc_aliases) {
vfrom = kmap_coherent(from, vaddr);
copy_page(vto, vfrom);
kunmap_coherent(from);
kunmap_coherent();
} else {
vfrom = kmap_atomic(from, KM_USER0);
copy_page(vto, vfrom);
@ -233,7 +233,7 @@ void copy_to_user_page(struct vm_area_struct *vma,
if (cpu_has_dc_aliases) {
void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
memcpy(vto, src, len);
kunmap_coherent(page);
kunmap_coherent();
} else
memcpy(dst, src, len);
if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc)
@ -250,7 +250,7 @@ void copy_from_user_page(struct vm_area_struct *vma,
void *vfrom =
kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
memcpy(dst, vfrom, len);
kunmap_coherent(page);
kunmap_coherent();
} else
memcpy(dst, src, len);
}
@ -351,18 +351,15 @@ void __init paging_init(void)
#endif
kmap_coherent_init();
#ifdef CONFIG_ISA
if (max_low_pfn >= MAX_DMA_PFN)
if (min_low_pfn >= MAX_DMA_PFN) {
zones_size[ZONE_DMA] = 0;
zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn;
} else {
zones_size[ZONE_DMA] = MAX_DMA_PFN - min_low_pfn;
zones_size[ZONE_NORMAL] = max_low_pfn - MAX_DMA_PFN;
}
#ifdef CONFIG_ZONE_DMA
if (min_low_pfn < MAX_DMA_PFN && MAX_DMA_PFN <= max_low_pfn) {
zones_size[ZONE_DMA] = MAX_DMA_PFN - min_low_pfn;
zones_size[ZONE_NORMAL] = max_low_pfn - MAX_DMA_PFN;
} else if (max_low_pfn < MAX_DMA_PFN)
zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn;
else
#endif
zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn;
zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn;
#ifdef CONFIG_HIGHMEM
zones_size[ZONE_HIGHMEM] = highend_pfn - highstart_pfn;

3
arch/mips/pci/Makefile
View File

@ -8,8 +8,7 @@ obj-y += pci.o pci-dac.o
# PCI bus host bridge specific code
#
obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o
obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o

11
arch/mips/pci/fixup-jmr3927.c
View File

@ -29,7 +29,6 @@
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/jmr3927/jmr3927.h>
@ -81,14 +80,8 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
/* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */
if (dev->bus->parent == NULL &&
slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) {
extern int jmr3927_ether1_irq;
/* check this irq line was reserved for ether1 */
if (jmr3927_ether1_irq != JMR3927_IRQ_ETHER0)
irq = JMR3927_IRQ_ETHER0;
else
irq = 0; /* disable */
}
slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24))
irq = JMR3927_IRQ_ETHER0;
return irq;
}

100
arch/mips/pci/ops-gt64111.c
View File

@ -1,100 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1995, 1996, 1997, 2002 by Ralf Baechle
* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/pci.h>
#include <asm/io.h>
#include <asm/gt64120.h>
#include <asm/mach-cobalt/cobalt.h>
/*
* Device 31 on the GT64111 is used to generate PCI special
* cycles, so we shouldn't expected to find a device there ...
*/
static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
{
if (bus->number == 0 && PCI_SLOT(devfn) < 31)
return 0;
return -1;
}
static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
{
if (pci_range_ck(bus, devfn))
return PCIBIOS_DEVICE_NOT_FOUND;
switch (size) {
case 4:
PCI_CFG_SET(devfn, where);
*val = GT_READ(GT_PCI0_CFGDATA_OFS);
return PCIBIOS_SUCCESSFUL;
case 2:
PCI_CFG_SET(devfn, (where & ~0x3));
*val = GT_READ(GT_PCI0_CFGDATA_OFS)
>> ((where & 3) * 8);
return PCIBIOS_SUCCESSFUL;
case 1:
PCI_CFG_SET(devfn, (where & ~0x3));
*val = GT_READ(GT_PCI0_CFGDATA_OFS)
>> ((where & 3) * 8);
return PCIBIOS_SUCCESSFUL;
}
return PCIBIOS_BAD_REGISTER_NUMBER;
}
static int gt64111_pci_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
u32 tmp;
if (pci_range_ck(bus, devfn))
return PCIBIOS_DEVICE_NOT_FOUND;
switch (size) {
case 4:
PCI_CFG_SET(devfn, where);
GT_WRITE(GT_PCI0_CFGDATA_OFS, val);
return PCIBIOS_SUCCESSFUL;
case 2:
PCI_CFG_SET(devfn, (where & ~0x3));
tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
tmp &= ~(0xffff << ((where & 0x3) * 8));
tmp |= (val << ((where & 0x3) * 8));
GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
return PCIBIOS_SUCCESSFUL;
case 1:
PCI_CFG_SET(devfn, (where & ~0x3));
tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
tmp &= ~(0xff << ((where & 0x3) * 8));
tmp |= (val << ((where & 0x3) * 8));
GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
return PCIBIOS_SUCCESSFUL;
}
return PCIBIOS_BAD_REGISTER_NUMBER;
}
struct pci_ops gt64111_pci_ops = {
.read = gt64111_pci_read_config,
.write = gt64111_pci_write_config,
};

30
arch/mips/pci/ops-gt64120.c → arch/mips/pci/ops-gt64xxx_pci0.c
View File

@ -39,8 +39,8 @@
#define PCI_CFG_TYPE1_DEV_SHF 11
#define PCI_CFG_TYPE1_BUS_SHF 16
static int gt64120_pcibios_config_access(unsigned char access_type,
struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
static int gt64xxx_pci0_pcibios_config_access(unsigned char access_type,
struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
{
unsigned char busnum = bus->number;
u32 intr;
@ -100,13 +100,13 @@ static int gt64120_pcibios_config_access(unsigned char access_type,
* We can't address 8 and 16 bit words directly. Instead we have to
* read/write a 32bit word and mask/modify the data we actually want.
*/
static int gt64120_pcibios_read(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
{
u32 data = 0;
if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
&data))
if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
if (size == 1)
@ -119,16 +119,16 @@ static int gt64120_pcibios_read(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_SUCCESSFUL;
}
static int gt64120_pcibios_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
u32 data = 0;
if (size == 4)
data = val;
else {
if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
where, &data))
if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus,
devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
if (size == 1)
@ -139,14 +139,14 @@ static int gt64120_pcibios_write(struct pci_bus *bus, unsigned int devfn,
(val << ((where & 3) << 3));
}
if (gt64120_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
&data))
if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn,
where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
return PCIBIOS_SUCCESSFUL;
}
struct pci_ops gt64120_pci_ops = {
.read = gt64120_pcibios_read,
.write = gt64120_pcibios_write
struct pci_ops gt64xxx_pci0_ops = {
.read = gt64xxx_pci0_pcibios_read,
.write = gt64xxx_pci0_pcibios_write
};

232
arch/mips/pci/ops-tx3927.c
View File

@ -40,7 +40,6 @@
#include <asm/addrspace.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/debug.h>
static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
unsigned char where)
@ -130,234 +129,3 @@ struct pci_ops jmr3927_pci_ops = {
jmr3927_pci_read_config,
jmr3927_pci_write_config,
};
#ifndef JMR3927_INIT_INDIRECT_PCI
inline unsigned long tc_readl(volatile __u32 * addr)
{
return readl(addr);
}
inline void tc_writel(unsigned long data, volatile __u32 * addr)
{
writel(data, addr);
}
#else
unsigned long tc_readl(volatile __u32 * addr)
{
unsigned long val;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) CPHYSADDR(addr);
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val =
le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata);
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
return val;
}
void tc_writel(unsigned long data, volatile __u32 * addr)
{
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
cpu_to_le32(data);
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) CPHYSADDR(addr);
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
}
unsigned char tx_ioinb(unsigned char *addr)
{
unsigned long val;
__u32 ioaddr;
int offset;
int byte;
ioaddr = (unsigned long) addr;
offset = ioaddr & 0x3;
byte = 0xf & ~(8 >> offset);
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val =
le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata);
val = val & 0xff;
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
return val;
}
void tx_iooutb(unsigned long data, unsigned char *addr)
{
__u32 ioaddr;
int offset;
int byte;
data = data | (data << 8) | (data << 16) | (data << 24);
ioaddr = (unsigned long) addr;
offset = ioaddr & 0x3;
byte = 0xf & ~(8 >> offset);
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
}
unsigned short tx_ioinw(unsigned short *addr)
{
unsigned long val;
__u32 ioaddr;
int offset;
int byte;
ioaddr = (unsigned long) addr;
offset = ioaddr & 0x2;
byte = 3 << offset;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val =
le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata);
val = val & 0xffff;
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
return val;
}
void tx_iooutw(unsigned long data, unsigned short *addr)
{
__u32 ioaddr;
int offset;
int byte;
data = data | (data << 16);
ioaddr = (unsigned long) addr;
offset = ioaddr & 0x2;
byte = 3 << offset;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
}
unsigned long tx_ioinl(unsigned int *addr)
{
unsigned long val;
__u32 ioaddr;
ioaddr = (unsigned long) addr;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val =
le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata);
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
return val;
}
void tx_iooutl(unsigned long data, unsigned int *addr)
{
__u32 ioaddr;
ioaddr = (unsigned long) addr;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
cpu_to_le32(data);
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
}
void tx_insbyte(unsigned char *addr, void *buffer, unsigned int count)
{
unsigned char *ptr = (unsigned char *) buffer;
while (count--) {
*ptr++ = tx_ioinb(addr);
}
}
void tx_insword(unsigned short *addr, void *buffer, unsigned int count)
{
unsigned short *ptr = (unsigned short *) buffer;
while (count--) {
*ptr++ = tx_ioinw(addr);
}
}
void tx_inslong(unsigned int *addr, void *buffer, unsigned int count)
{
unsigned long *ptr = (unsigned long *) buffer;
while (count--) {
*ptr++ = tx_ioinl(addr);
}
}
void tx_outsbyte(unsigned char *addr, void *buffer, unsigned int count)
{
unsigned char *ptr = (unsigned char *) buffer;
while (count--) {
tx_iooutb(*ptr++, addr);
}
}
void tx_outsword(unsigned short *addr, void *buffer, unsigned int count)
{
unsigned short *ptr = (unsigned short *) buffer;
while (count--) {
tx_iooutw(*ptr++, addr);
}
}
void tx_outslong(unsigned int *addr, void *buffer, unsigned int count)
{
unsigned long *ptr = (unsigned long *) buffer;
while (count--) {
tx_iooutl(*ptr++, addr);
}
}
#endif

4
arch/mips/pci/pci-lasat.c
View File

@ -12,7 +12,7 @@
#include <asm/bootinfo.h>
extern struct pci_ops nile4_pci_ops;
extern struct pci_ops gt64120_pci_ops;
extern struct pci_ops gt64xxx_pci0_ops;
static struct resource lasat_pci_mem_resource = {
.name = "LASAT PCI MEM",
.start = 0x18000000,
@ -38,7 +38,7 @@ static int __init lasat_pci_setup(void)
switch (mips_machtype) {
case MACH_LASAT_100:
lasat_pci_controller.pci_ops = &gt64120_pci_ops;
lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
break;
case MACH_LASAT_200:
lasat_pci_controller.pci_ops = &nile4_pci_ops;

2
arch/mips/pci/pci-ocelot.c
View File

@ -81,7 +81,7 @@ static struct resource ocelot_io_resource = {
};
static struct pci_controller ocelot_pci_controller = {
.pci_ops = gt64120_pci_ops;
.pci_ops = gt64xxx_pci0_ops;
.mem_resource = &ocelot_mem_resource;
.io_resource = &ocelot_io_resource;
};

25
arch/mips/pci/pci.c
View File

@ -77,6 +77,13 @@ pcibios_align_resource(void *data, struct resource *res,
void __init register_pci_controller(struct pci_controller *hose)
{
if (request_resource(&iomem_resource, hose->mem_resource) < 0)
goto out;
if (request_resource(&ioport_resource, hose->io_resource) < 0) {
release_resource(hose->mem_resource);
goto out;
}
*hose_tail = hose;
hose_tail = &hose->next;
@ -87,6 +94,11 @@ void __init register_pci_controller(struct pci_controller *hose)
printk(KERN_WARNING
"registering PCI controller with io_map_base unset\n");
}
return;
out:
printk(KERN_WARNING
"Skipping PCI bus scan due to resource conflict\n");
}
/* Most MIPS systems have straight-forward swizzling needs. */
@ -121,11 +133,6 @@ static int __init pcibios_init(void)
/* Scan all of the recorded PCI controllers. */
for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
if (request_resource(&iomem_resource, hose->mem_resource) < 0)
goto out;
if (request_resource(&ioport_resource, hose->io_resource) < 0)
goto out_free_mem_resource;
if (!hose->iommu)
PCI_DMA_BUS_IS_PHYS = 1;
@ -144,14 +151,6 @@ static int __init pcibios_init(void)
need_domain_info = 1;
}
}
continue;
out_free_mem_resource:
release_resource(hose->mem_resource);
out:
printk(KERN_WARNING
"Skipping PCI bus scan due to resource conflict\n");
}
if (!pci_probe_only)

24
arch/mips/sgi-ip22/ip22-nvram.c
View File

@ -52,8 +52,7 @@
* national semiconductor nv ram chip the op code is 3 bits and
* the address is 6/8 bits.
*/
static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
unsigned reg)
static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
{
unsigned short ser_cmd;
int i;
@ -61,33 +60,34 @@ static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
for (i = 0; i < BITS_IN_COMMAND; i++) {
if (ser_cmd & (1<<15)) /* if high order bit set */
*ctrl |= EEPROM_DATO;
writel(readl(ctrl) | EEPROM_DATO, ctrl);
else
*ctrl &= ~EEPROM_DATO;
*ctrl &= ~EEPROM_ECLK;
*ctrl |= EEPROM_ECLK;
writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
writel(readl(ctrl) | EEPROM_ECLK, ctrl);
ser_cmd <<= 1;
}
*ctrl &= ~EEPROM_DATO; /* see data sheet timing diagram */
/* see data sheet timing diagram */
writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
}
unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg)
unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
{
unsigned short res = 0;
int i;
*ctrl &= ~EEPROM_EPROT;
writel(readl(ctrl) & ~EEPROM_EPROT, ctrl);
eeprom_cs_on(ctrl);
eeprom_cmd(ctrl, EEPROM_READ, reg);
/* clock the data ouf of serial mem */
for (i = 0; i < 16; i++) {
*ctrl &= ~EEPROM_ECLK;
writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
delay();
*ctrl |= EEPROM_ECLK;
writel(readl(ctrl) | EEPROM_ECLK, ctrl);
delay();
res <<= 1;
if (*ctrl & EEPROM_DATI)
if (readl(ctrl) & EEPROM_DATI)
res |= 1;
}

14
arch/mips/sgi-ip22/ip22-time.c
View File

@ -94,7 +94,7 @@ static int indy_rtc_set_time(unsigned long tim)
static unsigned long dosample(void)
{
u32 ct0, ct1;
volatile u8 msb, lsb;
u8 msb, lsb;
/* Start the counter. */
sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
@ -107,21 +107,21 @@ static unsigned long dosample(void)
/* Latch and spin until top byte of counter2 is zero */
do {
sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT;
lsb = sgint->tcnt2;
msb = sgint->tcnt2;
writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT, &sgint->tcword);
lsb = readb(&sgint->tcnt2);
msb = readb(&sgint->tcnt2);
ct1 = read_c0_count();
} while (msb);
/* Stop the counter. */
sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
SGINT_TCWORD_MSWST);
writeb(sgint->tcword, (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
SGINT_TCWORD_MSWST));
/*
* Return the difference, this is how far the r4k counter increments
* for every 1/HZ seconds. We round off the nearest 1 MHz of master
* clock (= 1000000 / HZ / 2).
*/
/*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/
return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
}

2
arch/mips/sibyte/Kconfig
View File

@ -2,6 +2,7 @@ config SIBYTE_SB1250
bool
select HW_HAS_PCI
select SIBYTE_ENABLE_LDT_IF_PCI
select SIBYTE_HAS_ZBUS_PROFILING
select SIBYTE_SB1xxx_SOC
select SYS_SUPPORTS_SMP
@ -34,6 +35,7 @@ config SIBYTE_BCM112X
config SIBYTE_BCM1x80
bool
select HW_HAS_PCI
select SIBYTE_HAS_ZBUS_PROFILING
select SIBYTE_SB1xxx_SOC
select SYS_SUPPORTS_SMP

5
arch/mips/sibyte/common/Makefile Normal file
View File

@ -0,0 +1,5 @@
obj-y :=
obj-$(CONFIG_SIBYTE_TBPROF) += sb_tbprof.o
EXTRA_AFLAGS := $(CFLAGS)

164
arch/mips/sibyte/sb1250/bcm1250_tbprof.c → arch/mips/sibyte/common/sb_tbprof.c
View File

@ -31,14 +31,29 @@
#include <linux/vmalloc.h>
#include <linux/fs.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/wait.h>
#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
#include <asm/sibyte/bcm1480_regs.h>
#include <asm/sibyte/bcm1480_scd.h>
#include <asm/sibyte/bcm1480_int.h>
#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_scd.h>
#include <asm/sibyte/sb1250_int.h>
#else
#error invalid SiByte UART configuation
#endif
#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
#undef K_INT_TRACE_FREEZE
#define K_INT_TRACE_FREEZE K_BCM1480_INT_TRACE_FREEZE
#undef K_INT_PERF_CNT
#define K_INT_PERF_CNT K_BCM1480_INT_PERF_CNT
#endif
#include <asm/system.h>
#include <asm/uaccess.h>
@ -118,7 +133,7 @@ static struct sbprof_tb sbp;
: /* inputs */ \
: /* modifies */ "$8" )
#define DEVNAME "bcm1250_tbprof"
#define DEVNAME "sb_tbprof"
#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES)
@ -132,6 +147,7 @@ static struct sbprof_tb sbp;
* overflow.
*
* We map the interrupt for trace_buffer_freeze to handle it on CPU 0.
*
*/
static u64 tb_period;
@ -143,25 +159,36 @@ static void arm_tb(void)
u64 tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
/*
* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to trigger
*start of trace. XXX vary sampling period
* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
* trigger start of trace. XXX vary sampling period
*/
__raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1));
scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
/*
* Unfortunately, in Pass 2 we must clear all counters to knock down a
* previous interrupt request. This means that bus profiling requires
* ALL of the SCD perf counters.
* Unfortunately, in Pass 2 we must clear all counters to knock down
* a previous interrupt request. This means that bus profiling
* requires ALL of the SCD perf counters.
*/
#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
__raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
/* keep counters 0,2,3,4,5,6,7 as is */
V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
IOADDR(A_BCM1480_SCD_PERF_CNT_CFG0));
__raw_writeq(
M_SPC_CFG_ENABLE | /* enable counting */
M_SPC_CFG_CLEAR | /* clear all counters */
V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
IOADDR(A_BCM1480_SCD_PERF_CNT_CFG1));
#else
__raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
/* keep counters 0,2,3 as is */
M_SPC_CFG_ENABLE | /* enable counting */
M_SPC_CFG_CLEAR | /* clear all counters */
V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
IOADDR(A_SCD_PERF_CNT_CFG));
#endif
__raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1));
/* Reset the trace buffer */
__raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
@ -190,38 +217,37 @@ static irqreturn_t sbprof_tb_intr(int irq, void *dev_id)
/* Subscripts decrease to put bundle in the order */
/* t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi */
p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
/* read t2 hi */
/* read t2 hi */
p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
/* read t2 lo */
/* read t2 lo */
p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
/* read t1 hi */
/* read t1 hi */
p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
/* read t1 lo */
/* read t1 lo */
p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
/* read t0 hi */
/* read t0 hi */
p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
/* read t0 lo */
/* read t0 lo */
}
if (!sbp.tb_enable) {
pr_debug(DEVNAME ": tb_intr shutdown\n");
__raw_writeq(M_SCD_TRACE_CFG_RESET,
IOADDR(A_SCD_TRACE_CFG));
sbp.tb_armed = 0;
wake_up(&sbp.tb_sync);
wake_up_interruptible(&sbp.tb_sync);
} else {
arm_tb(); /* knock down current interrupt and get another one later */
/* knock down current interrupt and get another one later */
arm_tb();
}
} else {
/* No more trace buffer samples */
pr_debug(DEVNAME ": tb_intr full\n");
__raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
sbp.tb_armed = 0;
if (!sbp.tb_enable) {
wake_up(&sbp.tb_sync);
}
wake_up(&sbp.tb_read);
if (!sbp.tb_enable)
wake_up_interruptible(&sbp.tb_sync);
wake_up_interruptible(&sbp.tb_read);
}
return IRQ_HANDLED;
}
@ -250,8 +276,8 @@ static int sbprof_zbprof_start(struct file *filp)
sbp.next_tb_sample = 0;
filp->f_pos = 0;
err = request_irq(K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
DEVNAME " trace freeze", &sbp);
err = request_irq (K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
DEVNAME " trace freeze", &sbp);
if (err)
return -EBUSY;
@ -263,23 +289,29 @@ static int sbprof_zbprof_start(struct file *filp)
IOADDR(A_SCD_PERF_CNT_CFG));
/*
* We grab this interrupt to prevent others from trying to use it, even
* though we don't want to service the interrupts (they only feed into
* the trace-on-interrupt mechanism)
* We grab this interrupt to prevent others from trying to use
* it, even though we don't want to service the interrupts
* (they only feed into the trace-on-interrupt mechanism)
*/
err = request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0,
DEVNAME " scd perfcnt", &sbp);
if (err)
goto out_free_irq;
if (request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0, DEVNAME " scd perfcnt", &sbp)) {
free_irq(K_INT_TRACE_FREEZE, &sbp);
return -EBUSY;
}
/*
* I need the core to mask these, but the interrupt mapper to pass them
* through. I am exploiting my knowledge that cp0_status masks out
* IP[5]. krw
* I need the core to mask these, but the interrupt mapper to
* pass them through. I am exploiting my knowledge that
* cp0_status masks out IP[5]. krw
*/
#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
__raw_writeq(K_BCM1480_INT_MAP_I3,
IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) +
((K_BCM1480_INT_PERF_CNT & 0x3f) << 3)));
#else
__raw_writeq(K_INT_MAP_I3,
IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
(K_INT_PERF_CNT << 3)));
#endif
/* Initialize address traps */
__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0));
@ -298,7 +330,7 @@ static int sbprof_zbprof_start(struct file *filp)
__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
/* Initialize Trace Event 0-7 */
/* when interrupt */
/* when interrupt */
__raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
@ -324,24 +356,23 @@ static int sbprof_zbprof_start(struct file *filp)
__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
/* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
__raw_writeq(1ULL << (K_BCM1480_INT_PERF_CNT & 0x3f),
IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_TRACE_L)));
#else
__raw_writeq(1ULL << K_INT_PERF_CNT,
IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE)));
#endif
arm_tb();
pr_debug(DEVNAME ": done starting\n");
return 0;
out_free_irq:
free_irq(K_INT_TRACE_FREEZE, &sbp);
return err;
}
static int sbprof_zbprof_stop(void)
{
int err;
int err = 0;
pr_debug(DEVNAME ": stopping\n");
@ -365,7 +396,7 @@ static int sbprof_zbprof_stop(void)
pr_debug(DEVNAME ": done stopping\n");
return 0;
return err;
}
static int sbprof_tb_open(struct inode *inode, struct file *filp)
@ -380,11 +411,9 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
return -EBUSY;
memset(&sbp, 0, sizeof(struct sbprof_tb));
sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
if (!sbp.sbprof_tbbuf)
return -ENOMEM;
memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
init_waitqueue_head(&sbp.tb_sync);
init_waitqueue_head(&sbp.tb_read);
@ -397,8 +426,9 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
static int sbprof_tb_release(struct inode *inode, struct file *filp)
{
int minor = iminor(inode);
int minor;
minor = iminor(inode);
if (minor != 0 || !sbp.open)
return -ENODEV;
@ -419,10 +449,10 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
size_t size, loff_t *offp)
{
int cur_sample, sample_off, cur_count, sample_left;
long cur_off = *offp;
char *dest = buf;
int count = 0;
char *src;
int count = 0;
char *dest = buf;
long cur_off = *offp;
if (!access_ok(VERIFY_WRITE, buf, size))
return -EFAULT;
@ -445,7 +475,6 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
mutex_unlock(&sbp.lock);
return err;
}
pr_debug(DEVNAME ": read from sample %d, %d bytes\n",
cur_sample, cur_count);
size -= cur_count;
@ -461,45 +490,46 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
dest += cur_count;
count += cur_count;
}
*offp = cur_off;
mutex_unlock(&sbp.lock);
return count;
}
static long sbprof_tb_ioctl(struct file *filp, unsigned int command,
unsigned long arg)
static long sbprof_tb_ioctl(struct file *filp,
unsigned int command,
unsigned long arg)
{
int error = 0;
int err = 0;
switch (command) {
case SBPROF_ZBSTART:
mutex_lock(&sbp.lock);
error = sbprof_zbprof_start(filp);
err = sbprof_zbprof_start(filp);
mutex_unlock(&sbp.lock);
break;
case SBPROF_ZBSTOP:
mutex_lock(&sbp.lock);
error = sbprof_zbprof_stop();
err = sbprof_zbprof_stop();
mutex_unlock(&sbp.lock);
break;
case SBPROF_ZBWAITFULL:
error = wait_event_interruptible(sbp.tb_read, TB_FULL);
if (error)
case SBPROF_ZBWAITFULL: {
err = wait_event_interruptible(sbp.tb_read, TB_FULL);
if (err)
break;
error = put_user(TB_FULL, (int *) arg);
break;
default:
error = -EINVAL;
err = put_user(TB_FULL, (int *) arg);
break;
}
return error;
default:
err = -EINVAL;
break;
}
return err;
}
static const struct file_operations sbprof_tb_fops = {
@ -544,8 +574,8 @@ static int __init sbprof_tb_init(void)
sbp.open = 0;
tb_period = zbbus_mhz * 10000LL;
pr_info(DEVNAME ": initialized - tb_period = %lld\n", tb_period);
pr_info(DEVNAME ": initialized - tb_period = %lld\n",
(long long) tb_period);
return 0;
out_class:

1
arch/mips/sibyte/sb1250/Makefile
View File

@ -1,6 +1,5 @@
obj-y := setup.o irq.o time.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_SIBYTE_TBPROF) += bcm1250_tbprof.o
obj-$(CONFIG_SIBYTE_STANDALONE) += prom.o
obj-$(CONFIG_SIBYTE_BUS_WATCHER) += bus_watcher.o

105
arch/mips/sni/pcimt.c
View File

@ -91,7 +91,7 @@ static struct platform_device pcimt_serial8250_device = {
};
static struct resource sni_io_resource = {
.start = 0x00001000UL,
.start = 0x00000000UL,
.end = 0x03bfffffUL,
.name = "PCIMT IO MEM",
.flags = IORESOURCE_IO,
@ -132,107 +132,19 @@ static struct resource pcimt_io_resources[] = {
};
static struct resource sni_mem_resource = {
.start = 0x10000000UL,
.end = 0xffffffffUL,
.start = 0x18000000UL,
.end = 0x1fbfffffUL,
.name = "PCIMT PCI MEM",
.flags = IORESOURCE_MEM
};
/*
* The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
* for other purposes. Be paranoid and allocate all of the before the PCI
* code gets a chance to to map anything else there ...
*
* This leaves the following areas available:
*
* 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
* 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
* 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
* 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
* 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
*/
static struct resource pcimt_mem_resources[] = {
{
.start = 0x100a0000,
.end = 0x100bffff,
.name = "Video RAM area",
.flags = IORESOURCE_BUSY
}, {
.start = 0x100c0000,
.end = 0x100fffff,
.name = "ISA Reserved",
.flags = IORESOURCE_BUSY
}, {
.start = 0x14000000,
.end = 0x17bfffff,
.name = "PCI IO",
.flags = IORESOURCE_BUSY
}, {
.start = 0x17c00000,
.end = 0x17ffffff,
.name = "Cache Replacement Area",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1a000000,
.end = 0x1a000003,
.name = "PCI INT Acknowledge",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fc00000,
.end = 0x1fc7ffff,
.name = "Boot PROM",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fc80000,
.end = 0x1fcfffff,
.name = "Diag PROM",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fd00000,
.end = 0x1fdfffff,
.name = "X-Bus",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fe00000,
.end = 0x1fefffff,
.name = "BIOS map",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1ff00000,
.end = 0x1ff7ffff,
.name = "NVRAM / EEPROM",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fff0000,
.end = 0x1fffefff,
.name = "ASIC PCI",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1ffff000,
.end = 0x1fffffff,
.name = "MP Agent",
.flags = IORESOURCE_BUSY
}, {
.start = 0x20000000,
.end = 0x9fffffff,
.name = "Main Memory",
.flags = IORESOURCE_BUSY
}
};
static void __init sni_pcimt_resource_init(void)
{
int i;
/* request I/O space for devices used on all i[345]86 PCs */
for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++)
request_resource(&ioport_resource, pcimt_io_resources + i);
/* request mem space for pcimt-specific devices */
for (i = 0; i < ARRAY_SIZE(pcimt_mem_resources); i++)
request_resource(&sni_mem_resource, pcimt_mem_resources + i);
ioport_resource.end = sni_io_resource.end;
request_resource(&sni_io_resource, pcimt_io_resources + i);
}
extern struct pci_ops sni_pcimt_ops;
@ -240,9 +152,10 @@ extern struct pci_ops sni_pcimt_ops;
static struct pci_controller sni_controller = {
.pci_ops = &sni_pcimt_ops,
.mem_resource = &sni_mem_resource,
.mem_offset = 0x10000000UL,
.mem_offset = 0x00000000UL,
.io_resource = &sni_io_resource,
.io_offset = 0x00000000UL
.io_offset = 0x00000000UL,
.io_map_base = SNI_PORT_BASE
};
static void enable_pcimt_irq(unsigned int irq)
@ -363,15 +276,17 @@ void __init sni_pcimt_irq_init(void)
void sni_pcimt_init(void)
{
sni_pcimt_resource_init();
sni_pcimt_detect();
sni_pcimt_sc_init();
rtc_mips_get_time = mc146818_get_cmos_time;
rtc_mips_set_time = mc146818_set_rtc_mmss;
board_time_init = sni_cpu_time_init;
ioport_resource.end = sni_io_resource.end;
#ifdef CONFIG_PCI
PCIBIOS_MIN_IO = 0x9000;
register_pci_controller(&sni_controller);
#endif
sni_pcimt_resource_init();
}
static int __init snirm_pcimt_setup_devinit(void)

122
arch/mips/sni/pcit.c
View File

@ -43,7 +43,7 @@ static struct platform_device pcit_serial8250_device = {
};
static struct plat_serial8250_port pcit_cplus_data[] = {
PORT(0x3f8, 4),
PORT(0x3f8, 0),
PORT(0x2f8, 3),
PORT(0x3e8, 4),
PORT(0x2e8, 3),
@ -59,9 +59,9 @@ static struct platform_device pcit_cplus_serial8250_device = {
};
static struct resource sni_io_resource = {
.start = 0x00001000UL,
.start = 0x00000000UL,
.end = 0x03bfffffUL,
.name = "PCIT IO MEM",
.name = "PCIT IO",
.flags = IORESOURCE_IO,
};
@ -91,6 +91,11 @@ static struct resource pcit_io_resources[] = {
.end = 0xdf,
.name = "dma2",
.flags = IORESOURCE_BUSY
}, {
.start = 0xcf8,
.end = 0xcfb,
.name = "PCI config addr",
.flags = IORESOURCE_BUSY
}, {
.start = 0xcfc,
.end = 0xcff,
@ -100,107 +105,19 @@ static struct resource pcit_io_resources[] = {
};
static struct resource sni_mem_resource = {
.start = 0x10000000UL,
.end = 0xffffffffUL,
.start = 0x18000000UL,
.end = 0x1fbfffffUL,
.name = "PCIT PCI MEM",
.flags = IORESOURCE_MEM
};
/*
* The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
* for other purposes. Be paranoid and allocate all of the before the PCI
* code gets a chance to to map anything else there ...
*
* This leaves the following areas available:
*
* 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
* 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
* 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
* 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
* 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
*/
static struct resource pcit_mem_resources[] = {
{
.start = 0x14000000,
.end = 0x17bfffff,
.name = "PCI IO",
.flags = IORESOURCE_BUSY
}, {
.start = 0x17c00000,
.end = 0x17ffffff,
.name = "Cache Replacement Area",
.flags = IORESOURCE_BUSY
}, {
.start = 0x180a0000,
.end = 0x180bffff,
.name = "Video RAM area",
.flags = IORESOURCE_BUSY
}, {
.start = 0x180c0000,
.end = 0x180fffff,
.name = "ISA Reserved",
.flags = IORESOURCE_BUSY
}, {
.start = 0x19000000,
.end = 0x1fbfffff,
.name = "PCI MEM",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fc00000,
.end = 0x1fc7ffff,
.name = "Boot PROM",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fc80000,
.end = 0x1fcfffff,
.name = "Diag PROM",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fd00000,
.end = 0x1fdfffff,
.name = "X-Bus",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fe00000,
.end = 0x1fefffff,
.name = "BIOS map",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1ff00000,
.end = 0x1ff7ffff,
.name = "NVRAM / EEPROM",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1fff0000,
.end = 0x1fffefff,
.name = "MAUI ASIC",
.flags = IORESOURCE_BUSY
}, {
.start = 0x1ffff000,
.end = 0x1fffffff,
.name = "MP Agent",
.flags = IORESOURCE_BUSY
}, {
.start = 0x20000000,
.end = 0x9fffffff,
.name = "Main Memory",
.flags = IORESOURCE_BUSY
}
};
static void __init sni_pcit_resource_init(void)
{
int i;
/* request I/O space for devices used on all i[345]86 PCs */
for (i = 0; i < ARRAY_SIZE(pcit_io_resources); i++)
request_resource(&ioport_resource, pcit_io_resources + i);
/* request mem space for pcimt-specific devices */
for (i = 0; i < ARRAY_SIZE(pcit_mem_resources); i++)
request_resource(&sni_mem_resource, pcit_mem_resources + i);
ioport_resource.end = sni_io_resource.end;
request_resource(&sni_io_resource, pcit_io_resources + i);
}
@ -209,9 +126,10 @@ extern struct pci_ops sni_pcit_ops;
static struct pci_controller sni_pcit_controller = {
.pci_ops = &sni_pcit_ops,
.mem_resource = &sni_mem_resource,
.mem_offset = 0x10000000UL,
.mem_offset = 0x00000000UL,
.io_resource = &sni_io_resource,
.io_offset = 0x00000000UL
.io_offset = 0x00000000UL,
.io_map_base = SNI_PORT_BASE
};
static void enable_pcit_irq(unsigned int irq)
@ -262,7 +180,7 @@ static void pcit_hwint0(void)
int irq;
clear_c0_status(IE_IRQ0);
irq = ffs((pending >> 16) & 0x7f);
irq = ffs((pending >> 16) & 0x3f);
if (likely(irq > 0))
do_IRQ (irq + SNI_PCIT_INT_START - 1);
@ -289,6 +207,8 @@ static void sni_pcit_hwint_cplus(void)
if (pending & C_IRQ0)
pcit_hwint0();
else if (pending & C_IRQ1)
do_IRQ (MIPS_CPU_IRQ_BASE + 3);
else if (pending & C_IRQ2)
do_IRQ (MIPS_CPU_IRQ_BASE + 4);
else if (pending & C_IRQ3)
@ -317,21 +237,23 @@ void __init sni_pcit_cplus_irq_init(void)
mips_cpu_irq_init();
for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
set_irq_chip(i, &pcit_irq_type);
*(volatile u32 *)SNI_PCIT_INT_REG = 0;
*(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
sni_hwint = sni_pcit_hwint_cplus;
change_c0_status(ST0_IM, IE_IRQ0);
setup_irq (SNI_PCIT_INT_START + 6, &sni_isa_irq);
setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
}
void sni_pcit_init(void)
{
sni_pcit_resource_init();
rtc_mips_get_time = mc146818_get_cmos_time;
rtc_mips_set_time = mc146818_set_rtc_mmss;
board_time_init = sni_cpu_time_init;
ioport_resource.end = sni_io_resource.end;
#ifdef CONFIG_PCI
PCIBIOS_MIN_IO = 0x9000;
register_pci_controller(&sni_pcit_controller);
#endif
sni_pcit_resource_init();
}
static int __init snirm_pcit_setup_devinit(void)

92
arch/mips/vr41xx/Kconfig
View File

@ -1,6 +1,10 @@
config CASIO_E55
bool "Support for CASIO CASSIOPEIA E-10/15/55/65"
choice
prompt "Machine type"
depends on MACH_VR41XX
default TANBAC_TB022X
config CASIO_E55
bool "CASIO CASSIOPEIA E-10/15/55/65"
select DMA_NONCOHERENT
select IRQ_CPU
select ISA
@ -8,8 +12,7 @@ config CASIO_E55
select SYS_SUPPORTS_LITTLE_ENDIAN
config IBM_WORKPAD
bool "Support for IBM WorkPad z50"
depends on MACH_VR41XX
bool "IBM WorkPad z50"
select DMA_NONCOHERENT
select IRQ_CPU
select ISA
@ -17,26 +20,18 @@ config IBM_WORKPAD
select SYS_SUPPORTS_LITTLE_ENDIAN
config NEC_CMBVR4133
bool "Support for NEC CMB-VR4133"
depends on MACH_VR41XX
bool "NEC CMB-VR4133"
select DMA_NONCOHERENT
select IRQ_CPU
select HW_HAS_PCI
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
config ROCKHOPPER
bool "Support for Rockhopper baseboard"
depends on NEC_CMBVR4133
select I8259
select HAVE_STD_PC_SERIAL_PORT
config TANBAC_TB022X
bool "Support for TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
depends on MACH_VR41XX
bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select HW_HAS_PCI
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
help
@ -46,40 +41,65 @@ config TANBAC_TB022X
Please refer to <http://www.tanbac.co.jp/>
about VR4131 multichip module and VR4131DIMM.
config TANBAC_TB0226
bool "Support for TANBAC Mbase(TB0226)"
config VICTOR_MPC30X
bool "Victor MP-C303/304"
select DMA_NONCOHERENT
select IRQ_CPU
select HW_HAS_PCI
select PCI_VR41XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
config ZAO_CAPCELLA
bool "ZAO Networks Capcella"
select DMA_NONCOHERENT
select IRQ_CPU
select HW_HAS_PCI
select PCI_VR41XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
endchoice
config ROCKHOPPER
bool "Support for Rockhopper base board"
depends on NEC_CMBVR4133
select PCI_VR41XX
select I8259
select HAVE_STD_PC_SERIAL_PORT
choice
prompt "Base board type"
depends on TANBAC_TB022X
default TANBAC_TB0287
config TANBAC_TB0219
bool "TANBAC DIMM Evaluation Kit(TB0219)"
select GPIO_VR41XX
select PCI_VR41XX
help
The TANBAC DIMM Evaluation Kit(TB0219) is a MIPS-based platform
manufactured by TANBAC.
Please refer to <http://www.tanbac.co.jp/> about DIMM Evaluation Kit.
config TANBAC_TB0226
bool "TANBAC Mbase(TB0226)"
select GPIO_VR41XX
select PCI_VR41XX
help
The TANBAC Mbase(TB0226) is a MIPS-based platform
manufactured by TANBAC.
Please refer to <http://www.tanbac.co.jp/> about Mbase.
config TANBAC_TB0287
bool "Support for TANBAC Mini-ITX DIMM base(TB0287)"
depends on TANBAC_TB022X
bool "TANBAC Mini-ITX DIMM base(TB0287)"
select PCI_VR41XX
help
The TANBAC Mini-ITX DIMM base(TB0287) is a MIPS-based platform
manufactured by TANBAC.
Please refer to <http://www.tanbac.co.jp/> about Mini-ITX DIMM base.
config VICTOR_MPC30X
bool "Support for Victor MP-C303/304"
depends on MACH_VR41XX
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
config ZAO_CAPCELLA
bool "Support for ZAO Networks Capcella"
depends on MACH_VR41XX
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
endchoice
config PCI_VR41XX
bool "Add PCI control unit support of NEC VR4100 series"

2
arch/powerpc/kernel/ppc_ksyms.c
View File

@ -84,8 +84,6 @@ EXPORT_SYMBOL(strncpy);
EXPORT_SYMBOL(strcat);
EXPORT_SYMBOL(strlen);
EXPORT_SYMBOL(strcmp);
EXPORT_SYMBOL(strcasecmp);
EXPORT_SYMBOL(strncasecmp);
EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_partial_copy_generic);

5
arch/powerpc/lib/Makefile
View File

@ -7,13 +7,12 @@ EXTRA_CFLAGS += -mno-minimal-toc
endif
ifeq ($(CONFIG_PPC_MERGE),y)
obj-y := string.o strcase.o
obj-y := string.o
obj-$(CONFIG_PPC32) += div64.o copy_32.o checksum_32.o
endif
obj-$(CONFIG_PPC64) += checksum_64.o copypage_64.o copyuser_64.o \
memcpy_64.o usercopy_64.o mem_64.o string.o \
strcase.o
memcpy_64.o usercopy_64.o mem_64.o string.o
obj-$(CONFIG_QUICC_ENGINE) += rheap.o
obj-$(CONFIG_XMON) += sstep.o
obj-$(CONFIG_KPROBES) += sstep.o

25
arch/powerpc/lib/strcase.c
View File

@ -1,25 +0,0 @@
#include <linux/types.h>
#include <linux/ctype.h>
#include <linux/string.h>
int strcasecmp(const char *s1, const char *s2)
{
int c1, c2;
do {
c1 = tolower(*s1++);
c2 = tolower(*s2++);
} while (c1 == c2 && c1 != 0);
return c1 - c2;
}
int strncasecmp(const char *s1, const char *s2, size_t n)
{
int c1, c2;
do {
c1 = tolower(*s1++);
c2 = tolower(*s2++);
} while ((--n > 0) && c1 == c2 && c1 != 0);
return c1 - c2;
}

1
arch/ppc/8260_io/enet.c
View File

@ -477,7 +477,6 @@ for (;;) {
cep->stats.rx_dropped++;
}
else {
skb->dev = dev;
skb_put(skb,pkt_len-4); /* Make room */
eth_copy_and_sum(skb,
(unsigned char *)__va(bdp->cbd_bufaddr),

1
arch/ppc/8260_io/fcc_enet.c
View File

@ -734,7 +734,6 @@ for (;;) {
cep->stats.rx_dropped++;
}
else {
skb->dev = dev;
skb_put(skb,pkt_len); /* Make room */
eth_copy_and_sum(skb,
(unsigned char *)__va(bdp->cbd_bufaddr),

1
arch/ppc/8xx_io/enet.c
View File

@ -506,7 +506,6 @@ for (;;) {
cep->stats.rx_dropped++;
}
else {
skb->dev = dev;
skb_put(skb,pkt_len-4); /* Make room */
eth_copy_and_sum(skb,
cep->rx_vaddr[bdp - cep->rx_bd_base],

1
arch/ppc/8xx_io/fec.c
View File

@ -724,7 +724,6 @@ while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) {
printk("%s: Memory squeeze, dropping packet.\n", dev->name);
fep->stats.rx_dropped++;
} else {
skb->dev = dev;
skb_put(skb,pkt_len-4); /* Make room */
eth_copy_and_sum(skb, data, pkt_len-4, 0);
skb->protocol=eth_type_trans(skb,dev);

2
arch/ppc/kernel/ppc_ksyms.c
View File

@ -93,8 +93,6 @@ EXPORT_SYMBOL(strncpy);
EXPORT_SYMBOL(strcat);
EXPORT_SYMBOL(strlen);
EXPORT_SYMBOL(strcmp);
EXPORT_SYMBOL(strcasecmp);
EXPORT_SYMBOL(strncasecmp);
EXPORT_SYMBOL(__div64_32);
EXPORT_SYMBOL(csum_partial);

2
arch/ppc/lib/Makefile
View File

@ -2,7 +2,7 @@
# Makefile for ppc-specific library files..
#
obj-y := checksum.o string.o strcase.o div64.o
obj-y := checksum.o string.o div64.o
obj-$(CONFIG_8xx) += rheap.o
obj-$(CONFIG_CPM2) += rheap.o

24
arch/ppc/lib/strcase.c
View File

@ -1,24 +0,0 @@
#include <linux/ctype.h>
#include <linux/types.h>
int strcasecmp(const char *s1, const char *s2)
{
int c1, c2;
do {
c1 = tolower(*s1++);
c2 = tolower(*s2++);
} while (c1 == c2 && c1 != 0);
return c1 - c2;
}
int strncasecmp(const char *s1, const char *s2, size_t n)
{
int c1, c2;
do {
c1 = tolower(*s1++);
c2 = tolower(*s2++);
} while ((--n > 0) && c1 == c2 && c1 != 0);
return c1 - c2;
}

13
arch/s390/Kconfig
View File

@ -41,6 +41,11 @@ config GENERIC_HWEIGHT
config GENERIC_TIME
def_bool y
config GENERIC_BUG
bool
depends on BUG
default y
config NO_IOMEM
def_bool y
@ -514,6 +519,14 @@ config KEXEC
current kernel, and to start another kernel. It is like a reboot
but is independent of hardware/microcode support.
config ZFCPDUMP
tristate "zfcpdump support"
select SMP
default n
help
Select this option if you want to build an zfcpdump enabled kernel.
Refer to "Documentation/s390/zfcpdump.txt" for more details on this.
endmenu
source "net/Kconfig"

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