mirror of https://gitee.com/openkylin/linux.git
drm/amdgpu: initialize vcn jpeg ring
Add implementations for vcn jpeg ring initialization Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -115,6 +115,12 @@ static int vcn_v1_0_sw_init(void *handle)
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return r;
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}
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ring = &adev->vcn.ring_jpeg;
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sprintf(ring->name, "vcn_jpeg");
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r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.irq, 0);
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if (r)
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return r;
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return r;
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}
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@ -169,6 +175,14 @@ static int vcn_v1_0_hw_init(void *handle)
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}
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}
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ring = &adev->vcn.ring_jpeg;
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ring->ready = true;
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r = amdgpu_ring_test_ring(ring);
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if (r) {
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ring->ready = false;
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goto done;
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}
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done:
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if (!r)
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DRM_INFO("VCN decode and encode initialized successfully.\n");
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@ -736,6 +750,15 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
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WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));
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WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4);
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ring = &adev->vcn.ring_jpeg;
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WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_VMID, 0);
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WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));
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WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, lower_32_bits(ring->gpu_addr));
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WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH, upper_32_bits(ring->gpu_addr));
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WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_RPTR, 0);
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WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_WPTR, 0);
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WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, 0x00000002L);
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return 0;
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}
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