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x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss 

Historically, the entire TSS + io bitmap structure was cacheline
aligned, but commit ca241c7503 ("x86: unify tss_struct") changed it
(presumably inadvertently) so that the fixed-layout hardware part is
cacheline-aligned and the io bitmap is after the padding.  This wastes
24 bytes (the hardware part should be 104 bytes, but this pads it to
128 bytes) and, serves no purpose, and causes sizeof(struct
x86_hw_tss) to have a confusing value.

Drop the pointless alignment.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Andy Lutomirski 2017-02-20 08:56:13 -08:00 committed by Paolo Bonzini
parent 8c2e41f7ae
commit d3273deac9
1 changed files with 1 additions and 1 deletions
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2
arch/x86/include/asm/processor.h
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@ -303,7 +303,7 @@ struct x86_hw_tss {
u16 reserved5;
u16 io_bitmap_base;
} __attribute__((packed)) ____cacheline_aligned;
} __attribute__((packed));
#endif
/*