mirror of https://gitee.com/openkylin/linux.git
drm/amd/powerplay: add atomctrl function to calculate CZ sclk dividers
Use atombios to calculate the values. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -313,6 +313,28 @@ int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr,
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return result;
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}
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int atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr,
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uint32_t clock_value,
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pp_atomctrl_clock_dividers_kong *dividers)
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{
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COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 pll_parameters;
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int result;
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pll_parameters.ulClock = clock_value;
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result = cgs_atom_exec_cmd_table
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(hwmgr->device,
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GetIndexIntoMasterTable(COMMAND, ComputeMemoryEnginePLL),
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&pll_parameters);
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if (0 == result) {
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dividers->pll_post_divider = pll_parameters.ucPostDiv;
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dividers->real_clock = pll_parameters.ulClock;
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}
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return result;
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}
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int atomctrl_get_engine_pll_dividers_vi(
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struct pp_hwmgr *hwmgr,
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uint32_t clock_value,
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@ -233,6 +233,9 @@ extern bool atomctrl_is_voltage_controled_by_gpio_v3(struct pp_hwmgr *hwmgr, uin
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extern int atomctrl_get_voltage_table_v3(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode, pp_atomctrl_voltage_table *voltage_table);
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extern int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr,
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uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param);
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extern int atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr,
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uint32_t clock_value,
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pp_atomctrl_clock_dividers_kong *dividers);
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extern int atomctrl_read_efuse(void *device, uint16_t start_index,
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uint16_t end_index, uint32_t mask, uint32_t *efuse);
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extern int atomctrl_calculate_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
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