mirror of https://gitee.com/openkylin/linux.git
m68knommu: make ColdFire internal peripheral region configurable
Most ColdFire CPUs have an internal peripheral set that can be mapped at a user selectable address. Different ColdFire parts either use an MBAR register of an IPSBAR register to map the peripheral region. Most boards use the Freescale default mappings - but not all. Make the setting of the MBAR or IPSBAR register configurable. And only make the selection available on the appropriate ColdFire CPU types. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer
parent
b195c47924
commit
d4852a34e4
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@ -33,14 +33,17 @@
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* the base address. Some have an IPSBAR register instead, and it
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* has slightly different rules on its size and alignment. Some
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* parts have fixed addresses and the internal peripherals cannot
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* be relocated in the address space.
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* be relocated in the CPU address space.
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*
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* This is generally setup by the boards start up code.
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* The value of MBAR or IPSBAR is config time selectable, we no
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* longer hard define it here. No MBAR or IPSBAR will be defined if
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* this part has a fixed peripheral address map.
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*/
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#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
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#define MCF_IPSBAR 0x40000000
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#else
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#define MCF_MBAR 0x10000000
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#ifdef CONFIG_MBAR
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#define MCF_MBAR CONFIG_MBAR
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#endif
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#ifdef CONFIG_IPSBAR
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#define MCF_IPSBAR CONFIG_IPSBAR
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#endif
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/****************************************************************************/
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@ -79,6 +79,12 @@ config HAVE_CACHE_SPLIT
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config HAVE_CACHE_CB
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bool
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config HAVE_MBAR
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bool
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config HAVE_IPSBAR
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bool
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source "init/Kconfig"
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source "kernel/Kconfig.freezer"
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@ -112,12 +118,14 @@ config M68360
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config M5206
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bool "MCF5206"
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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Motorola ColdFire 5206 processor support.
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config M5206e
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bool "MCF5206e"
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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Motorola ColdFire 5206e processor support.
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@ -132,30 +140,35 @@ config M523x
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bool "MCF523x"
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select GENERIC_CLOCKEVENTS
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Freescale Coldfire 5230/1/2/4/5 processor support
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config M5249
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bool "MCF5249"
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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Motorola ColdFire 5249 processor support.
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config M5271
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bool "MCF5271"
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Freescale (Motorola) ColdFire 5270/5271 processor support.
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config M5272
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bool "MCF5272"
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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Motorola ColdFire 5272 processor support.
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config M5275
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bool "MCF5275"
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Freescale (Motorola) ColdFire 5274/5275 processor support.
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@ -163,6 +176,7 @@ config M528x
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bool "MCF528x"
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select GENERIC_CLOCKEVENTS
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Motorola ColdFire 5280/5282 processor support.
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@ -170,6 +184,7 @@ config M5307
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bool "MCF5307"
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select COLDFIRE_SW_A7
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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Motorola ColdFire 5307 processor support.
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@ -183,18 +198,21 @@ config M5407
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bool "MCF5407"
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select COLDFIRE_SW_A7
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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Motorola ColdFire 5407 processor support.
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config M547x
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bool "MCF547x"
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
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config M548x
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bool "MCF548x"
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
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@ -650,6 +668,28 @@ config VECTORBASE
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platforms this address is programmed into the VBR register, thus
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actually setting the address to use.
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config MBAR
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hex "Address of the MBAR (internal peripherals)"
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default "0x10000000"
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depends on HAVE_MBAR
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help
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Define the address of the internal system peripherals. This value
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is set in the processors MBAR register. This is generally setup by
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the boot loader, and will not be written by the kernel. By far most
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ColdFire boards use the default 0x10000000 value, so if unsure then
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use this.
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config IPSBAR
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hex "Address of the IPSBAR (internal peripherals)"
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default "0x40000000"
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depends on HAVE_IPSBAR
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help
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Define the address of the internal system peripherals. This value
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is set in the processors IPSBAR register. This is generally setup by
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the boot loader, and will not be written by the kernel. By far most
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ColdFire boards use the default 0x40000000 value, so if unsure then
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use this.
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config KERNELBASE
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hex "Address of the base of kernel code"
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default "0x400"
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