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spi: imx: put struct spi_imx_config members into driver private struct 

struct spi_imx_config used to hold data specific to the current
transfer. However, other data is in the drivers private data struct.
Let's drop struct spi_imx_config and put the variables into the
drivers private data struct aswell.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Sascha Hauer 2017-06-02 07:38:01 +02:00 committed by Mark Brown
parent 494f3193bd
commit d52345b6cf
1 changed files with 23 additions and 27 deletions
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50
drivers/spi/spi-imx.c
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@ -56,10 +56,6 @@
/* The maximum bytes that a sdma BD can transfer.*/ /* The maximum bytes that a sdma BD can transfer.*/
#define MAX_SDMA_BD_BYTES (1 << 15) #define MAX_SDMA_BD_BYTES (1 << 15)
struct spi_imx_config {
unsigned int speed_hz;
unsigned int bpw;
};
enum spi_imx_devtype { enum spi_imx_devtype {
IMX1_CSPI, IMX1_CSPI,
@ -74,7 +70,7 @@ struct spi_imx_data;
struct spi_imx_devtype_data { struct spi_imx_devtype_data {
void (*intctrl)(struct spi_imx_data *, int); void (*intctrl)(struct spi_imx_data *, int);
int (*config)(struct spi_device *, struct spi_imx_config *); int (*config)(struct spi_device *);
void (*trigger)(struct spi_imx_data *); void (*trigger)(struct spi_imx_data *);
int (*rx_available)(struct spi_imx_data *); int (*rx_available)(struct spi_imx_data *);
void (*reset)(struct spi_imx_data *); void (*reset)(struct spi_imx_data *);
@ -94,6 +90,8 @@ struct spi_imx_data {
unsigned long spi_clk; unsigned long spi_clk;
unsigned int spi_bus_clk; unsigned int spi_bus_clk;
unsigned int speed_hz;
unsigned int bits_per_word;
unsigned int bytes_per_word; unsigned int bytes_per_word;
unsigned int spi_drctl; unsigned int spi_drctl;
@ -335,12 +333,11 @@ static void mx51_ecspi_trigger(struct spi_imx_data *spi_imx)
writel(reg, spi_imx->base + MX51_ECSPI_CTRL); writel(reg, spi_imx->base + MX51_ECSPI_CTRL);
} }
static int mx51_ecspi_config(struct spi_device *spi, static int mx51_ecspi_config(struct spi_device *spi)
struct spi_imx_config *config)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
u32 ctrl = MX51_ECSPI_CTRL_ENABLE; u32 ctrl = MX51_ECSPI_CTRL_ENABLE;
u32 clk = config->speed_hz, delay, reg; u32 clk = spi_imx->speed_hz, delay, reg;
u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG); u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG);
/* /*
@ -359,13 +356,13 @@ static int mx51_ecspi_config(struct spi_device *spi,
ctrl |= MX51_ECSPI_CTRL_DRCTL(spi_imx->spi_drctl); ctrl |= MX51_ECSPI_CTRL_DRCTL(spi_imx->spi_drctl);
/* set clock speed */ /* set clock speed */
ctrl |= mx51_ecspi_clkdiv(spi_imx, config->speed_hz, &clk); ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->speed_hz, &clk);
spi_imx->spi_bus_clk = clk; spi_imx->spi_bus_clk = clk;
/* set chip select to use */ /* set chip select to use */
ctrl |= MX51_ECSPI_CTRL_CS(spi->chip_select); ctrl |= MX51_ECSPI_CTRL_CS(spi->chip_select);
ctrl |= (config->bpw - 1) << MX51_ECSPI_CTRL_BL_OFFSET; ctrl |= (spi_imx->bits_per_word - 1) << MX51_ECSPI_CTRL_BL_OFFSET;
cfg |= MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select); cfg |= MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select);
@ -496,21 +493,21 @@ static void mx31_trigger(struct spi_imx_data *spi_imx)
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
} }
static int mx31_config(struct spi_device *spi, struct spi_imx_config *config) static int mx31_config(struct spi_device *spi)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
unsigned int clk; unsigned int clk;
reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz, &clk) << reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->speed_hz, &clk) <<
MX31_CSPICTRL_DR_SHIFT; MX31_CSPICTRL_DR_SHIFT;
spi_imx->spi_bus_clk = clk; spi_imx->spi_bus_clk = clk;
if (is_imx35_cspi(spi_imx)) { if (is_imx35_cspi(spi_imx)) {
reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT; reg |= (spi_imx->bits_per_word - 1) << MX35_CSPICTRL_BL_SHIFT;
reg |= MX31_CSPICTRL_SSCTL; reg |= MX31_CSPICTRL_SSCTL;
} else { } else {
reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT; reg |= (spi_imx->bits_per_word - 1) << MX31_CSPICTRL_BC_SHIFT;
} }
if (spi->mode & SPI_CPHA) if (spi->mode & SPI_CPHA)
@ -592,18 +589,18 @@ static void mx21_trigger(struct spi_imx_data *spi_imx)
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
} }
static int mx21_config(struct spi_device *spi, struct spi_imx_config *config) static int mx21_config(struct spi_device *spi)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER; unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER;
unsigned int max = is_imx27_cspi(spi_imx) ? 16 : 18; unsigned int max = is_imx27_cspi(spi_imx) ? 16 : 18;
unsigned int clk; unsigned int clk;
reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz, max, &clk) reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, spi_imx->speed_hz, max, &clk)
<< MX21_CSPICTRL_DR_SHIFT; << MX21_CSPICTRL_DR_SHIFT;
spi_imx->spi_bus_clk = clk; spi_imx->spi_bus_clk = clk;
reg |= config->bpw - 1; reg |= spi_imx->bits_per_word - 1;
if (spi->mode & SPI_CPHA) if (spi->mode & SPI_CPHA)
reg |= MX21_CSPICTRL_PHA; reg |= MX21_CSPICTRL_PHA;
@ -661,17 +658,17 @@ static void mx1_trigger(struct spi_imx_data *spi_imx)
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
} }
static int mx1_config(struct spi_device *spi, struct spi_imx_config *config) static int mx1_config(struct spi_device *spi)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER; unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER;
unsigned int clk; unsigned int clk;
reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz, &clk) << reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->speed_hz, &clk) <<
MX1_CSPICTRL_DR_SHIFT; MX1_CSPICTRL_DR_SHIFT;
spi_imx->spi_bus_clk = clk; spi_imx->spi_bus_clk = clk;
reg |= config->bpw - 1; reg |= spi_imx->bits_per_word - 1;
if (spi->mode & SPI_CPHA) if (spi->mode & SPI_CPHA)
reg |= MX1_CSPICTRL_PHA; reg |= MX1_CSPICTRL_PHA;
@ -887,20 +884,19 @@ static int spi_imx_setupxfer(struct spi_device *spi,
struct spi_transfer *t) struct spi_transfer *t)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
struct spi_imx_config config;
int ret; int ret;
if (!t) if (!t)
return 0; return 0;
config.bpw = t->bits_per_word; spi_imx->bits_per_word = t->bits_per_word;
config.speed_hz = t->speed_hz; spi_imx->speed_hz = t->speed_hz;
/* Initialize the functions for transfer */ /* Initialize the functions for transfer */
if (config.bpw <= 8) { if (spi_imx->bits_per_word <= 8) {
spi_imx->rx = spi_imx_buf_rx_u8; spi_imx->rx = spi_imx_buf_rx_u8;
spi_imx->tx = spi_imx_buf_tx_u8; spi_imx->tx = spi_imx_buf_tx_u8;
} else if (config.bpw <= 16) { } else if (spi_imx->bits_per_word <= 16) {
spi_imx->rx = spi_imx_buf_rx_u16; spi_imx->rx = spi_imx_buf_rx_u16;
spi_imx->tx = spi_imx_buf_tx_u16; spi_imx->tx = spi_imx_buf_tx_u16;
} else { } else {
@ -915,12 +911,12 @@ static int spi_imx_setupxfer(struct spi_device *spi,
if (spi_imx->usedma) { if (spi_imx->usedma) {
ret = spi_imx_dma_configure(spi->master, ret = spi_imx_dma_configure(spi->master,
spi_imx_bytes_per_word(config.bpw)); spi_imx_bytes_per_word(spi_imx->bits_per_word));
if (ret) if (ret)
return ret; return ret;
} }
spi_imx->devtype_data->config(spi, &config); spi_imx->devtype_data->config(spi);
return 0; return 0;
} }