mirror of https://gitee.com/openkylin/linux.git
clk: imx8mm: Fix typo of pwm3 clock's mux option #4
i.MX8MM has no sys3_pll2_out clock, PWM3 clock's mux option #4
should be sys_pll3_out, sys3_pll2_out is a typo, fix it.
Fixes: ba5625c3e2
("clk: imx: Add clock driver support for imx8mm")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
parent
e50bf7a67c
commit
d52fb0193f
|
@ -287,7 +287,7 @@ static const char *imx8mm_pwm2_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_1
|
|||
"sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", };
|
||||
|
||||
static const char *imx8mm_pwm3_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
|
||||
"sys3_pll2_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", };
|
||||
"sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", };
|
||||
|
||||
static const char *imx8mm_pwm4_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
|
||||
"sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", };
|
||||
|
|
Loading…
Reference in New Issue