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ASoC: rl6231: Modify the target DMIC clock rate 

Some DMIC components will not work correctly in the clock rate 3.072MHz.
We recommend the clock rate 1.536MHz in the gerenal case.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Link: https://lore.kernel.org/r/20200604071016.3981-1-oder_chiou@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Oder Chiou 2020-06-04 15:10:16 +08:00 committed by Mark Brown
parent a6b675a89e
commit d605cbb642
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GPG Key ID: 24D68B725D5487D0
1 changed files with 2 additions and 2 deletions
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4
sound/soc/codecs/rl6231.c
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@ -80,8 +80,8 @@ int rl6231_calc_dmic_clk(int rate)
for (i = 0; i < ARRAY_SIZE(div); i++) {
if ((div[i] % 3) == 0)
continue;
/* find divider that gives DMIC frequency below 3.072MHz */
if (3072000 * div[i] >= rate)
/* find divider that gives DMIC frequency below 1.536MHz */
if (1536000 * div[i] >= rate)
return i;
}