mirror of https://gitee.com/openkylin/linux.git
spi: spi-rockchip: cleanup use struct spi_controller
Cleanup, move from the compatibily layer struct spi_master over to struct spi_controller, and rename the related function calls. Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk> Link: https://lore.kernel.org/r/20200511083022.23678-2-chris.ruehl@gtsys.com.hk Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Chris Ruehl
Mark Brown
parent
afb7f56524
commit
d66571a20f
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@ -219,8 +219,8 @@ static u32 get_fifo_len(struct rockchip_spi *rs)
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static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
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{
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struct spi_master *master = spi->master;
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struct rockchip_spi *rs = spi_master_get_devdata(master);
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struct spi_controller *ctlr = spi->controller;
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struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
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bool cs_asserted = !enable;
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/* Return immediately for no-op */
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@ -244,10 +244,10 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
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rs->cs_asserted[spi->chip_select] = cs_asserted;
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}
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static void rockchip_spi_handle_err(struct spi_master *master,
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static void rockchip_spi_handle_err(struct spi_controller *ctlr,
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struct spi_message *msg)
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{
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struct rockchip_spi *rs = spi_master_get_devdata(master);
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struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
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/* stop running spi transfer
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* this also flushes both rx and tx fifos
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@ -258,10 +258,10 @@ static void rockchip_spi_handle_err(struct spi_master *master,
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writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
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if (atomic_read(&rs->state) & TXDMA)
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dmaengine_terminate_async(master->dma_tx);
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dmaengine_terminate_async(ctlr->dma_tx);
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if (atomic_read(&rs->state) & RXDMA)
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dmaengine_terminate_async(master->dma_rx);
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dmaengine_terminate_async(ctlr->dma_rx);
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}
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static void rockchip_spi_pio_writer(struct rockchip_spi *rs)
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@ -319,8 +319,8 @@ static void rockchip_spi_pio_reader(struct rockchip_spi *rs)
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static irqreturn_t rockchip_spi_isr(int irq, void *dev_id)
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{
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struct spi_master *master = dev_id;
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struct rockchip_spi *rs = spi_master_get_devdata(master);
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struct spi_controller *ctlr = dev_id;
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struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
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if (rs->tx_left)
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rockchip_spi_pio_writer(rs);
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@ -329,7 +329,7 @@ static irqreturn_t rockchip_spi_isr(int irq, void *dev_id)
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if (!rs->rx_left) {
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spi_enable_chip(rs, false);
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writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
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spi_finalize_current_transfer(master);
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spi_finalize_current_transfer(ctlr);
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}
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return IRQ_HANDLED;
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@ -355,21 +355,21 @@ static int rockchip_spi_prepare_irq(struct rockchip_spi *rs,
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static void rockchip_spi_dma_rxcb(void *data)
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{
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struct spi_master *master = data;
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struct rockchip_spi *rs = spi_master_get_devdata(master);
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struct spi_controller *ctlr = data;
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struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
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int state = atomic_fetch_andnot(RXDMA, &rs->state);
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if (state & TXDMA)
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return;
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spi_enable_chip(rs, false);
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spi_finalize_current_transfer(master);
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spi_finalize_current_transfer(ctlr);
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}
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static void rockchip_spi_dma_txcb(void *data)
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{
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struct spi_master *master = data;
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struct rockchip_spi *rs = spi_master_get_devdata(master);
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struct spi_controller *ctlr = data;
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struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
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int state = atomic_fetch_andnot(TXDMA, &rs->state);
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if (state & RXDMA)
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@ -379,11 +379,11 @@ static void rockchip_spi_dma_txcb(void *data)
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wait_for_idle(rs);
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spi_enable_chip(rs, false);
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spi_finalize_current_transfer(master);
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spi_finalize_current_transfer(ctlr);
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}
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static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
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struct spi_master *master, struct spi_transfer *xfer)
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struct spi_controller *ctlr, struct spi_transfer *xfer)
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{
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struct dma_async_tx_descriptor *rxdesc, *txdesc;
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@ -398,17 +398,17 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
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.src_maxburst = 1,
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};
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dmaengine_slave_config(master->dma_rx, &rxconf);
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dmaengine_slave_config(ctlr->dma_rx, &rxconf);
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rxdesc = dmaengine_prep_slave_sg(
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master->dma_rx,
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ctlr->dma_rx,
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xfer->rx_sg.sgl, xfer->rx_sg.nents,
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DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT);
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if (!rxdesc)
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return -EINVAL;
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rxdesc->callback = rockchip_spi_dma_rxcb;
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rxdesc->callback_param = master;
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rxdesc->callback_param = ctlr;
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}
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txdesc = NULL;
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@ -420,27 +420,27 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
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.dst_maxburst = rs->fifo_len / 4,
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};
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dmaengine_slave_config(master->dma_tx, &txconf);
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dmaengine_slave_config(ctlr->dma_tx, &txconf);
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txdesc = dmaengine_prep_slave_sg(
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master->dma_tx,
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ctlr->dma_tx,
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xfer->tx_sg.sgl, xfer->tx_sg.nents,
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DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT);
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if (!txdesc) {
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if (rxdesc)
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dmaengine_terminate_sync(master->dma_rx);
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dmaengine_terminate_sync(ctlr->dma_rx);
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return -EINVAL;
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}
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txdesc->callback = rockchip_spi_dma_txcb;
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txdesc->callback_param = master;
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txdesc->callback_param = ctlr;
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}
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/* rx must be started before tx due to spi instinct */
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if (rxdesc) {
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atomic_or(RXDMA, &rs->state);
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dmaengine_submit(rxdesc);
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dma_async_issue_pending(master->dma_rx);
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dma_async_issue_pending(ctlr->dma_rx);
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}
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spi_enable_chip(rs, true);
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@ -448,7 +448,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
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if (txdesc) {
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atomic_or(TXDMA, &rs->state);
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dmaengine_submit(txdesc);
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dma_async_issue_pending(master->dma_tx);
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dma_async_issue_pending(ctlr->dma_tx);
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}
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/* 1 means the transfer is in progress */
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@ -493,7 +493,7 @@ static void rockchip_spi_config(struct rockchip_spi *rs,
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break;
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default:
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/* we only whitelist 4, 8 and 16 bit words in
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* master->bits_per_word_mask, so this shouldn't
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* ctlr->bits_per_word_mask, so this shouldn't
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* happen
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*/
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unreachable();
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@ -536,11 +536,11 @@ static size_t rockchip_spi_max_transfer_size(struct spi_device *spi)
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}
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static int rockchip_spi_transfer_one(
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struct spi_master *master,
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struct spi_controller *ctlr,
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struct spi_device *spi,
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struct spi_transfer *xfer)
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{
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struct rockchip_spi *rs = spi_master_get_devdata(master);
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struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
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bool use_dma;
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WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) &&
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@ -558,21 +558,21 @@ static int rockchip_spi_transfer_one(
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rs->n_bytes = xfer->bits_per_word <= 8 ? 1 : 2;
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use_dma = master->can_dma ? master->can_dma(master, spi, xfer) : false;
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use_dma = ctlr->can_dma ? ctlr->can_dma(ctlr, spi, xfer) : false;
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rockchip_spi_config(rs, spi, xfer, use_dma);
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if (use_dma)
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return rockchip_spi_prepare_dma(rs, master, xfer);
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return rockchip_spi_prepare_dma(rs, ctlr, xfer);
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return rockchip_spi_prepare_irq(rs, xfer);
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}
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static bool rockchip_spi_can_dma(struct spi_master *master,
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static bool rockchip_spi_can_dma(struct spi_controller *ctlr,
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struct spi_device *spi,
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struct spi_transfer *xfer)
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{
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struct rockchip_spi *rs = spi_master_get_devdata(master);
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struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
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unsigned int bytes_per_word = xfer->bits_per_word <= 8 ? 1 : 2;
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/* if the numbor of spi words to transfer is less than the fifo
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@ -586,44 +586,44 @@ static int rockchip_spi_probe(struct platform_device *pdev)
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{
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int ret;
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struct rockchip_spi *rs;
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struct spi_master *master;
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struct spi_controller *ctlr;
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struct resource *mem;
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u32 rsd_nsecs;
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master = spi_alloc_master(&pdev->dev, sizeof(struct rockchip_spi));
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if (!master)
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ctlr = spi_alloc_master(&pdev->dev, sizeof(struct rockchip_spi));
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if (!ctlr)
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return -ENOMEM;
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platform_set_drvdata(pdev, master);
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platform_set_drvdata(pdev, ctlr);
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rs = spi_master_get_devdata(master);
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rs = spi_controller_get_devdata(ctlr);
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/* Get basic io resource and map it */
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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rs->regs = devm_ioremap_resource(&pdev->dev, mem);
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if (IS_ERR(rs->regs)) {
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ret = PTR_ERR(rs->regs);
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goto err_put_master;
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goto err_put_ctlr;
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}
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rs->apb_pclk = devm_clk_get(&pdev->dev, "apb_pclk");
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if (IS_ERR(rs->apb_pclk)) {
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dev_err(&pdev->dev, "Failed to get apb_pclk\n");
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ret = PTR_ERR(rs->apb_pclk);
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goto err_put_master;
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goto err_put_ctlr;
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}
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rs->spiclk = devm_clk_get(&pdev->dev, "spiclk");
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if (IS_ERR(rs->spiclk)) {
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dev_err(&pdev->dev, "Failed to get spi_pclk\n");
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ret = PTR_ERR(rs->spiclk);
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goto err_put_master;
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goto err_put_ctlr;
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}
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ret = clk_prepare_enable(rs->apb_pclk);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to enable apb_pclk\n");
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goto err_put_master;
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goto err_put_ctlr;
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}
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ret = clk_prepare_enable(rs->spiclk);
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@ -639,7 +639,7 @@ static int rockchip_spi_probe(struct platform_device *pdev)
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goto err_disable_spiclk;
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ret = devm_request_threaded_irq(&pdev->dev, ret, rockchip_spi_isr, NULL,
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IRQF_ONESHOT, dev_name(&pdev->dev), master);
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IRQF_ONESHOT, dev_name(&pdev->dev), ctlr);
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if (ret)
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goto err_disable_spiclk;
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@ -673,78 +673,78 @@ static int rockchip_spi_probe(struct platform_device *pdev)
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pm_runtime_set_active(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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master->auto_runtime_pm = true;
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master->bus_num = pdev->id;
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST;
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master->num_chipselect = ROCKCHIP_SPI_MAX_CS_NUM;
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master->dev.of_node = pdev->dev.of_node;
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master->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4);
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master->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX;
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master->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT);
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ctlr->auto_runtime_pm = true;
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ctlr->bus_num = pdev->id;
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ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST;
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ctlr->num_chipselect = ROCKCHIP_SPI_MAX_CS_NUM;
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ctlr->dev.of_node = pdev->dev.of_node;
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ctlr->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4);
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ctlr->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX;
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ctlr->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT);
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master->set_cs = rockchip_spi_set_cs;
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master->transfer_one = rockchip_spi_transfer_one;
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master->max_transfer_size = rockchip_spi_max_transfer_size;
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master->handle_err = rockchip_spi_handle_err;
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master->flags = SPI_MASTER_GPIO_SS;
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ctlr->set_cs = rockchip_spi_set_cs;
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ctlr->transfer_one = rockchip_spi_transfer_one;
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ctlr->max_transfer_size = rockchip_spi_max_transfer_size;
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ctlr->handle_err = rockchip_spi_handle_err;
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ctlr->flags = SPI_MASTER_GPIO_SS;
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master->dma_tx = dma_request_chan(rs->dev, "tx");
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if (IS_ERR(master->dma_tx)) {
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ctlr->dma_tx = dma_request_chan(rs->dev, "tx");
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if (IS_ERR(ctlr->dma_tx)) {
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/* Check tx to see if we need defer probing driver */
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if (PTR_ERR(master->dma_tx) == -EPROBE_DEFER) {
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if (PTR_ERR(ctlr->dma_tx) == -EPROBE_DEFER) {
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ret = -EPROBE_DEFER;
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goto err_disable_pm_runtime;
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}
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dev_warn(rs->dev, "Failed to request TX DMA channel\n");
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master->dma_tx = NULL;
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ctlr->dma_tx = NULL;
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}
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master->dma_rx = dma_request_chan(rs->dev, "rx");
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if (IS_ERR(master->dma_rx)) {
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if (PTR_ERR(master->dma_rx) == -EPROBE_DEFER) {
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ctlr->dma_rx = dma_request_chan(rs->dev, "rx");
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if (IS_ERR(ctlr->dma_rx)) {
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if (PTR_ERR(ctlr->dma_rx) == -EPROBE_DEFER) {
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ret = -EPROBE_DEFER;
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goto err_free_dma_tx;
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}
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dev_warn(rs->dev, "Failed to request RX DMA channel\n");
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master->dma_rx = NULL;
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ctlr->dma_rx = NULL;
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}
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if (master->dma_tx && master->dma_rx) {
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if (ctlr->dma_tx && ctlr->dma_rx) {
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rs->dma_addr_tx = mem->start + ROCKCHIP_SPI_TXDR;
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rs->dma_addr_rx = mem->start + ROCKCHIP_SPI_RXDR;
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master->can_dma = rockchip_spi_can_dma;
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ctlr->can_dma = rockchip_spi_can_dma;
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}
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ret = devm_spi_register_master(&pdev->dev, master);
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ret = devm_spi_register_controller(&pdev->dev, ctlr);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to register master\n");
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dev_err(&pdev->dev, "Failed to register controller\n");
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goto err_free_dma_rx;
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}
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return 0;
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err_free_dma_rx:
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if (master->dma_rx)
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dma_release_channel(master->dma_rx);
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if (ctlr->dma_rx)
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dma_release_channel(ctlr->dma_rx);
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err_free_dma_tx:
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if (master->dma_tx)
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dma_release_channel(master->dma_tx);
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if (ctlr->dma_tx)
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dma_release_channel(ctlr->dma_tx);
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err_disable_pm_runtime:
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pm_runtime_disable(&pdev->dev);
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err_disable_spiclk:
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clk_disable_unprepare(rs->spiclk);
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err_disable_apbclk:
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clk_disable_unprepare(rs->apb_pclk);
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err_put_master:
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spi_master_put(master);
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err_put_ctlr:
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spi_controller_put(ctlr);
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return ret;
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}
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static int rockchip_spi_remove(struct platform_device *pdev)
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{
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struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
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struct rockchip_spi *rs = spi_master_get_devdata(master);
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struct spi_controller *ctlr = spi_controller_get(platform_get_drvdata(pdev));
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struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
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pm_runtime_get_sync(&pdev->dev);
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@ -755,12 +755,12 @@ static int rockchip_spi_remove(struct platform_device *pdev)
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pm_runtime_disable(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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if (master->dma_tx)
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dma_release_channel(master->dma_tx);
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if (master->dma_rx)
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dma_release_channel(master->dma_rx);
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if (ctlr->dma_tx)
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dma_release_channel(ctlr->dma_tx);
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if (ctlr->dma_rx)
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dma_release_channel(ctlr->dma_rx);
|
||||
|
||||
spi_master_put(master);
|
||||
spi_controller_put(ctlr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -769,9 +769,9 @@ static int rockchip_spi_remove(struct platform_device *pdev)
|
|||
static int rockchip_spi_suspend(struct device *dev)
|
||||
{
|
||||
int ret;
|
||||
struct spi_master *master = dev_get_drvdata(dev);
|
||||
struct spi_controller *ctlr = dev_get_drvdata(dev);
|
||||
|
||||
ret = spi_master_suspend(master);
|
||||
ret = spi_controller_suspend(ctlr);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
|
@ -787,8 +787,8 @@ static int rockchip_spi_suspend(struct device *dev)
|
|||
static int rockchip_spi_resume(struct device *dev)
|
||||
{
|
||||
int ret;
|
||||
struct spi_master *master = dev_get_drvdata(dev);
|
||||
struct rockchip_spi *rs = spi_master_get_devdata(master);
|
||||
struct spi_controller *ctlr = dev_get_drvdata(dev);
|
||||
struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
|
||||
|
||||
pinctrl_pm_select_default_state(dev);
|
||||
|
||||
|
|
@ -796,7 +796,7 @@ static int rockchip_spi_resume(struct device *dev)
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = spi_master_resume(master);
|
||||
ret = spi_controller_resume(ctlr);
|
||||
if (ret < 0) {
|
||||
clk_disable_unprepare(rs->spiclk);
|
||||
clk_disable_unprepare(rs->apb_pclk);
|
||||
|
|
@ -809,8 +809,8 @@ static int rockchip_spi_resume(struct device *dev)
|
|||
#ifdef CONFIG_PM
|
||||
static int rockchip_spi_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct spi_master *master = dev_get_drvdata(dev);
|
||||
struct rockchip_spi *rs = spi_master_get_devdata(master);
|
||||
struct spi_controller *ctlr = dev_get_drvdata(dev);
|
||||
struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
|
||||
|
||||
clk_disable_unprepare(rs->spiclk);
|
||||
clk_disable_unprepare(rs->apb_pclk);
|
||||
|
|
@ -821,8 +821,8 @@ static int rockchip_spi_runtime_suspend(struct device *dev)
|
|||
static int rockchip_spi_runtime_resume(struct device *dev)
|
||||
{
|
||||
int ret;
|
||||
struct spi_master *master = dev_get_drvdata(dev);
|
||||
struct rockchip_spi *rs = spi_master_get_devdata(master);
|
||||
struct spi_controller *ctlr = dev_get_drvdata(dev);
|
||||
struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
|
||||
|
||||
ret = clk_prepare_enable(rs->apb_pclk);
|
||||
if (ret < 0)
|
||||
|
|
|
|||
Loading…
Reference in New Issue